1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Device Tree Source for OMAP443x SoC 3 * Device Tree Source for OMAP443x SoC
4 * 4 *
5 * Copyright (C) 2013 Texas Instruments Incorp 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
6 */ 6 */
7 7
8 #include "omap4.dtsi" 8 #include "omap4.dtsi"
9 9
10 / { 10 / {
11 cpus { 11 cpus {
12 cpu0: cpu@0 { 12 cpu0: cpu@0 {
13 /* OMAP443x variants O 13 /* OMAP443x variants OPP50-OPPNT */
14 operating-points = < 14 operating-points = <
15 /* kHz uV * 15 /* kHz uV */
16 300000 102500 16 300000 1025000
17 600000 120000 17 600000 1200000
18 800000 131300 18 800000 1313000
19 1008000 137500 19 1008000 1375000
20 >; 20 >;
21 clock-latency = <30000 21 clock-latency = <300000>; /* From legacy driver */
22 22
23 /* cooling options */ 23 /* cooling options */
24 #cooling-cells = <2>; 24 #cooling-cells = <2>; /* min followed by max */
25 }; 25 };
26 }; 26 };
27 27
28 thermal-zones { 28 thermal-zones {
29 #include "omap4-cpu-thermal.dt 29 #include "omap4-cpu-thermal.dtsi"
30 }; 30 };
31 31
32 ocp { 32 ocp {
33 /* 4430 has only gpio_86 tshut 33 /* 4430 has only gpio_86 tshut and no talert interrupt */
34 bandgap: bandgap@4a002260 { 34 bandgap: bandgap@4a002260 {
35 reg = <0x4a002260 0x4 35 reg = <0x4a002260 0x4
36 0x4a00232C 0x4> 36 0x4a00232C 0x4>;
37 compatible = "ti,omap4 37 compatible = "ti,omap4430-bandgap";
38 gpios = <&gpio3 22 GPI 38 gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
39 39
40 #thermal-sensor-cells 40 #thermal-sensor-cells = <0>;
41 }; 41 };
42 }; 42 };
43 43
44 ocp { 44 ocp {
45 abb_mpu: regulator-abb-mpu { 45 abb_mpu: regulator-abb-mpu {
46 status = "okay"; 46 status = "okay";
47 47
48 reg = <0x4a307bd0 0x8> 48 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>;
49 reg-names = "base-addr 49 reg-names = "base-address", "int-address";
50 50
51 ti,abb_info = < 51 ti,abb_info = <
52 /*uV ABB 52 /*uV ABB efuse rbb_m fbb_m vset_m*/
53 1025000 0 53 1025000 0 0 0 0 0
54 1200000 0 54 1200000 0 0 0 0 0
55 1313000 0 55 1313000 0 0 0 0 0
56 1375000 1 56 1375000 1 0 0 0 0
57 1389000 1 57 1389000 1 0 0 0 0
58 >; 58 >;
59 }; 59 };
60 60
61 /* Default unused, just provid 61 /* Default unused, just provide register info for record */
62 abb_iva: regulator-abb-iva { 62 abb_iva: regulator-abb-iva {
63 reg = <0x4a307bd8 0x8> 63 reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>;
64 reg-names = "base-addr 64 reg-names = "base-address", "int-address";
65 }; 65 };
66 66
67 }; 67 };
68 68
69 }; 69 };
70 70
71 &cpu_thermal { 71 &cpu_thermal {
72 thermal-sensors = <&bandgap>; 72 thermal-sensors = <&bandgap>;
73 coefficients = <0 20000>; 73 coefficients = <0 20000>;
74 }; 74 };
75 75
76 /include/ "omap443x-clocks.dtsi" 76 /include/ "omap443x-clocks.dtsi"
77 77
78 /* 78 /*
79 * Use dpll_per for sgx at 307.2MHz like droid 79 * Use dpll_per for sgx at 307.2MHz like droid4 stock v3.0.8 Android kernel
80 */ 80 */
81 &sgx_module { 81 &sgx_module {
82 assigned-clocks = <&l3_gfx_clkctrl OMA 82 assigned-clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 24>,
83 <&dpll_per_m7x2_ck>; 83 <&dpll_per_m7x2_ck>;
84 assigned-clock-rates = <0>, <307200000 84 assigned-clock-rates = <0>, <307200000>;
85 assigned-clock-parents = <&dpll_per_m7 85 assigned-clock-parents = <&dpll_per_m7x2_ck>;
86 }; 86 };
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