1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * wm8650.dtsi - Device tree file for Wonderme 3 * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
4 * 4 *
5 * Copyright (C) 2012 Tony Prisk <linux@priskte 5 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
6 */ 6 */
7 7
8 / { 8 / {
9 #address-cells = <1>; 9 #address-cells = <1>;
10 #size-cells = <1>; 10 #size-cells = <1>;
11 compatible = "wm,wm8650"; 11 compatible = "wm,wm8650";
12 12
13 cpus { 13 cpus {
14 #address-cells = <0>; 14 #address-cells = <0>;
15 #size-cells = <0>; 15 #size-cells = <0>;
16 16
17 cpu { 17 cpu {
18 device_type = "cpu"; 18 device_type = "cpu";
19 compatible = "arm,arm9 19 compatible = "arm,arm926ej-s";
20 }; 20 };
21 }; 21 };
22 22
23 memory { 23 memory {
24 device_type = "memory"; 24 device_type = "memory";
25 reg = <0x0 0x0>; 25 reg = <0x0 0x0>;
26 }; 26 };
27 27
28 aliases { 28 aliases {
29 serial0 = &uart0; 29 serial0 = &uart0;
30 serial1 = &uart1; 30 serial1 = &uart1;
31 }; 31 };
32 32
33 soc { 33 soc {
34 #address-cells = <1>; 34 #address-cells = <1>;
35 #size-cells = <1>; 35 #size-cells = <1>;
36 compatible = "simple-bus"; 36 compatible = "simple-bus";
37 ranges; 37 ranges;
38 interrupt-parent = <&intc0>; 38 interrupt-parent = <&intc0>;
39 39
40 intc0: interrupt-controller@d8 40 intc0: interrupt-controller@d8140000 {
41 compatible = "via,vt85 41 compatible = "via,vt8500-intc";
42 interrupt-controller; 42 interrupt-controller;
43 reg = <0xd8140000 0x10 43 reg = <0xd8140000 0x10000>;
44 #interrupt-cells = <1> 44 #interrupt-cells = <1>;
45 }; 45 };
46 46
47 /* Secondary IC cascaded to in 47 /* Secondary IC cascaded to intc0 */
48 intc1: interrupt-controller@d8 48 intc1: interrupt-controller@d8150000 {
49 compatible = "via,vt85 49 compatible = "via,vt8500-intc";
50 interrupt-controller; 50 interrupt-controller;
51 #interrupt-cells = <1> 51 #interrupt-cells = <1>;
52 reg = <0xD8150000 0x10 52 reg = <0xD8150000 0x10000>;
53 interrupts = <56 57 58 53 interrupts = <56 57 58 59 60 61 62 63>;
54 }; 54 };
55 55
56 pinctrl: pinctrl@d8110000 { 56 pinctrl: pinctrl@d8110000 {
57 compatible = "wm,wm865 57 compatible = "wm,wm8650-pinctrl";
58 reg = <0xd8110000 0x10 58 reg = <0xd8110000 0x10000>;
59 interrupt-controller; 59 interrupt-controller;
60 #interrupt-cells = <2> 60 #interrupt-cells = <2>;
61 gpio-controller; 61 gpio-controller;
62 #gpio-cells = <2>; 62 #gpio-cells = <2>;
63 }; 63 };
64 64
65 pmc@d8130000 { 65 pmc@d8130000 {
66 compatible = "via,vt85 66 compatible = "via,vt8500-pmc";
67 reg = <0xd8130000 0x10 67 reg = <0xd8130000 0x1000>;
68 68
69 clocks { 69 clocks {
70 #address-cells 70 #address-cells = <1>;
71 #size-cells = 71 #size-cells = <0>;
72 72
73 ref25: ref25M 73 ref25: ref25M {
74 #clock 74 #clock-cells = <0>;
75 compat 75 compatible = "fixed-clock";
76 clock- 76 clock-frequency = <25000000>;
77 }; 77 };
78 78
79 ref24: ref24M 79 ref24: ref24M {
80 #clock 80 #clock-cells = <0>;
81 compat 81 compatible = "fixed-clock";
82 clock- 82 clock-frequency = <24000000>;
83 }; 83 };
84 84
85 plla: plla { 85 plla: plla {
86 #clock 86 #clock-cells = <0>;
87 compat 87 compatible = "wm,wm8650-pll-clock";
88 clocks 88 clocks = <&ref25>;
89 reg = 89 reg = <0x200>;
90 }; 90 };
91 91
92 pllb: pllb { 92 pllb: pllb {
93 #clock 93 #clock-cells = <0>;
94 compat 94 compatible = "wm,wm8650-pll-clock";
95 clocks 95 clocks = <&ref25>;
96 reg = 96 reg = <0x204>;
97 }; 97 };
98 98
99 pllc: pllc { 99 pllc: pllc {
100 #clock 100 #clock-cells = <0>;
101 compat 101 compatible = "wm,wm8650-pll-clock";
102 clocks 102 clocks = <&ref25>;
103 reg = 103 reg = <0x208>;
104 }; 104 };
105 105
106 plld: plld { 106 plld: plld {
107 #clock 107 #clock-cells = <0>;
108 compat 108 compatible = "wm,wm8650-pll-clock";
109 clocks 109 clocks = <&ref25>;
110 reg = 110 reg = <0x20c>;
111 }; 111 };
112 112
113 plle: plle { 113 plle: plle {
114 #clock 114 #clock-cells = <0>;
115 compat 115 compatible = "wm,wm8650-pll-clock";
116 clocks 116 clocks = <&ref25>;
117 reg = 117 reg = <0x210>;
118 }; 118 };
119 119
120 clkarm: arm { 120 clkarm: arm {
121 #clock 121 #clock-cells = <0>;
122 compat 122 compatible = "via,vt8500-device-clock";
123 clocks 123 clocks = <&plla>;
124 diviso 124 divisor-reg = <0x300>;
125 }; 125 };
126 126
127 clkahb: ahb { 127 clkahb: ahb {
128 #clock 128 #clock-cells = <0>;
129 compat 129 compatible = "via,vt8500-device-clock";
130 clocks 130 clocks = <&pllb>;
131 diviso 131 divisor-reg = <0x304>;
132 }; 132 };
133 133
134 clkapb: apb { 134 clkapb: apb {
135 #clock 135 #clock-cells = <0>;
136 compat 136 compatible = "via,vt8500-device-clock";
137 clocks 137 clocks = <&pllb>;
138 diviso 138 divisor-reg = <0x320>;
139 }; 139 };
140 140
141 clkddr: ddr { 141 clkddr: ddr {
142 #clock 142 #clock-cells = <0>;
143 compat 143 compatible = "via,vt8500-device-clock";
144 clocks 144 clocks = <&plld>;
145 diviso 145 divisor-reg = <0x310>;
146 }; 146 };
147 147
148 clkuart0: uart 148 clkuart0: uart0 {
149 #clock 149 #clock-cells = <0>;
150 compat 150 compatible = "via,vt8500-device-clock";
151 clocks 151 clocks = <&ref24>;
152 enable 152 enable-reg = <0x250>;
153 enable 153 enable-bit = <1>;
154 }; 154 };
155 155
156 clkuart1: uart 156 clkuart1: uart1 {
157 #clock 157 #clock-cells = <0>;
158 compat 158 compatible = "via,vt8500-device-clock";
159 clocks 159 clocks = <&ref24>;
160 enable 160 enable-reg = <0x250>;
161 enable 161 enable-bit = <2>;
162 }; 162 };
163 163
164 clksdhc: sdhc 164 clksdhc: sdhc {
165 #clock 165 #clock-cells = <0>;
166 compat 166 compatible = "via,vt8500-device-clock";
167 clocks 167 clocks = <&pllb>;
168 diviso 168 divisor-reg = <0x328>;
169 diviso 169 divisor-mask = <0x3f>;
170 enable 170 enable-reg = <0x254>;
171 enable 171 enable-bit = <18>;
172 }; 172 };
173 }; 173 };
174 }; 174 };
175 175
176 timer@d8130100 { 176 timer@d8130100 {
177 compatible = "via,vt85 177 compatible = "via,vt8500-timer";
178 reg = <0xd8130100 0x28 178 reg = <0xd8130100 0x28>;
179 interrupts = <36>; 179 interrupts = <36>;
180 }; 180 };
181 181
182 ehci@d8007900 { 182 ehci@d8007900 {
183 compatible = "via,vt85 183 compatible = "via,vt8500-ehci";
184 reg = <0xd8007900 0x20 184 reg = <0xd8007900 0x200>;
185 interrupts = <43>; 185 interrupts = <43>;
186 }; 186 };
187 187
188 usb@d8007b00 { !! 188 uhci@d8007b00 {
189 compatible = "platform 189 compatible = "platform-uhci";
190 reg = <0xd8007b00 0x20 190 reg = <0xd8007b00 0x200>;
191 interrupts = <43>; 191 interrupts = <43>;
192 }; 192 };
193 193
194 sdhc@d800a000 { 194 sdhc@d800a000 {
195 compatible = "wm,wm850 195 compatible = "wm,wm8505-sdhc";
196 reg = <0xd800a000 0x40 196 reg = <0xd800a000 0x400>;
197 interrupts = <20>, <21 197 interrupts = <20>, <21>;
198 clocks = <&clksdhc>; 198 clocks = <&clksdhc>;
199 bus-width = <4>; 199 bus-width = <4>;
200 sdon-inverted; 200 sdon-inverted;
201 }; 201 };
202 202
203 fb: fb@d8050800 { 203 fb: fb@d8050800 {
204 compatible = "wm,wm850 204 compatible = "wm,wm8505-fb";
205 reg = <0xd8050800 0x20 205 reg = <0xd8050800 0x200>;
206 }; 206 };
207 207
208 ge_rops@d8050400 { 208 ge_rops@d8050400 {
209 compatible = "wm,prizm 209 compatible = "wm,prizm-ge-rops";
210 reg = <0xd8050400 0x10 210 reg = <0xd8050400 0x100>;
211 }; 211 };
212 212
213 uart0: serial@d8200000 { 213 uart0: serial@d8200000 {
214 compatible = "via,vt85 214 compatible = "via,vt8500-uart";
215 reg = <0xd8200000 0x10 215 reg = <0xd8200000 0x1040>;
216 interrupts = <32>; 216 interrupts = <32>;
217 clocks = <&clkuart0>; 217 clocks = <&clkuart0>;
218 status = "disabled"; 218 status = "disabled";
219 }; 219 };
220 220
221 uart1: serial@d82b0000 { 221 uart1: serial@d82b0000 {
222 compatible = "via,vt85 222 compatible = "via,vt8500-uart";
223 reg = <0xd82b0000 0x10 223 reg = <0xd82b0000 0x1040>;
224 interrupts = <33>; 224 interrupts = <33>;
225 clocks = <&clkuart1>; 225 clocks = <&clkuart1>;
226 status = "disabled"; 226 status = "disabled";
227 }; 227 };
228 228
229 rtc@d8100000 { 229 rtc@d8100000 {
230 compatible = "via,vt85 230 compatible = "via,vt8500-rtc";
231 reg = <0xd8100000 0x10 231 reg = <0xd8100000 0x10000>;
232 interrupts = <48>; 232 interrupts = <48>;
233 }; 233 };
234 234
235 ethernet@d8004000 { 235 ethernet@d8004000 {
236 compatible = "via,vt85 236 compatible = "via,vt8500-rhine";
237 reg = <0xd8004000 0x10 237 reg = <0xd8004000 0x100>;
238 interrupts = <10>; 238 interrupts = <10>;
239 }; 239 };
240 }; 240 };
241 }; 241 };
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