1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /* 2 /*
3 * Xilinx ZC770 XM011 board DTS 3 * Xilinx ZC770 XM011 board DTS
4 * 4 *
5 * Copyright (C) 2013-2018 Xilinx, Inc. 5 * Copyright (C) 2013-2018 Xilinx, Inc.
6 */ 6 */
7 /dts-v1/; 7 /dts-v1/;
8 #include "zynq-7000.dtsi" 8 #include "zynq-7000.dtsi"
9 9
10 / { 10 / {
11 model = "Xilinx ZC770 XM011 board"; 11 model = "Xilinx ZC770 XM011 board";
12 compatible = "xlnx,zynq-zc770-xm011", 12 compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
13 13
14 aliases { 14 aliases {
15 i2c0 = &i2c1; 15 i2c0 = &i2c1;
16 serial0 = &uart1; 16 serial0 = &uart1;
17 spi0 = &spi0; 17 spi0 = &spi0;
18 }; 18 };
19 19
20 chosen { 20 chosen {
21 bootargs = ""; 21 bootargs = "";
22 stdout-path = "serial0:115200n 22 stdout-path = "serial0:115200n8";
23 }; 23 };
24 24
25 memory@0 { 25 memory@0 {
26 device_type = "memory"; 26 device_type = "memory";
27 reg = <0x0 0x40000000>; 27 reg = <0x0 0x40000000>;
28 }; 28 };
29 29
30 usb_phy1: phy1 { 30 usb_phy1: phy1 {
31 compatible = "usb-nop-xceiv"; 31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>; 32 #phy-cells = <0>;
33 }; 33 };
34 }; 34 };
35 35
36 &can0 { 36 &can0 {
37 status = "okay"; 37 status = "okay";
38 }; 38 };
39 39
40 &i2c1 { 40 &i2c1 {
41 status = "okay"; 41 status = "okay";
42 clock-frequency = <400000>; 42 clock-frequency = <400000>;
43 43
44 eeprom: eeprom@52 { 44 eeprom: eeprom@52 {
45 compatible = "atmel,24c02"; 45 compatible = "atmel,24c02";
46 reg = <0x52>; 46 reg = <0x52>;
47 }; 47 };
48 }; 48 };
49 49
50 &spi0 { 50 &spi0 {
51 status = "okay"; 51 status = "okay";
52 num-cs = <4>; 52 num-cs = <4>;
53 is-decoded-cs = <0>; 53 is-decoded-cs = <0>;
54 }; 54 };
55 55
56 &uart1 { 56 &uart1 {
57 status = "okay"; 57 status = "okay";
58 }; 58 };
59 59
60 &usb1 { 60 &usb1 {
61 status = "okay"; 61 status = "okay";
62 dr_mode = "host"; 62 dr_mode = "host";
63 usb-phy = <&usb_phy1>; 63 usb-phy = <&usb_phy1>;
64 }; 64 };
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