Linux/scripts/dtc/include-prefixes/arm64/allwinner/sun50i-h5.dtsi

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) !! 1 /* 2 // Copyright (C) 2016 ARM Ltd. !! 2 * Copyright (C) 2016 ARM Ltd. >> 3 * >> 4 * This file is dual-licensed: you can use it either under the terms >> 5 * of the GPL or the X11 license, at your option. Note that this dual >> 6 * licensing only applies to this file, and not this project as a >> 7 * whole. >> 8 * >> 9 * a) This file is free software; you can redistribute it and/or >> 10 * modify it under the terms of the GNU General Public License as >> 11 * published by the Free Software Foundation; either version 2 of the >> 12 * License, or (at your option) any later version. >> 13 * >> 14 * This file is distributed in the hope that it will be useful, >> 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of >> 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> 17 * GNU General Public License for more details. >> 18 * >> 19 * Or, alternatively, >> 20 * >> 21 * b) Permission is hereby granted, free of charge, to any person >> 22 * obtaining a copy of this software and associated documentation >> 23 * files (the "Software"), to deal in the Software without >> 24 * restriction, including without limitation the rights to use, >> 25 * copy, modify, merge, publish, distribute, sublicense, and/or >> 26 * sell copies of the Software, and to permit persons to whom the >> 27 * Software is furnished to do so, subject to the following >> 28 * conditions: >> 29 * >> 30 * The above copyright notice and this permission notice shall be >> 31 * included in all copies or substantial portions of the Software. >> 32 * >> 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, >> 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES >> 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND >> 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT >> 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, >> 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR >> 40 * OTHER DEALINGS IN THE SOFTWARE. >> 41 */ 3 42 4 #include <arm/allwinner/sunxi-h3-h5.dtsi> !! 43 #include <arm/sunxi-h3-h5.dtsi> 5 << 6 #include <dt-bindings/thermal/thermal.h> << 7 44 8 / { 45 / { 9 cpus { 46 cpus { 10 #address-cells = <1>; 47 #address-cells = <1>; 11 #size-cells = <0>; 48 #size-cells = <0>; 12 49 13 cpu0: cpu@0 { !! 50 cpu@0 { 14 compatible = "arm,cort !! 51 compatible = "arm,cortex-a53", "arm,armv8"; 15 device_type = "cpu"; 52 device_type = "cpu"; 16 reg = <0>; 53 reg = <0>; 17 enable-method = "psci" 54 enable-method = "psci"; 18 clocks = <&ccu CLK_CPU << 19 clock-latency-ns = <24 << 20 #cooling-cells = <2>; << 21 }; 55 }; 22 56 23 cpu1: cpu@1 { !! 57 cpu@1 { 24 compatible = "arm,cort !! 58 compatible = "arm,cortex-a53", "arm,armv8"; 25 device_type = "cpu"; 59 device_type = "cpu"; 26 reg = <1>; 60 reg = <1>; 27 enable-method = "psci" 61 enable-method = "psci"; 28 clocks = <&ccu CLK_CPU << 29 clock-latency-ns = <24 << 30 #cooling-cells = <2>; << 31 }; 62 }; 32 63 33 cpu2: cpu@2 { !! 64 cpu@2 { 34 compatible = "arm,cort !! 65 compatible = "arm,cortex-a53", "arm,armv8"; 35 device_type = "cpu"; 66 device_type = "cpu"; 36 reg = <2>; 67 reg = <2>; 37 enable-method = "psci" 68 enable-method = "psci"; 38 clocks = <&ccu CLK_CPU << 39 clock-latency-ns = <24 << 40 #cooling-cells = <2>; << 41 }; 69 }; 42 70 43 cpu3: cpu@3 { !! 71 cpu@3 { 44 compatible = "arm,cort !! 72 compatible = "arm,cortex-a53", "arm,armv8"; 45 device_type = "cpu"; 73 device_type = "cpu"; 46 reg = <3>; 74 reg = <3>; 47 enable-method = "psci" 75 enable-method = "psci"; 48 clocks = <&ccu CLK_CPU << 49 clock-latency-ns = <24 << 50 #cooling-cells = <2>; << 51 }; 76 }; 52 }; 77 }; 53 78 54 pmu { << 55 compatible = "arm,cortex-a53-p << 56 interrupts = <GIC_SPI 116 IRQ_ << 57 <GIC_SPI 117 IRQ_ << 58 <GIC_SPI 118 IRQ_ << 59 <GIC_SPI 119 IRQ_ << 60 interrupt-affinity = <&cpu0>, << 61 }; << 62 << 63 psci { 79 psci { 64 compatible = "arm,psci-0.2"; 80 compatible = "arm,psci-0.2"; 65 method = "smc"; 81 method = "smc"; 66 }; 82 }; 67 83 68 timer { 84 timer { 69 compatible = "arm,armv8-timer" 85 compatible = "arm,armv8-timer"; 70 arm,no-tick-in-suspend; << 71 interrupts = <GIC_PPI 13 86 interrupts = <GIC_PPI 13 72 (GIC_CPU_MASK_ 87 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 73 <GIC_PPI 14 88 <GIC_PPI 14 74 (GIC_CPU_MASK_ 89 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 75 <GIC_PPI 11 90 <GIC_PPI 11 76 (GIC_CPU_MASK_ 91 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 77 <GIC_PPI 10 92 <GIC_PPI 10 78 (GIC_CPU_MASK_ 93 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 79 }; 94 }; 80 << 81 soc { << 82 syscon: system-control@1c00000 << 83 compatible = "allwinne << 84 reg = <0x01c00000 0x10 << 85 #address-cells = <1>; << 86 #size-cells = <1>; << 87 ranges; << 88 << 89 sram_c1: sram@18000 { << 90 compatible = " << 91 reg = <0x00018 << 92 #address-cells << 93 #size-cells = << 94 ranges = <0 0x << 95 << 96 ve_sram: sram- << 97 compat << 98 << 99 reg = << 100 }; << 101 }; << 102 }; << 103 << 104 video-codec@1c0e000 { << 105 compatible = "allwinne << 106 reg = <0x01c0e000 0x10 << 107 clocks = <&ccu CLK_BUS << 108 <&ccu CLK_DRA << 109 clock-names = "ahb", " << 110 resets = <&ccu RST_BUS << 111 interrupts = <GIC_SPI << 112 allwinner,sram = <&ve_ << 113 }; << 114 << 115 crypto: crypto@1c15000 { << 116 compatible = "allwinne << 117 reg = <0x01c15000 0x10 << 118 interrupts = <GIC_SPI << 119 clocks = <&ccu CLK_BUS << 120 clock-names = "bus", " << 121 resets = <&ccu RST_BUS << 122 }; << 123 << 124 deinterlace: deinterlace@1e000 << 125 compatible = "allwinne << 126 reg = <0x01e00000 0x20 << 127 clocks = <&ccu CLK_BUS << 128 <&ccu CLK_DEI << 129 <&ccu CLK_DRA << 130 clock-names = "bus", " << 131 resets = <&ccu RST_BUS << 132 interrupts = <GIC_SPI << 133 interconnects = <&mbus << 134 interconnect-names = " << 135 }; << 136 << 137 mali: gpu@1e80000 { << 138 compatible = "allwinne << 139 reg = <0x01e80000 0x30 << 140 /* << 141 * While the datasheet << 142 * PMU, the actual sil << 143 * block. Reads all re << 144 * ignored. << 145 */ << 146 interrupts = <GIC_SPI << 147 <GIC_SPI << 148 <GIC_SPI << 149 <GIC_SPI << 150 <GIC_SPI << 151 <GIC_SPI << 152 <GIC_SPI << 153 <GIC_SPI << 154 <GIC_SPI << 155 <GIC_SPI << 156 <GIC_SPI << 157 interrupt-names = "gp" << 158 "gpm << 159 "pp" << 160 "pp0 << 161 "ppm << 162 "pp1 << 163 "ppm << 164 "pp2 << 165 "ppm << 166 "pp3 << 167 "ppm << 168 clocks = <&ccu CLK_BUS << 169 clock-names = "bus", " << 170 resets = <&ccu RST_BUS << 171 << 172 assigned-clocks = <&cc << 173 assigned-clock-rates = << 174 }; << 175 << 176 ths: thermal-sensor@1c25000 { << 177 compatible = "allwinne << 178 reg = <0x01c25000 0x40 << 179 interrupts = <GIC_SPI << 180 resets = <&ccu RST_BUS << 181 clocks = <&ccu CLK_BUS << 182 clock-names = "bus", " << 183 nvmem-cells = <&ths_ca << 184 nvmem-cell-names = "ca << 185 #thermal-sensor-cells << 186 }; << 187 }; << 188 << 189 thermal-zones { << 190 cpu_thermal: cpu-thermal { << 191 polling-delay-passive << 192 polling-delay = <0>; << 193 thermal-sensors = <&th << 194 << 195 trips { << 196 cpu_hot_trip: << 197 temper << 198 hyster << 199 type = << 200 }; << 201 << 202 cpu_very_hot_t << 203 temper << 204 hyster << 205 type = << 206 }; << 207 }; << 208 << 209 cooling-maps { << 210 cpu-hot-limit << 211 trip = << 212 coolin << 213 << 214 << 215 << 216 }; << 217 }; << 218 }; << 219 << 220 gpu-thermal { << 221 polling-delay-passive << 222 polling-delay = <0>; << 223 thermal-sensors = <&th << 224 }; << 225 }; << 226 }; 95 }; 227 96 228 &ccu { 97 &ccu { 229 compatible = "allwinner,sun50i-h5-ccu" 98 compatible = "allwinner,sun50i-h5-ccu"; 230 }; 99 }; 231 100 232 &display_clocks { 101 &display_clocks { 233 compatible = "allwinner,sun50i-h5-de2- 102 compatible = "allwinner,sun50i-h5-de2-clk"; 234 }; 103 }; 235 104 236 &mbus { << 237 compatible = "allwinner,sun50i-h5-mbus << 238 }; << 239 << 240 &mmc0 { 105 &mmc0 { 241 compatible = "allwinner,sun50i-h5-mmc" 106 compatible = "allwinner,sun50i-h5-mmc", 242 "allwinner,sun50i-a64-mmc 107 "allwinner,sun50i-a64-mmc"; 243 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CL 108 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; 244 clock-names = "ahb", "mmc"; 109 clock-names = "ahb", "mmc"; 245 }; 110 }; 246 111 247 &mmc1 { 112 &mmc1 { 248 compatible = "allwinner,sun50i-h5-mmc" 113 compatible = "allwinner,sun50i-h5-mmc", 249 "allwinner,sun50i-a64-mmc 114 "allwinner,sun50i-a64-mmc"; 250 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CL 115 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; 251 clock-names = "ahb", "mmc"; 116 clock-names = "ahb", "mmc"; 252 }; 117 }; 253 118 254 &mmc2 { 119 &mmc2 { 255 compatible = "allwinner,sun50i-h5-emmc 120 compatible = "allwinner,sun50i-h5-emmc", 256 "allwinner,sun50i-a64-emm 121 "allwinner,sun50i-a64-emmc"; 257 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CL 122 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; 258 clock-names = "ahb", "mmc"; 123 clock-names = "ahb", "mmc"; 259 }; 124 }; 260 125 261 &pio { 126 &pio { 262 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVE 127 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 263 <GIC_SPI 17 IRQ_TYPE_LEVE 128 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 264 <GIC_SPI 23 IRQ_TYPE_LEVE 129 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 265 compatible = "allwinner,sun50i-h5-pinc 130 compatible = "allwinner,sun50i-h5-pinctrl"; 266 }; << 267 << 268 &rtc { << 269 compatible = "allwinner,sun50i-h5-rtc" << 270 }; << 271 << 272 &sid { << 273 compatible = "allwinner,sun50i-h5-sid" << 274 }; 131 };

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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/allwinner/sun50i-h5.dtsi