Linux/scripts/dtc/include-prefixes/arm64/amlogic/amlogic-c3.dtsi

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Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 2 /* 3 * Copyright (c) 2021 Amlogic, Inc. All rights 3 * Copyright (c) 2021 Amlogic, Inc. All rights reserved. 4 */ 4 */ 5 5 6 #include <dt-bindings/interrupt-controller/irq 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/reset/amlogic,c3-reset.h 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clk << 11 #include <dt-bindings/clock/amlogic,c3-scmi-cl << 12 #include <dt-bindings/clock/amlogic,c3-periphe << 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> << 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> << 15 10 16 / { 11 / { 17 cpus { 12 cpus { 18 #address-cells = <2>; 13 #address-cells = <2>; 19 #size-cells = <0>; 14 #size-cells = <0>; 20 15 21 cpu0: cpu@0 { 16 cpu0: cpu@0 { 22 device_type = "cpu"; 17 device_type = "cpu"; 23 compatible = "arm,cort 18 compatible = "arm,cortex-a35"; 24 reg = <0x0 0x0>; 19 reg = <0x0 0x0>; 25 enable-method = "psci" 20 enable-method = "psci"; 26 }; 21 }; 27 22 28 cpu1: cpu@1 { 23 cpu1: cpu@1 { 29 device_type = "cpu"; 24 device_type = "cpu"; 30 compatible = "arm,cort 25 compatible = "arm,cortex-a35"; 31 reg = <0x0 0x1>; 26 reg = <0x0 0x1>; 32 enable-method = "psci" 27 enable-method = "psci"; 33 }; 28 }; 34 }; 29 }; 35 30 36 timer { 31 timer { 37 compatible = "arm,armv8-timer" 32 compatible = "arm,armv8-timer"; 38 interrupts = <GIC_PPI 13 (GIC_ 33 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 39 <GIC_PPI 14 (GIC_ 34 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 40 <GIC_PPI 11 (GIC_ 35 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 41 <GIC_PPI 10 (GIC_ 36 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 42 }; 37 }; 43 38 44 psci { 39 psci { 45 compatible = "arm,psci-1.0"; 40 compatible = "arm,psci-1.0"; 46 method = "smc"; 41 method = "smc"; 47 }; 42 }; 48 43 49 xtal: xtal-clk { 44 xtal: xtal-clk { 50 compatible = "fixed-clock"; 45 compatible = "fixed-clock"; 51 clock-frequency = <24000000>; 46 clock-frequency = <24000000>; 52 clock-output-names = "xtal"; 47 clock-output-names = "xtal"; 53 #clock-cells = <0>; 48 #clock-cells = <0>; 54 }; 49 }; 55 50 56 sm: secure-monitor { 51 sm: secure-monitor { 57 compatible = "amlogic,meson-gx 52 compatible = "amlogic,meson-gxbb-sm"; 58 53 59 pwrc: power-controller { 54 pwrc: power-controller { 60 compatible = "amlogic, 55 compatible = "amlogic,c3-pwrc"; 61 #power-domain-cells = 56 #power-domain-cells = <1>; 62 }; 57 }; 63 }; 58 }; 64 59 65 sram@7f50e00 { << 66 compatible = "mmio-sram"; << 67 reg = <0x0 0x07f50e00 0x0 0x10 << 68 #address-cells = <1>; << 69 #size-cells = <1>; << 70 ranges = <0 0x0 0x07f50e00 0x1 << 71 << 72 scmi_shmem: sram@0 { << 73 compatible = "arm,scmi << 74 reg = <0x0 0x100>; << 75 }; << 76 }; << 77 << 78 firmware { << 79 scmi: scmi { << 80 compatible = "arm,scmi << 81 arm,smc-id = <0x820000 << 82 shmem = <&scmi_shmem>; << 83 #address-cells = <1>; << 84 #size-cells = <0>; << 85 << 86 scmi_clk: protocol@14 << 87 reg = <0x14>; << 88 #clock-cells = << 89 }; << 90 }; << 91 }; << 92 << 93 soc { 60 soc { 94 compatible = "simple-bus"; 61 compatible = "simple-bus"; 95 #address-cells = <2>; 62 #address-cells = <2>; 96 #size-cells = <2>; 63 #size-cells = <2>; 97 ranges; 64 ranges; 98 65 99 gic: interrupt-controller@fff0 66 gic: interrupt-controller@fff01000 { 100 compatible = "arm,gic- 67 compatible = "arm,gic-400"; 101 #interrupt-cells = <3> 68 #interrupt-cells = <3>; 102 #address-cells = <0>; 69 #address-cells = <0>; 103 interrupt-controller; 70 interrupt-controller; 104 reg = <0x0 0xfff01000 71 reg = <0x0 0xfff01000 0 0x1000>, 105 <0x0 0xfff02000 72 <0x0 0xfff02000 0 0x2000>, 106 <0x0 0xfff04000 73 <0x0 0xfff04000 0 0x2000>, 107 <0x0 0xfff06000 74 <0x0 0xfff06000 0 0x2000>; 108 interrupts = <GIC_PPI 75 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 109 }; 76 }; 110 77 111 apb4: bus@fe000000 { 78 apb4: bus@fe000000 { 112 compatible = "simple-b 79 compatible = "simple-bus"; 113 reg = <0x0 0xfe000000 80 reg = <0x0 0xfe000000 0x0 0x480000>; 114 #address-cells = <2>; 81 #address-cells = <2>; 115 #size-cells = <2>; 82 #size-cells = <2>; 116 ranges = <0x0 0x0 0x0 83 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; 117 84 118 clkc_periphs: clock-co << 119 compatible = " << 120 reg = <0x0 0x0 << 121 #clock-cells = << 122 clocks = <&xta << 123 <&scm << 124 <&scm << 125 <&clk << 126 <&clk << 127 <&clk << 128 <&clk << 129 <&clk << 130 <&clk << 131 <&clk << 132 <&scm << 133 <&clk << 134 <&scm << 135 <&scm << 136 <&scm << 137 <&scm << 138 clock-names = << 139 << 140 << 141 << 142 << 143 << 144 << 145 << 146 << 147 << 148 << 149 << 150 << 151 << 152 << 153 << 154 }; << 155 << 156 reset: reset-controlle 85 reset: reset-controller@2000 { 157 compatible = " 86 compatible = "amlogic,c3-reset"; 158 reg = <0x0 0x2 87 reg = <0x0 0x2000 0x0 0x98>; 159 #reset-cells = 88 #reset-cells = <1>; 160 }; 89 }; 161 90 162 watchdog@2100 { 91 watchdog@2100 { 163 compatible = " 92 compatible = "amlogic,c3-wdt", "amlogic,t7-wdt"; 164 reg = <0x0 0x2 93 reg = <0x0 0x2100 0x0 0x10>; 165 clocks = <&xta 94 clocks = <&xtal>; 166 }; 95 }; 167 96 168 periphs_pinctrl: pinct 97 periphs_pinctrl: pinctrl@4000 { 169 compatible = " 98 compatible = "amlogic,c3-periphs-pinctrl"; 170 #address-cells 99 #address-cells = <2>; 171 #size-cells = 100 #size-cells = <2>; 172 ranges = <0x0 !! 101 ranges; 173 102 174 gpio: bank@0 { !! 103 gpio: bank@4000 { 175 reg = !! 104 reg = <0x0 0x4000 0x0 0x004c>, 176 !! 105 <0x0 0x4100 0x0 0x01de>; 177 reg-na 106 reg-names = "mux", "gpio"; 178 gpio-c 107 gpio-controller; 179 #gpio- 108 #gpio-cells = <2>; 180 gpio-r 109 gpio-ranges = <&periphs_pinctrl 0 0 55>; 181 }; 110 }; 182 << 183 i2c0_pins1: i2 << 184 mux { << 185 << 186 << 187 << 188 << 189 << 190 }; << 191 }; << 192 << 193 i2c0_pins2: i2 << 194 mux { << 195 << 196 << 197 << 198 << 199 << 200 }; << 201 }; << 202 << 203 i2c1_pins1: i2 << 204 mux { << 205 << 206 << 207 << 208 << 209 << 210 }; << 211 }; << 212 << 213 i2c1_pins2: i2 << 214 mux { << 215 << 216 << 217 << 218 << 219 << 220 }; << 221 }; << 222 << 223 i2c1_pins3: i2 << 224 mux { << 225 << 226 << 227 << 228 << 229 << 230 }; << 231 }; << 232 << 233 i2c1_pins4: i2 << 234 mux { << 235 << 236 << 237 << 238 << 239 << 240 }; << 241 }; << 242 << 243 i2c2_pins1: i2 << 244 mux { << 245 << 246 << 247 << 248 << 249 << 250 }; << 251 }; << 252 << 253 i2c3_pins1: i2 << 254 mux { << 255 << 256 << 257 << 258 << 259 << 260 }; << 261 }; << 262 << 263 i2c3_pins2: i2 << 264 mux { << 265 << 266 << 267 << 268 << 269 << 270 }; << 271 }; << 272 << 273 i2c3_pins3: i2 << 274 mux { << 275 << 276 << 277 << 278 << 279 << 280 }; << 281 }; << 282 << 283 nand_pins: nan << 284 mux { << 285 << 286 << 287 << 288 << 289 << 290 << 291 << 292 << 293 << 294 << 295 << 296 << 297 << 298 << 299 << 300 }; << 301 }; << 302 << 303 sdcard_pins: s << 304 mux { << 305 << 306 << 307 << 308 << 309 << 310 << 311 << 312 << 313 << 314 }; << 315 }; << 316 << 317 sdcard_clk_gat << 318 mux { << 319 << 320 << 321 << 322 << 323 }; << 324 }; << 325 << 326 sdio_m_clk_gat << 327 mux { << 328 << 329 << 330 << 331 << 332 }; << 333 }; << 334 << 335 sdio_m_pins: s << 336 mux { << 337 << 338 << 339 << 340 << 341 << 342 << 343 << 344 << 345 << 346 << 347 }; << 348 }; << 349 << 350 spicc0_pins1: << 351 mux { << 352 << 353 << 354 << 355 << 356 << 357 }; << 358 }; << 359 << 360 spicc0_pins2: << 361 mux { << 362 << 363 << 364 << 365 << 366 << 367 }; << 368 }; << 369 << 370 spicc0_pins3: << 371 mux { << 372 << 373 << 374 << 375 << 376 << 377 }; << 378 }; << 379 << 380 spicc1_pins1: << 381 mux { << 382 << 383 << 384 << 385 << 386 << 387 }; << 388 }; << 389 << 390 spicc1_pins2: << 391 mux { << 392 << 393 << 394 << 395 << 396 << 397 }; << 398 }; << 399 << 400 spifc_pins: sp << 401 mux { << 402 << 403 << 404 << 405 << 406 << 407 << 408 << 409 << 410 << 411 }; << 412 }; << 413 }; 111 }; 414 112 415 gpio_intc: interrupt-c 113 gpio_intc: interrupt-controller@4080 { 416 compatible = " 114 compatible = "amlogic,c3-gpio-intc", "amlogic,meson-gpio-intc"; 417 reg = <0x0 0x4 115 reg = <0x0 0x4080 0x0 0x0020>; 418 interrupt-cont 116 interrupt-controller; 419 #interrupt-cel 117 #interrupt-cells = <2>; 420 amlogic,channe 118 amlogic,channel-interrupts = 421 <10 11 119 <10 11 12 13 14 15 16 17 18 19 20 21>; 422 }; 120 }; 423 121 424 clkc_pll: clock-contro << 425 compatible = " << 426 reg = <0x0 0x8 << 427 #clock-cells = << 428 clocks = <&scm << 429 <&scm << 430 <&scm << 431 clock-names = << 432 << 433 << 434 }; << 435 << 436 eth_phy: mdio-multiple << 437 compatible = " << 438 reg = <0x0 0x2 << 439 << 440 clocks = <&clk << 441 <&xta << 442 <&clk << 443 clock-names = << 444 mdio-parent-bu << 445 #address-cells << 446 #size-cells = << 447 << 448 ext_mdio: mdio << 449 reg = << 450 #addre << 451 #size- << 452 }; << 453 << 454 int_mdio: mdio << 455 reg = << 456 #addre << 457 #size- << 458 << 459 intern << 460 << 461 << 462 << 463 << 464 << 465 }; << 466 }; << 467 }; << 468 << 469 spicc0: spi@50000 { << 470 compatible = " << 471 reg = <0x0 0x5 << 472 interrupts = < << 473 clocks = <&clk << 474 <&clk << 475 clock-names = << 476 #address-cells << 477 #size-cells = << 478 status = "disa << 479 }; << 480 << 481 spicc1: spi@52000 { << 482 compatible = " << 483 reg = <0x0 0x5 << 484 interrupts = < << 485 clocks = <&clk << 486 <&clk << 487 clock-names = << 488 #address-cells << 489 #size-cells = << 490 status = "disa << 491 }; << 492 << 493 spifc: spi@56000 { << 494 compatible = " << 495 reg = <0x0 0x5 << 496 interrupts = < << 497 clocks = <&clk << 498 clock-names = << 499 status = "disa << 500 }; << 501 << 502 i2c0: i2c@66000 { << 503 compatible = " << 504 reg = <0x0 0x6 << 505 interrupts = < << 506 #address-cells << 507 #size-cells = << 508 clocks = <&clk << 509 status = "disa << 510 }; << 511 << 512 i2c1: i2c@68000 { << 513 compatible = " << 514 reg = <0x0 0x6 << 515 interrupts = < << 516 #address-cells << 517 #size-cells = << 518 clocks = <&clk << 519 status = "disa << 520 }; << 521 << 522 i2c2: i2c@6a000 { << 523 compatible = " << 524 reg = <0x0 0x6 << 525 interrupts = < << 526 #address-cells << 527 #size-cells = << 528 clocks = <&clk << 529 status = "disa << 530 }; << 531 << 532 i2c3: i2c@6c000 { << 533 compatible = " << 534 reg = <0x0 0x6 << 535 interrupts = < << 536 #address-cells << 537 #size-cells = << 538 clocks = <&clk << 539 status = "disa << 540 }; << 541 << 542 uart_b: serial@7a000 { 122 uart_b: serial@7a000 { 543 compatible = " 123 compatible = "amlogic,meson-s4-uart", 544 "am 124 "amlogic,meson-ao-uart"; 545 reg = <0x0 0x7 125 reg = <0x0 0x7a000 0x0 0x18>; 546 interrupts = < 126 interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; 547 status = "disa 127 status = "disabled"; 548 clocks = <&xta !! 128 clocks = <&xtal>, <&xtal>, <&xtal>; 549 clock-names = 129 clock-names = "xtal", "pclk", "baud"; 550 }; 130 }; 551 131 552 sec_ao: ao-secure@1022 << 553 compatible = " << 554 " << 555 " << 556 reg = <0x0 0x1 << 557 amlogic,has-ch << 558 }; << 559 << 560 sdio: mmc@88000 { << 561 compatible = " << 562 reg = <0x0 0x8 << 563 interrupts = < << 564 power-domains << 565 clocks = <&clk << 566 <&cl << 567 <&cl << 568 clock-names = << 569 no-mmc; << 570 no-sd; << 571 resets = <&res << 572 status = "disa << 573 }; << 574 << 575 sd: mmc@8a000 { << 576 compatible = " << 577 reg = <0x0 0x8 << 578 interrupts = < << 579 power-domains << 580 clocks = <&clk << 581 <&clkc << 582 <&clkc << 583 clock-names = << 584 no-mmc; << 585 no-sdio; << 586 resets = <&res << 587 status = "disa << 588 }; << 589 << 590 nand: nand-controller@ << 591 compatible = " << 592 reg = <0x0 0x8 << 593 <0x0 0 << 594 reg-names = "n << 595 interrupts = < << 596 clocks = <&clk << 597 <&clkc << 598 clock-names = << 599 status = "disa << 600 }; << 601 }; << 602 << 603 ethmac: ethernet@fdc00000 { << 604 compatible = "amlogic, << 605 "snps,dwm << 606 "snps,dwm << 607 reg = <0x0 0xfdc00000 << 608 <0x0 0xfe024000 << 609 interrupts = <GIC_SPI << 610 interrupt-names = "mac << 611 power-domains = <&pwrc << 612 clocks = <&clkc_periph << 613 <&clkc_pll CL << 614 <&clkc_pll CL << 615 clock-names = "stmmace << 616 rx-fifo-depth = <4096> << 617 tx-fifo-depth = <2048> << 618 status = "disabled"; << 619 << 620 mdio0: mdio { << 621 compatible = " << 622 #address-cells << 623 #size-cells = << 624 }; << 625 }; 132 }; 626 }; 133 }; 627 }; 134 };

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Linux/scripts/dtc/include-prefixes/arm64/amlogic/amlogic-c3.dtsi

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Differences between /scripts/dtc/include-prefixes/arm64/amlogic/amlogic-c3.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/amlogic/amlogic-c3.dtsi (Version linux-6.11.7)

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Differences between /scripts/dtc/include-prefixes/arm64/amlogic/amlogic-c3.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/amlogic/amlogic-c3.dtsi (Version linux-6.11.7)

TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/amlogic/amlogic-c3.dtsi