1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2017 Amlogic, Inc. All rights 3 * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
4 */ 4 */
5 5
6 #include <dt-bindings/clock/axg-aoclkc.h> <<
7 #include <dt-bindings/clock/axg-audio-clkc.h> <<
8 #include <dt-bindings/clock/axg-clkc.h> <<
9 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h> <<
11 #include <dt-bindings/interrupt-controller/irq 7 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm 8 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg- !! 9 #include <dt-bindings/clock/axg-audio-clkc.h>
>> 10 #include <dt-bindings/clock/axg-clkc.h>
>> 11 #include <dt-bindings/clock/axg-aoclkc.h>
>> 12 #include <dt-bindings/gpio/meson-axg-gpio.h>
14 #include <dt-bindings/reset/amlogic,meson-axg- 13 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
15 #include <dt-bindings/power/meson-axg-power.h> <<
16 14
17 / { 15 / {
18 compatible = "amlogic,meson-axg"; 16 compatible = "amlogic,meson-axg";
19 17
20 interrupt-parent = <&gic>; 18 interrupt-parent = <&gic>;
21 #address-cells = <2>; 19 #address-cells = <2>;
22 #size-cells = <2>; 20 #size-cells = <2>;
23 21
24 tdmif_a: audio-controller-0 { !! 22 reserved-memory {
25 compatible = "amlogic,axg-tdm- !! 23 #address-cells = <2>;
26 #sound-dai-cells = <0>; !! 24 #size-cells = <2>;
27 sound-name-prefix = "TDM_A"; !! 25 ranges;
28 clocks = <&clkc_audio AUD_CLKI <<
29 <&clkc_audio AUD_CLKI <<
30 <&clkc_audio AUD_CLKI <<
31 clock-names = "sclk", "lrclk", <<
32 status = "disabled"; <<
33 }; <<
34 <<
35 tdmif_b: audio-controller-1 { <<
36 compatible = "amlogic,axg-tdm- <<
37 #sound-dai-cells = <0>; <<
38 sound-name-prefix = "TDM_B"; <<
39 clocks = <&clkc_audio AUD_CLKI <<
40 <&clkc_audio AUD_CLKI <<
41 <&clkc_audio AUD_CLKI <<
42 clock-names = "sclk", "lrclk", <<
43 status = "disabled"; <<
44 }; <<
45 26
46 tdmif_c: audio-controller-2 { !! 27 /* 16 MiB reserved for Hardware ROM Firmware */
47 compatible = "amlogic,axg-tdm- !! 28 hwrom_reserved: hwrom@0 {
48 #sound-dai-cells = <0>; !! 29 reg = <0x0 0x0 0x0 0x1000000>;
49 sound-name-prefix = "TDM_C"; !! 30 no-map;
50 clocks = <&clkc_audio AUD_CLKI !! 31 };
51 <&clkc_audio AUD_CLKI <<
52 <&clkc_audio AUD_CLKI <<
53 clock-names = "sclk", "lrclk", <<
54 status = "disabled"; <<
55 }; <<
56 32
57 arm-pmu { !! 33 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
58 compatible = "arm,cortex-a53-p !! 34 secmon_reserved: secmon@5000000 {
59 interrupts = <GIC_SPI 137 IRQ_ !! 35 reg = <0x0 0x05000000 0x0 0x300000>;
60 <GIC_SPI 138 IRQ_ !! 36 no-map;
61 <GIC_SPI 153 IRQ_ !! 37 };
62 <GIC_SPI 154 IRQ_ <<
63 interrupt-affinity = <&cpu0>, <<
64 }; 38 };
65 39
66 cpus { 40 cpus {
67 #address-cells = <0x2>; 41 #address-cells = <0x2>;
68 #size-cells = <0x0>; 42 #size-cells = <0x0>;
69 43
70 cpu0: cpu@0 { 44 cpu0: cpu@0 {
71 device_type = "cpu"; 45 device_type = "cpu";
72 compatible = "arm,cort !! 46 compatible = "arm,cortex-a53", "arm,armv8";
73 reg = <0x0 0x0>; 47 reg = <0x0 0x0>;
74 enable-method = "psci" 48 enable-method = "psci";
75 next-level-cache = <&l 49 next-level-cache = <&l2>;
76 clocks = <&scpi_dvfs 0 50 clocks = <&scpi_dvfs 0>;
77 dynamic-power-coeffici <<
78 #cooling-cells = <2>; <<
79 }; 51 };
80 52
81 cpu1: cpu@1 { 53 cpu1: cpu@1 {
82 device_type = "cpu"; 54 device_type = "cpu";
83 compatible = "arm,cort !! 55 compatible = "arm,cortex-a53", "arm,armv8";
84 reg = <0x0 0x1>; 56 reg = <0x0 0x1>;
85 enable-method = "psci" 57 enable-method = "psci";
86 next-level-cache = <&l 58 next-level-cache = <&l2>;
87 clocks = <&scpi_dvfs 0 59 clocks = <&scpi_dvfs 0>;
88 dynamic-power-coeffici <<
89 #cooling-cells = <2>; <<
90 }; 60 };
91 61
92 cpu2: cpu@2 { 62 cpu2: cpu@2 {
93 device_type = "cpu"; 63 device_type = "cpu";
94 compatible = "arm,cort !! 64 compatible = "arm,cortex-a53", "arm,armv8";
95 reg = <0x0 0x2>; 65 reg = <0x0 0x2>;
96 enable-method = "psci" 66 enable-method = "psci";
97 next-level-cache = <&l 67 next-level-cache = <&l2>;
98 clocks = <&scpi_dvfs 0 68 clocks = <&scpi_dvfs 0>;
99 dynamic-power-coeffici <<
100 #cooling-cells = <2>; <<
101 }; 69 };
102 70
103 cpu3: cpu@3 { 71 cpu3: cpu@3 {
104 device_type = "cpu"; 72 device_type = "cpu";
105 compatible = "arm,cort !! 73 compatible = "arm,cortex-a53", "arm,armv8";
106 reg = <0x0 0x3>; 74 reg = <0x0 0x3>;
107 enable-method = "psci" 75 enable-method = "psci";
108 next-level-cache = <&l 76 next-level-cache = <&l2>;
109 clocks = <&scpi_dvfs 0 77 clocks = <&scpi_dvfs 0>;
110 dynamic-power-coeffici <<
111 #cooling-cells = <2>; <<
112 }; 78 };
113 79
114 l2: l2-cache0 { 80 l2: l2-cache0 {
115 compatible = "cache"; 81 compatible = "cache";
116 cache-level = <2>; <<
117 cache-unified; <<
118 }; 82 };
119 }; 83 };
120 84
121 sm: secure-monitor { !! 85 arm-pmu {
122 compatible = "amlogic,meson-gx !! 86 compatible = "arm,cortex-a53-pmu";
123 }; !! 87 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
124 !! 88 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
125 efuse: efuse { !! 89 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
126 compatible = "amlogic,meson-gx !! 90 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
127 clocks = <&clkc CLKID_EFUSE>; !! 91 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
128 #address-cells = <1>; <<
129 #size-cells = <1>; <<
130 read-only; <<
131 secure-monitor = <&sm>; <<
132 }; 92 };
133 93
134 psci { 94 psci {
135 compatible = "arm,psci-1.0"; 95 compatible = "arm,psci-1.0";
136 method = "smc"; 96 method = "smc";
137 }; 97 };
138 98
139 reserved-memory { !! 99 tdmif_a: audio-controller@0 {
140 #address-cells = <2>; !! 100 compatible = "amlogic,axg-tdm-iface";
141 #size-cells = <2>; !! 101 #sound-dai-cells = <0>;
142 ranges; !! 102 sound-name-prefix = "TDM_A";
>> 103 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
>> 104 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
>> 105 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
>> 106 clock-names = "mclk", "sclk", "lrclk";
>> 107 status = "disabled";
>> 108 };
143 109
144 /* 16 MiB reserved for Hardwar !! 110 tdmif_b: audio-controller@1 {
145 hwrom_reserved: hwrom@0 { !! 111 compatible = "amlogic,axg-tdm-iface";
146 reg = <0x0 0x0 0x0 0x1 !! 112 #sound-dai-cells = <0>;
147 no-map; !! 113 sound-name-prefix = "TDM_B";
148 }; !! 114 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
>> 115 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
>> 116 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
>> 117 clock-names = "mclk", "sclk", "lrclk";
>> 118 status = "disabled";
>> 119 };
149 120
150 /* Alternate 3 MiB reserved fo !! 121 tdmif_c: audio-controller@2 {
151 secmon_reserved: secmon@500000 !! 122 compatible = "amlogic,axg-tdm-iface";
152 reg = <0x0 0x05000000 !! 123 #sound-dai-cells = <0>;
153 no-map; !! 124 sound-name-prefix = "TDM_C";
154 }; !! 125 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
>> 126 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
>> 127 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
>> 128 clock-names = "mclk", "sclk", "lrclk";
>> 129 status = "disabled";
>> 130 };
>> 131
>> 132 timer {
>> 133 compatible = "arm,armv8-timer";
>> 134 interrupts = <GIC_PPI 13
>> 135 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
>> 136 <GIC_PPI 14
>> 137 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
>> 138 <GIC_PPI 11
>> 139 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
>> 140 <GIC_PPI 10
>> 141 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
>> 142 };
>> 143
>> 144 xtal: xtal-clk {
>> 145 compatible = "fixed-clock";
>> 146 clock-frequency = <24000000>;
>> 147 clock-output-names = "xtal";
>> 148 #clock-cells = <0>;
>> 149 };
>> 150
>> 151 ao_alt_xtal: ao_alt_xtal-clk {
>> 152 compatible = "fixed-clock";
>> 153 clock-frequency = <32000000>;
>> 154 clock-output-names = "ao_alt_xtal";
>> 155 #clock-cells = <0>;
155 }; 156 };
156 157
157 scpi { 158 scpi {
158 compatible = "arm,scpi-pre-1.0 159 compatible = "arm,scpi-pre-1.0";
159 mboxes = <&mailbox 1 &mailbox 160 mboxes = <&mailbox 1 &mailbox 2>;
160 shmem = <&cpu_scp_lpri &cpu_sc 161 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
161 162
162 scpi_clocks: clocks { 163 scpi_clocks: clocks {
163 compatible = "arm,scpi 164 compatible = "arm,scpi-clocks";
164 165
165 scpi_dvfs: clocks-0 { 166 scpi_dvfs: clocks-0 {
166 compatible = " 167 compatible = "arm,scpi-dvfs-clocks";
167 #clock-cells = 168 #clock-cells = <1>;
168 clock-indices 169 clock-indices = <0>;
169 clock-output-n 170 clock-output-names = "vcpu";
170 }; 171 };
171 }; 172 };
172 173
173 scpi_sensors: sensors { 174 scpi_sensors: sensors {
174 compatible = "amlogic, 175 compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
175 #thermal-sensor-cells 176 #thermal-sensor-cells = <1>;
176 }; 177 };
177 }; 178 };
178 179
179 soc { 180 soc {
180 compatible = "simple-bus"; 181 compatible = "simple-bus";
181 #address-cells = <2>; 182 #address-cells = <2>;
182 #size-cells = <2>; 183 #size-cells = <2>;
183 ranges; 184 ranges;
184 185
185 pcieA: pcie@f9800000 { !! 186 apb: apb@ffe00000 {
186 compatible = "amlogic, !! 187 compatible = "simple-bus";
187 reg = <0x0 0xf9800000 !! 188 reg = <0x0 0xffe00000 0x0 0x200000>;
188 <0x0 0xff646000 !! 189 #address-cells = <2>;
189 <0x0 0xf9f00000 <<
190 reg-names = "elbi", "c <<
191 interrupts = <GIC_SPI <<
192 #interrupt-cells = <1> <<
193 interrupt-map-mask = < <<
194 interrupt-map = <0 0 0 <<
195 bus-range = <0x0 0xff> <<
196 #address-cells = <3>; <<
197 #size-cells = <2>; 190 #size-cells = <2>;
198 device_type = "pci"; !! 191 ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
199 ranges = <0x82000000 0 <<
200 192
201 clocks = <&clkc CLKID_ !! 193 sd_emmc_b: sd@5000 {
202 clock-names = "general !! 194 compatible = "amlogic,meson-axg-mmc";
203 resets = <&reset RESET !! 195 reg = <0x0 0x5000 0x0 0x800>;
204 reset-names = "port", !! 196 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
205 num-lanes = <1>; !! 197 status = "disabled";
206 phys = <&pcie_phy>; !! 198 clocks = <&clkc CLKID_SD_EMMC_B>,
207 phy-names = "pcie"; !! 199 <&clkc CLKID_SD_EMMC_B_CLK0>,
208 status = "disabled"; !! 200 <&clkc CLKID_FCLK_DIV2>;
>> 201 clock-names = "core", "clkin0", "clkin1";
>> 202 resets = <&reset RESET_SD_EMMC_B>;
>> 203 };
>> 204
>> 205 sd_emmc_c: mmc@7000 {
>> 206 compatible = "amlogic,meson-axg-mmc";
>> 207 reg = <0x0 0x7000 0x0 0x800>;
>> 208 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
>> 209 status = "disabled";
>> 210 clocks = <&clkc CLKID_SD_EMMC_C>,
>> 211 <&clkc CLKID_SD_EMMC_C_CLK0>,
>> 212 <&clkc CLKID_FCLK_DIV2>;
>> 213 clock-names = "core", "clkin0", "clkin1";
>> 214 resets = <&reset RESET_SD_EMMC_C>;
>> 215 };
209 }; 216 };
210 217
211 pcieB: pcie@fa000000 { !! 218 audio: bus@ff642000 {
212 compatible = "amlogic, !! 219 compatible = "simple-bus";
213 reg = <0x0 0xfa000000 !! 220 reg = <0x0 0xff642000 0x0 0x2000>;
214 <0x0 0xff648000 !! 221 #address-cells = <2>;
215 <0x0 0xfa400000 <<
216 reg-names = "elbi", "c <<
217 interrupts = <GIC_SPI <<
218 #interrupt-cells = <1> <<
219 interrupt-map-mask = < <<
220 interrupt-map = <0 0 0 <<
221 bus-range = <0x0 0xff> <<
222 #address-cells = <3>; <<
223 #size-cells = <2>; 222 #size-cells = <2>;
224 device_type = "pci"; !! 223 ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
225 ranges = <0x82000000 0 <<
226 224
227 clocks = <&clkc CLKID_ !! 225 clkc_audio: clock-controller@0 {
228 clock-names = "general !! 226 compatible = "amlogic,axg-audio-clkc";
229 resets = <&reset RESET !! 227 reg = <0x0 0x0 0x0 0xb4>;
230 reset-names = "port", !! 228 #clock-cells = <1>;
231 num-lanes = <1>; !! 229
232 phys = <&pcie_phy>; !! 230 clocks = <&clkc CLKID_AUDIO>,
233 phy-names = "pcie"; !! 231 <&clkc CLKID_MPLL0>,
234 status = "disabled"; !! 232 <&clkc CLKID_MPLL1>,
>> 233 <&clkc CLKID_MPLL2>,
>> 234 <&clkc CLKID_MPLL3>,
>> 235 <&clkc CLKID_HIFI_PLL>,
>> 236 <&clkc CLKID_FCLK_DIV3>,
>> 237 <&clkc CLKID_FCLK_DIV4>,
>> 238 <&clkc CLKID_GP0_PLL>;
>> 239 clock-names = "pclk",
>> 240 "mst_in0",
>> 241 "mst_in1",
>> 242 "mst_in2",
>> 243 "mst_in3",
>> 244 "mst_in4",
>> 245 "mst_in5",
>> 246 "mst_in6",
>> 247 "mst_in7";
>> 248
>> 249 resets = <&reset RESET_AUDIO>;
>> 250 };
>> 251
>> 252 arb: reset-controller@280 {
>> 253 compatible = "amlogic,meson-axg-audio-arb";
>> 254 reg = <0x0 0x280 0x0 0x4>;
>> 255 #reset-cells = <1>;
>> 256 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
>> 257 };
>> 258
>> 259 tdmin_a: audio-controller@300 {
>> 260 compatible = "amlogic,axg-tdmin";
>> 261 reg = <0x0 0x300 0x0 0x40>;
>> 262 sound-name-prefix = "TDMIN_A";
>> 263 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
>> 264 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
>> 265 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
>> 266 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
>> 267 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
>> 268 clock-names = "pclk", "sclk", "sclk_sel",
>> 269 "lrclk", "lrclk_sel";
>> 270 status = "disabled";
>> 271 };
>> 272
>> 273 tdmin_b: audio-controller@340 {
>> 274 compatible = "amlogic,axg-tdmin";
>> 275 reg = <0x0 0x340 0x0 0x40>;
>> 276 sound-name-prefix = "TDMIN_B";
>> 277 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
>> 278 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
>> 279 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
>> 280 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
>> 281 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
>> 282 clock-names = "pclk", "sclk", "sclk_sel",
>> 283 "lrclk", "lrclk_sel";
>> 284 status = "disabled";
>> 285 };
>> 286
>> 287 tdmin_c: audio-controller@380 {
>> 288 compatible = "amlogic,axg-tdmin";
>> 289 reg = <0x0 0x380 0x0 0x40>;
>> 290 sound-name-prefix = "TDMIN_C";
>> 291 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
>> 292 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
>> 293 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
>> 294 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
>> 295 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
>> 296 clock-names = "pclk", "sclk", "sclk_sel",
>> 297 "lrclk", "lrclk_sel";
>> 298 status = "disabled";
>> 299 };
>> 300
>> 301 tdmin_lb: audio-controller@3c0 {
>> 302 compatible = "amlogic,axg-tdmin";
>> 303 reg = <0x0 0x3c0 0x0 0x40>;
>> 304 sound-name-prefix = "TDMIN_LB";
>> 305 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
>> 306 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
>> 307 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
>> 308 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
>> 309 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
>> 310 clock-names = "pclk", "sclk", "sclk_sel",
>> 311 "lrclk", "lrclk_sel";
>> 312 status = "disabled";
>> 313 };
>> 314
>> 315 spdifout: audio-controller@480 {
>> 316 compatible = "amlogic,axg-spdifout";
>> 317 reg = <0x0 0x480 0x0 0x50>;
>> 318 #sound-dai-cells = <0>;
>> 319 sound-name-prefix = "SPDIFOUT";
>> 320 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
>> 321 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
>> 322 clock-names = "pclk", "mclk";
>> 323 status = "disabled";
>> 324 };
>> 325
>> 326 tdmout_a: audio-controller@500 {
>> 327 compatible = "amlogic,axg-tdmout";
>> 328 reg = <0x0 0x500 0x0 0x40>;
>> 329 sound-name-prefix = "TDMOUT_A";
>> 330 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
>> 331 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
>> 332 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
>> 333 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
>> 334 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
>> 335 clock-names = "pclk", "sclk", "sclk_sel",
>> 336 "lrclk", "lrclk_sel";
>> 337 status = "disabled";
>> 338 };
>> 339
>> 340 tdmout_b: audio-controller@540 {
>> 341 compatible = "amlogic,axg-tdmout";
>> 342 reg = <0x0 0x540 0x0 0x40>;
>> 343 sound-name-prefix = "TDMOUT_B";
>> 344 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
>> 345 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
>> 346 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
>> 347 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
>> 348 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
>> 349 clock-names = "pclk", "sclk", "sclk_sel",
>> 350 "lrclk", "lrclk_sel";
>> 351 status = "disabled";
>> 352 };
>> 353
>> 354 tdmout_c: audio-controller@580 {
>> 355 compatible = "amlogic,axg-tdmout";
>> 356 reg = <0x0 0x580 0x0 0x40>;
>> 357 sound-name-prefix = "TDMOUT_C";
>> 358 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
>> 359 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
>> 360 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
>> 361 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
>> 362 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
>> 363 clock-names = "pclk", "sclk", "sclk_sel",
>> 364 "lrclk", "lrclk_sel";
>> 365 status = "disabled";
>> 366 };
235 }; 367 };
236 368
237 usb: usb@ffe09080 { !! 369 cbus: bus@ffd00000 {
238 compatible = "amlogic, !! 370 compatible = "simple-bus";
239 reg = <0x0 0xffe09080 !! 371 reg = <0x0 0xffd00000 0x0 0x25000>;
240 interrupts = <GIC_SPI <<
241 #address-cells = <2>; 372 #address-cells = <2>;
242 #size-cells = <2>; 373 #size-cells = <2>;
243 ranges; !! 374 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
>> 375
>> 376 gpio_intc: interrupt-controller@f080 {
>> 377 compatible = "amlogic,meson-gpio-intc";
>> 378 reg = <0x0 0xf080 0x0 0x10>;
>> 379 interrupt-controller;
>> 380 #interrupt-cells = <2>;
>> 381 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
>> 382 status = "disabled";
>> 383 };
>> 384
>> 385 pwm_ab: pwm@1b000 {
>> 386 compatible = "amlogic,meson-axg-ee-pwm";
>> 387 reg = <0x0 0x1b000 0x0 0x20>;
>> 388 #pwm-cells = <3>;
>> 389 status = "disabled";
>> 390 };
>> 391
>> 392 pwm_cd: pwm@1a000 {
>> 393 compatible = "amlogic,meson-axg-ee-pwm";
>> 394 reg = <0x0 0x1a000 0x0 0x20>;
>> 395 #pwm-cells = <3>;
>> 396 status = "disabled";
>> 397 };
>> 398
>> 399 reset: reset-controller@1004 {
>> 400 compatible = "amlogic,meson-axg-reset";
>> 401 reg = <0x0 0x01004 0x0 0x9c>;
>> 402 #reset-cells = <1>;
>> 403 };
>> 404
>> 405 spicc0: spi@13000 {
>> 406 compatible = "amlogic,meson-axg-spicc";
>> 407 reg = <0x0 0x13000 0x0 0x3c>;
>> 408 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
>> 409 clocks = <&clkc CLKID_SPICC0>;
>> 410 clock-names = "core";
>> 411 #address-cells = <1>;
>> 412 #size-cells = <0>;
>> 413 status = "disabled";
>> 414 };
244 415
245 clocks = <&clkc CLKID_ !! 416 spicc1: spi@15000 {
246 clock-names = "usb_ctr !! 417 compatible = "amlogic,meson-axg-spicc";
247 resets = <&reset RESET !! 418 reg = <0x0 0x15000 0x0 0x3c>;
248 !! 419 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
249 dr_mode = "otg"; !! 420 clocks = <&clkc CLKID_SPICC1>;
250 !! 421 clock-names = "core";
251 phys = <&usb2_phy1>; !! 422 #address-cells = <1>;
252 phy-names = "usb2-phy1 !! 423 #size-cells = <0>;
253 !! 424 status = "disabled";
254 dwc2: usb@ff400000 { !! 425 };
255 compatible = " !! 426
256 reg = <0x0 0xf !! 427 i2c0: i2c@1f000 {
257 interrupts = < !! 428 compatible = "amlogic,meson-axg-i2c";
258 clocks = <&clk !! 429 reg = <0x0 0x1f000 0x0 0x20>;
259 clock-names = !! 430 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
260 phys = <&usb2_ !! 431 clocks = <&clkc CLKID_I2C>;
261 dr_mode = "per !! 432 #address-cells = <1>;
262 g-rx-fifo-size !! 433 #size-cells = <0>;
263 g-np-tx-fifo-s !! 434 status = "disabled";
264 g-tx-fifo-size !! 435 };
265 }; !! 436
266 !! 437 i2c1: i2c@1e000 {
267 dwc3: usb@ff500000 { !! 438 compatible = "amlogic,meson-axg-i2c";
268 compatible = " !! 439 reg = <0x0 0x1e000 0x0 0x20>;
269 reg = <0x0 0xf !! 440 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
270 interrupts = < !! 441 clocks = <&clkc CLKID_I2C>;
271 dr_mode = "hos !! 442 #address-cells = <1>;
272 maximum-speed !! 443 #size-cells = <0>;
273 snps,dis_u2_su !! 444 status = "disabled";
>> 445 };
>> 446
>> 447 i2c2: i2c@1d000 {
>> 448 compatible = "amlogic,meson-axg-i2c";
>> 449 reg = <0x0 0x1d000 0x0 0x20>;
>> 450 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
>> 451 clocks = <&clkc CLKID_I2C>;
>> 452 #address-cells = <1>;
>> 453 #size-cells = <0>;
>> 454 status = "disabled";
>> 455 };
>> 456
>> 457 i2c3: i2c@1c000 {
>> 458 compatible = "amlogic,meson-axg-i2c";
>> 459 reg = <0x0 0x1c000 0x0 0x20>;
>> 460 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
>> 461 clocks = <&clkc CLKID_I2C>;
>> 462 #address-cells = <1>;
>> 463 #size-cells = <0>;
>> 464 status = "disabled";
>> 465 };
>> 466
>> 467 uart_A: serial@24000 {
>> 468 compatible = "amlogic,meson-gx-uart";
>> 469 reg = <0x0 0x24000 0x0 0x18>;
>> 470 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
>> 471 status = "disabled";
>> 472 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
>> 473 clock-names = "xtal", "pclk", "baud";
>> 474 };
>> 475
>> 476 uart_B: serial@23000 {
>> 477 compatible = "amlogic,meson-gx-uart";
>> 478 reg = <0x0 0x23000 0x0 0x18>;
>> 479 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
>> 480 status = "disabled";
>> 481 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
>> 482 clock-names = "xtal", "pclk", "baud";
274 }; 483 };
275 }; 484 };
276 485
277 ethmac: ethernet@ff3f0000 { 486 ethmac: ethernet@ff3f0000 {
278 compatible = "amlogic, !! 487 compatible = "amlogic,meson-axg-dwmac", "snps,dwmac";
279 "snps,dwm !! 488 reg = <0x0 0xff3f0000 0x0 0x10000
280 "snps,dwm !! 489 0x0 0xff634540 0x0 0x8>;
281 reg = <0x0 0xff3f0000 !! 490 interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
282 <0x0 0xff634540 <<
283 interrupts = <GIC_SPI <<
284 interrupt-names = "mac 491 interrupt-names = "macirq";
285 clocks = <&clkc CLKID_ 492 clocks = <&clkc CLKID_ETH>,
286 <&clkc CLKID_ 493 <&clkc CLKID_FCLK_DIV2>,
287 <&clkc CLKID_ !! 494 <&clkc CLKID_MPLL2>;
288 <&clkc CLKID_ !! 495 clock-names = "stmmaceth", "clkin0", "clkin1";
289 clock-names = "stmmace <<
290 "timing- <<
291 rx-fifo-depth = <4096> <<
292 tx-fifo-depth = <2048> <<
293 power-domains = <&pwrc <<
294 status = "disabled"; 496 status = "disabled";
295 }; 497 };
296 498
297 pcie_phy: phy@ff644000 { !! 499 gic: interrupt-controller@ffc01000 {
298 compatible = "amlogic, !! 500 compatible = "arm,gic-400";
299 reg = <0x0 0xff644000 !! 501 reg = <0x0 0xffc01000 0 0x1000>,
300 resets = <&reset RESET !! 502 <0x0 0xffc02000 0 0x2000>,
301 phys = <&mipi_pcie_ana !! 503 <0x0 0xffc04000 0 0x2000>,
302 phy-names = "analog"; !! 504 <0x0 0xffc06000 0 0x2000>;
303 #phy-cells = <0>; !! 505 interrupt-controller;
>> 506 interrupts = <GIC_PPI 9
>> 507 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
>> 508 #interrupt-cells = <3>;
>> 509 #address-cells = <0>;
304 }; 510 };
305 511
306 pdm: audio-controller@ff632000 !! 512 hiubus: bus@ff63c000 {
307 compatible = "amlogic, !! 513 compatible = "simple-bus";
308 reg = <0x0 0xff632000 !! 514 reg = <0x0 0xff63c000 0x0 0x1c00>;
309 #sound-dai-cells = <0> !! 515 #address-cells = <2>;
310 sound-name-prefix = "P !! 516 #size-cells = <2>;
311 clocks = <&clkc_audio !! 517 ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
312 <&clkc_audio !! 518
313 <&clkc_audio !! 519 sysctrl: system-controller@0 {
314 clock-names = "pclk", !! 520 compatible = "amlogic,meson-axg-hhi-sysctrl", "syscon", "simple-mfd";
315 status = "disabled"; !! 521 reg = <0 0 0 0x400>;
>> 522
>> 523 clkc: clock-controller {
>> 524 compatible = "amlogic,axg-clkc";
>> 525 #clock-cells = <1>;
>> 526 };
>> 527 };
>> 528 };
>> 529
>> 530 mailbox: mailbox@ff63dc00 {
>> 531 compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
>> 532 reg = <0 0xff63dc00 0 0x400>;
>> 533 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
>> 534 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
>> 535 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
>> 536 #mbox-cells = <1>;
316 }; 537 };
317 538
318 periphs: bus@ff634000 { !! 539 periphs: periphs@ff634000 {
319 compatible = "simple-b 540 compatible = "simple-bus";
320 reg = <0x0 0xff634000 541 reg = <0x0 0xff634000 0x0 0x2000>;
321 #address-cells = <2>; 542 #address-cells = <2>;
322 #size-cells = <2>; 543 #size-cells = <2>;
323 ranges = <0x0 0x0 0x0 544 ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
324 545
325 hwrng: rng@18 { !! 546 hwrng: rng {
326 compatible = " 547 compatible = "amlogic,meson-rng";
327 reg = <0x0 0x1 548 reg = <0x0 0x18 0x0 0x4>;
328 clocks = <&clk 549 clocks = <&clkc CLKID_RNG0>;
329 clock-names = 550 clock-names = "core";
330 }; 551 };
331 552
332 pinctrl_periphs: pinct 553 pinctrl_periphs: pinctrl@480 {
333 compatible = " 554 compatible = "amlogic,meson-axg-periphs-pinctrl";
334 #address-cells 555 #address-cells = <2>;
335 #size-cells = 556 #size-cells = <2>;
336 ranges; 557 ranges;
337 558
338 gpio: bank@480 559 gpio: bank@480 {
339 reg = 560 reg = <0x0 0x00480 0x0 0x40>,
340 !! 561 <0x0 0x004e8 0x0 0x14>,
341 !! 562 <0x0 0x00520 0x0 0x14>,
342 !! 563 <0x0 0x00430 0x0 0x3c>;
343 reg-na 564 reg-names = "mux", "pull", "pull-enable", "gpio";
344 gpio-c 565 gpio-controller;
345 #gpio- 566 #gpio-cells = <2>;
346 gpio-r 567 gpio-ranges = <&pinctrl_periphs 0 0 86>;
347 }; 568 };
348 569
349 i2c0_pins: i2c <<
350 mux { <<
351 <<
352 <<
353 <<
354 <<
355 }; <<
356 }; <<
357 <<
358 i2c1_x_pins: i <<
359 mux { <<
360 <<
361 <<
362 <<
363 <<
364 }; <<
365 }; <<
366 <<
367 i2c1_z_pins: i <<
368 mux { <<
369 <<
370 <<
371 <<
372 <<
373 }; <<
374 }; <<
375 <<
376 i2c2_a_pins: i <<
377 mux { <<
378 <<
379 <<
380 <<
381 <<
382 }; <<
383 }; <<
384 <<
385 i2c2_x_pins: i <<
386 mux { <<
387 <<
388 <<
389 <<
390 <<
391 }; <<
392 }; <<
393 <<
394 i2c3_a6_pins: <<
395 mux { <<
396 <<
397 <<
398 <<
399 <<
400 }; <<
401 }; <<
402 <<
403 i2c3_a12_pins: <<
404 mux { <<
405 <<
406 <<
407 <<
408 <<
409 }; <<
410 }; <<
411 <<
412 i2c3_a19_pins: <<
413 mux { <<
414 <<
415 <<
416 <<
417 <<
418 }; <<
419 }; <<
420 <<
421 emmc_pins: emm 570 emmc_pins: emmc {
422 mux-0 <<
423 <<
424 <<
425 <<
426 <<
427 <<
428 <<
429 <<
430 <<
431 <<
432 <<
433 <<
434 }; <<
435 <<
436 mux-1 <<
437 <<
438 <<
439 <<
440 }; <<
441 }; <<
442 <<
443 nand_all_pins: <<
444 mux { 571 mux {
445 572 groups = "emmc_nand_d0",
446 !! 573 "emmc_nand_d1",
447 !! 574 "emmc_nand_d2",
448 !! 575 "emmc_nand_d3",
449 !! 576 "emmc_nand_d4",
450 !! 577 "emmc_nand_d5",
451 !! 578 "emmc_nand_d6",
452 !! 579 "emmc_nand_d7",
453 !! 580 "emmc_clk",
454 !! 581 "emmc_cmd",
455 !! 582 "emmc_ds";
456 <<
457 <<
458 <<
459 <<
460 <<
461 }; <<
462 }; <<
463 <<
464 emmc_ds_pins: <<
465 mux { <<
466 <<
467 583 function = "emmc";
468 <<
469 }; 584 };
470 }; 585 };
471 586
472 emmc_clk_gate_ 587 emmc_clk_gate_pins: emmc_clk_gate {
473 mux { 588 mux {
474 589 groups = "BOOT_8";
475 590 function = "gpio_periphs";
>> 591 };
>> 592 cfg-pull-down {
>> 593 pins = "BOOT_8";
476 594 bias-pull-down;
477 }; 595 };
478 }; 596 };
479 597
480 eth_rgmii_x_pi !! 598 sdio_pins: sdio {
481 mux { 599 mux {
482 !! 600 groups = "sdio_d0",
483 !! 601 "sdio_d1",
484 !! 602 "sdio_d2",
485 !! 603 "sdio_d3",
486 !! 604 "sdio_cmd",
487 !! 605 "sdio_clk";
488 !! 606 function = "sdio";
489 <<
490 <<
491 <<
492 <<
493 <<
494 <<
495 <<
496 <<
497 <<
498 }; 607 };
499 }; 608 };
500 609
501 eth_rgmii_y_pi !! 610 sdio_clk_gate_pins: sdio_clk_gate {
502 mux { 611 mux {
503 !! 612 groups = "GPIOX_4";
504 !! 613 function = "gpio_periphs";
505 !! 614 };
506 !! 615 cfg-pull-down {
507 !! 616 pins = "GPIOX_4";
508 !! 617 bias-pull-down;
509 <<
510 <<
511 <<
512 <<
513 <<
514 <<
515 <<
516 <<
517 <<
518 <<
519 }; 618 };
520 }; 619 };
521 620
522 eth_rmii_x_pin 621 eth_rmii_x_pins: eth-x-rmii {
523 mux { 622 mux {
524 623 groups = "eth_mdio_x",
525 !! 624 "eth_mdc_x",
526 !! 625 "eth_rgmii_rx_clk_x",
527 !! 626 "eth_rx_dv_x",
528 !! 627 "eth_rxd0_x",
529 !! 628 "eth_rxd1_x",
530 !! 629 "eth_txen_x",
531 !! 630 "eth_txd0_x",
532 !! 631 "eth_txd1_x";
533 632 function = "eth";
534 <<
535 }; 633 };
536 }; 634 };
537 635
538 eth_rmii_y_pin 636 eth_rmii_y_pins: eth-y-rmii {
539 mux { 637 mux {
540 638 groups = "eth_mdio_y",
541 !! 639 "eth_mdc_y",
542 !! 640 "eth_rgmii_rx_clk_y",
543 !! 641 "eth_rx_dv_y",
544 !! 642 "eth_rxd0_y",
545 !! 643 "eth_rxd1_y",
546 !! 644 "eth_txen_y",
547 !! 645 "eth_txd0_y",
548 !! 646 "eth_txd1_y";
549 647 function = "eth";
550 <<
551 }; 648 };
552 }; 649 };
553 650
554 mclk_b_pins: m !! 651 eth_rgmii_x_pins: eth-x-rgmii {
555 mux { 652 mux {
556 !! 653 groups = "eth_mdio_x",
557 !! 654 "eth_mdc_x",
558 !! 655 "eth_rgmii_rx_clk_x",
>> 656 "eth_rx_dv_x",
>> 657 "eth_rxd0_x",
>> 658 "eth_rxd1_x",
>> 659 "eth_rxd2_rgmii",
>> 660 "eth_rxd3_rgmii",
>> 661 "eth_rgmii_tx_clk",
>> 662 "eth_txen_x",
>> 663 "eth_txd0_x",
>> 664 "eth_txd1_x",
>> 665 "eth_txd2_rgmii",
>> 666 "eth_txd3_rgmii";
>> 667 function = "eth";
559 }; 668 };
560 }; 669 };
561 670
562 mclk_c_pins: m !! 671 eth_rgmii_y_pins: eth-y-rgmii {
563 mux { 672 mux {
564 !! 673 groups = "eth_mdio_y",
565 !! 674 "eth_mdc_y",
566 !! 675 "eth_rgmii_rx_clk_y",
>> 676 "eth_rx_dv_y",
>> 677 "eth_rxd0_y",
>> 678 "eth_rxd1_y",
>> 679 "eth_rxd2_rgmii",
>> 680 "eth_rxd3_rgmii",
>> 681 "eth_rgmii_tx_clk",
>> 682 "eth_txen_y",
>> 683 "eth_txd0_y",
>> 684 "eth_txd1_y",
>> 685 "eth_txd2_rgmii",
>> 686 "eth_txd3_rgmii";
>> 687 function = "eth";
567 }; 688 };
568 }; 689 };
569 690
570 pdm_dclk_a14_p 691 pdm_dclk_a14_pins: pdm_dclk_a14 {
571 mux { 692 mux {
572 693 groups = "pdm_dclk_a14";
573 694 function = "pdm";
574 <<
575 }; 695 };
576 }; 696 };
577 697
578 pdm_dclk_a19_p 698 pdm_dclk_a19_pins: pdm_dclk_a19 {
579 mux { 699 mux {
580 700 groups = "pdm_dclk_a19";
581 701 function = "pdm";
582 <<
583 }; 702 };
584 }; 703 };
585 704
586 pdm_din0_pins: 705 pdm_din0_pins: pdm_din0 {
587 mux { 706 mux {
588 707 groups = "pdm_din0";
589 708 function = "pdm";
590 <<
591 }; 709 };
592 }; 710 };
593 711
594 pdm_din1_pins: 712 pdm_din1_pins: pdm_din1 {
595 mux { 713 mux {
596 714 groups = "pdm_din1";
597 715 function = "pdm";
598 <<
599 }; 716 };
600 }; 717 };
601 718
602 pdm_din2_pins: 719 pdm_din2_pins: pdm_din2 {
603 mux { 720 mux {
604 721 groups = "pdm_din2";
605 722 function = "pdm";
606 <<
607 }; 723 };
608 }; 724 };
609 725
610 pdm_din3_pins: 726 pdm_din3_pins: pdm_din3 {
611 mux { 727 mux {
612 728 groups = "pdm_din3";
613 729 function = "pdm";
614 <<
615 }; 730 };
616 }; 731 };
617 732
618 pwm_a_a_pins: 733 pwm_a_a_pins: pwm_a_a {
619 mux { 734 mux {
620 735 groups = "pwm_a_a";
621 736 function = "pwm_a";
622 <<
623 }; 737 };
624 }; 738 };
625 739
626 pwm_a_x18_pins 740 pwm_a_x18_pins: pwm_a_x18 {
627 mux { 741 mux {
628 742 groups = "pwm_a_x18";
629 743 function = "pwm_a";
630 <<
631 }; 744 };
632 }; 745 };
633 746
634 pwm_a_x20_pins 747 pwm_a_x20_pins: pwm_a_x20 {
635 mux { 748 mux {
636 749 groups = "pwm_a_x20";
637 750 function = "pwm_a";
638 <<
639 }; 751 };
640 }; 752 };
641 753
642 pwm_a_z_pins: 754 pwm_a_z_pins: pwm_a_z {
643 mux { 755 mux {
644 756 groups = "pwm_a_z";
645 757 function = "pwm_a";
646 <<
647 }; 758 };
648 }; 759 };
649 760
650 pwm_b_a_pins: 761 pwm_b_a_pins: pwm_b_a {
651 mux { 762 mux {
652 763 groups = "pwm_b_a";
653 764 function = "pwm_b";
654 <<
655 }; 765 };
656 }; 766 };
657 767
658 pwm_b_x_pins: 768 pwm_b_x_pins: pwm_b_x {
659 mux { 769 mux {
660 770 groups = "pwm_b_x";
661 771 function = "pwm_b";
662 <<
663 }; 772 };
664 }; 773 };
665 774
666 pwm_b_z_pins: 775 pwm_b_z_pins: pwm_b_z {
667 mux { 776 mux {
668 777 groups = "pwm_b_z";
669 778 function = "pwm_b";
670 <<
671 }; 779 };
672 }; 780 };
673 781
674 pwm_c_a_pins: 782 pwm_c_a_pins: pwm_c_a {
675 mux { 783 mux {
676 784 groups = "pwm_c_a";
677 785 function = "pwm_c";
678 <<
679 }; 786 };
680 }; 787 };
681 788
682 pwm_c_x10_pins 789 pwm_c_x10_pins: pwm_c_x10 {
683 mux { 790 mux {
684 791 groups = "pwm_c_x10";
685 792 function = "pwm_c";
686 <<
687 }; 793 };
688 }; 794 };
689 795
690 pwm_c_x17_pins 796 pwm_c_x17_pins: pwm_c_x17 {
691 mux { 797 mux {
692 798 groups = "pwm_c_x17";
693 799 function = "pwm_c";
694 <<
695 }; 800 };
696 }; 801 };
697 802
698 pwm_d_x11_pins 803 pwm_d_x11_pins: pwm_d_x11 {
699 mux { 804 mux {
700 805 groups = "pwm_d_x11";
701 806 function = "pwm_d";
702 <<
703 }; 807 };
704 }; 808 };
705 809
706 pwm_d_x16_pins 810 pwm_d_x16_pins: pwm_d_x16 {
707 mux { 811 mux {
708 812 groups = "pwm_d_x16";
709 813 function = "pwm_d";
710 <<
711 }; <<
712 }; <<
713 <<
714 sdio_pins: sdi <<
715 mux-0 <<
716 <<
717 <<
718 <<
719 <<
720 <<
721 <<
722 <<
723 }; <<
724 <<
725 mux-1 <<
726 <<
727 <<
728 <<
729 }; <<
730 }; <<
731 <<
732 sdio_clk_gate_ <<
733 mux { <<
734 <<
735 <<
736 <<
737 }; 814 };
738 }; 815 };
739 816
740 spdif_in_z_pin 817 spdif_in_z_pins: spdif_in_z {
741 mux { 818 mux {
742 819 groups = "spdif_in_z";
743 820 function = "spdif_in";
744 <<
745 }; 821 };
746 }; 822 };
747 823
748 spdif_in_a1_pi 824 spdif_in_a1_pins: spdif_in_a1 {
749 mux { 825 mux {
750 826 groups = "spdif_in_a1";
751 827 function = "spdif_in";
752 <<
753 }; 828 };
754 }; 829 };
755 830
756 spdif_in_a7_pi 831 spdif_in_a7_pins: spdif_in_a7 {
757 mux { 832 mux {
758 833 groups = "spdif_in_a7";
759 834 function = "spdif_in";
760 <<
761 }; 835 };
762 }; 836 };
763 837
764 spdif_in_a19_p 838 spdif_in_a19_pins: spdif_in_a19 {
765 mux { 839 mux {
766 840 groups = "spdif_in_a19";
767 841 function = "spdif_in";
768 <<
769 }; 842 };
770 }; 843 };
771 844
772 spdif_in_a20_p 845 spdif_in_a20_pins: spdif_in_a20 {
773 mux { 846 mux {
774 847 groups = "spdif_in_a20";
775 848 function = "spdif_in";
776 !! 849 };
>> 850 };
>> 851
>> 852 spdif_out_z_pins: spdif_out_z {
>> 853 mux {
>> 854 groups = "spdif_out_z";
>> 855 function = "spdif_out";
777 }; 856 };
778 }; 857 };
779 858
780 spdif_out_a1_p 859 spdif_out_a1_pins: spdif_out_a1 {
781 mux { 860 mux {
782 861 groups = "spdif_out_a1";
783 862 function = "spdif_out";
784 <<
785 }; 863 };
786 }; 864 };
787 865
788 spdif_out_a11_ 866 spdif_out_a11_pins: spdif_out_a11 {
789 mux { 867 mux {
790 868 groups = "spdif_out_a11";
791 869 function = "spdif_out";
792 <<
793 }; 870 };
794 }; 871 };
795 872
796 spdif_out_a19_ 873 spdif_out_a19_pins: spdif_out_a19 {
797 mux { 874 mux {
798 875 groups = "spdif_out_a19";
799 876 function = "spdif_out";
800 <<
801 }; 877 };
802 }; 878 };
803 879
804 spdif_out_a20_ 880 spdif_out_a20_pins: spdif_out_a20 {
805 mux { 881 mux {
806 882 groups = "spdif_out_a20";
807 883 function = "spdif_out";
808 <<
809 }; <<
810 }; <<
811 <<
812 spdif_out_z_pi <<
813 mux { <<
814 <<
815 <<
816 <<
817 }; 884 };
818 }; 885 };
819 886
820 spi0_pins: spi 887 spi0_pins: spi0 {
821 mux { 888 mux {
822 889 groups = "spi0_miso",
823 !! 890 "spi0_mosi",
824 !! 891 "spi0_clk";
825 892 function = "spi0";
826 <<
827 }; 893 };
828 }; 894 };
829 895
830 spi0_ss0_pins: 896 spi0_ss0_pins: spi0_ss0 {
831 mux { 897 mux {
832 898 groups = "spi0_ss0";
833 899 function = "spi0";
834 <<
835 }; 900 };
836 }; 901 };
837 902
838 spi0_ss1_pins: 903 spi0_ss1_pins: spi0_ss1 {
839 mux { 904 mux {
840 905 groups = "spi0_ss1";
841 906 function = "spi0";
842 <<
843 }; 907 };
844 }; 908 };
845 909
846 spi0_ss2_pins: 910 spi0_ss2_pins: spi0_ss2 {
847 mux { 911 mux {
848 912 groups = "spi0_ss2";
849 913 function = "spi0";
850 <<
851 }; 914 };
852 }; 915 };
853 916
>> 917
854 spi1_a_pins: s 918 spi1_a_pins: spi1_a {
855 mux { 919 mux {
856 920 groups = "spi1_miso_a",
857 !! 921 "spi1_mosi_a",
858 !! 922 "spi1_clk_a";
859 923 function = "spi1";
860 <<
861 }; 924 };
862 }; 925 };
863 926
864 spi1_ss0_a_pin 927 spi1_ss0_a_pins: spi1_ss0_a {
865 mux { 928 mux {
866 929 groups = "spi1_ss0_a";
867 930 function = "spi1";
868 <<
869 }; 931 };
870 }; 932 };
871 933
872 spi1_ss1_pins: 934 spi1_ss1_pins: spi1_ss1 {
873 mux { 935 mux {
874 936 groups = "spi1_ss1";
875 937 function = "spi1";
876 <<
877 }; 938 };
878 }; 939 };
879 940
880 spi1_x_pins: s 941 spi1_x_pins: spi1_x {
881 mux { 942 mux {
882 943 groups = "spi1_miso_x",
883 !! 944 "spi1_mosi_x",
884 !! 945 "spi1_clk_x";
885 946 function = "spi1";
886 <<
887 }; 947 };
888 }; 948 };
889 949
890 spi1_ss0_x_pin 950 spi1_ss0_x_pins: spi1_ss0_x {
891 mux { 951 mux {
892 952 groups = "spi1_ss0_x";
893 953 function = "spi1";
894 <<
895 }; 954 };
896 }; 955 };
897 956
898 tdma_din0_pins !! 957 i2c0_pins: i2c0 {
899 mux { 958 mux {
900 !! 959 groups = "i2c0_sck",
901 !! 960 "i2c0_sda";
902 !! 961 function = "i2c0";
903 }; 962 };
904 }; 963 };
905 964
906 tdma_dout0_x14 !! 965 i2c1_z_pins: i2c1_z {
907 mux { 966 mux {
908 !! 967 groups = "i2c1_sck_z",
909 !! 968 "i2c1_sda_z";
910 !! 969 function = "i2c1";
911 }; 970 };
912 }; 971 };
913 972
914 tdma_dout0_x15 !! 973 i2c1_x_pins: i2c1_x {
915 mux { 974 mux {
916 !! 975 groups = "i2c1_sck_x",
917 !! 976 "i2c1_sda_x";
918 !! 977 function = "i2c1";
919 }; 978 };
920 }; 979 };
921 980
922 tdma_dout1_pin !! 981 i2c2_x_pins: i2c2_x {
923 mux { 982 mux {
924 !! 983 groups = "i2c2_sck_x",
925 !! 984 "i2c2_sda_x";
926 !! 985 function = "i2c2";
927 }; 986 };
928 }; 987 };
929 988
930 tdma_din1_pins !! 989 i2c2_a_pins: i2c2_a {
931 mux { 990 mux {
932 !! 991 groups = "i2c2_sck_a",
933 !! 992 "i2c2_sda_a";
934 !! 993 function = "i2c2";
935 }; 994 };
936 }; 995 };
937 996
938 tdma_fs_pins: !! 997 i2c3_a6_pins: i2c3_a6 {
939 mux { 998 mux {
940 !! 999 groups = "i2c3_sda_a6",
941 !! 1000 "i2c3_sck_a7";
942 !! 1001 function = "i2c3";
943 }; 1002 };
944 }; 1003 };
945 1004
946 tdma_fs_slv_pi !! 1005 i2c3_a12_pins: i2c3_a12 {
947 mux { 1006 mux {
948 !! 1007 groups = "i2c3_sda_a12",
949 !! 1008 "i2c3_sck_a13";
950 !! 1009 function = "i2c3";
>> 1010 };
>> 1011 };
>> 1012
>> 1013 i2c3_a19_pins: i2c3_a19 {
>> 1014 mux {
>> 1015 groups = "i2c3_sda_a19",
>> 1016 "i2c3_sck_a20";
>> 1017 function = "i2c3";
>> 1018 };
>> 1019 };
>> 1020
>> 1021 uart_a_pins: uart_a {
>> 1022 mux {
>> 1023 groups = "uart_tx_a",
>> 1024 "uart_rx_a";
>> 1025 function = "uart_a";
>> 1026 };
>> 1027 };
>> 1028
>> 1029 uart_a_cts_rts_pins: uart_a_cts_rts {
>> 1030 mux {
>> 1031 groups = "uart_cts_a",
>> 1032 "uart_rts_a";
>> 1033 function = "uart_a";
>> 1034 };
>> 1035 };
>> 1036
>> 1037 uart_b_x_pins: uart_b_x {
>> 1038 mux {
>> 1039 groups = "uart_tx_b_x",
>> 1040 "uart_rx_b_x";
>> 1041 function = "uart_b";
>> 1042 };
>> 1043 };
>> 1044
>> 1045 uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
>> 1046 mux {
>> 1047 groups = "uart_cts_b_x",
>> 1048 "uart_rts_b_x";
>> 1049 function = "uart_b";
>> 1050 };
>> 1051 };
>> 1052
>> 1053 uart_b_z_pins: uart_b_z {
>> 1054 mux {
>> 1055 groups = "uart_tx_b_z",
>> 1056 "uart_rx_b_z";
>> 1057 function = "uart_b";
>> 1058 };
>> 1059 };
>> 1060
>> 1061 uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
>> 1062 mux {
>> 1063 groups = "uart_cts_b_z",
>> 1064 "uart_rts_b_z";
>> 1065 function = "uart_b";
>> 1066 };
>> 1067 };
>> 1068
>> 1069 uart_ao_b_z_pins: uart_ao_b_z {
>> 1070 mux {
>> 1071 groups = "uart_ao_tx_b_z",
>> 1072 "uart_ao_rx_b_z";
>> 1073 function = "uart_ao_b_z";
>> 1074 };
>> 1075 };
>> 1076
>> 1077 uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
>> 1078 mux {
>> 1079 groups = "uart_ao_cts_b_z",
>> 1080 "uart_ao_rts_b_z";
>> 1081 function = "uart_ao_b_z";
>> 1082 };
>> 1083 };
>> 1084
>> 1085 mclk_b_pins: mclk_b {
>> 1086 mux {
>> 1087 groups = "mclk_b";
>> 1088 function = "mclk_b";
>> 1089 };
>> 1090 };
>> 1091
>> 1092 mclk_c_pins: mclk_c {
>> 1093 mux {
>> 1094 groups = "mclk_c";
>> 1095 function = "mclk_c";
951 }; 1096 };
952 }; 1097 };
953 1098
954 tdma_sclk_pins 1099 tdma_sclk_pins: tdma_sclk {
955 mux { 1100 mux {
956 1101 groups = "tdma_sclk";
957 1102 function = "tdma";
958 <<
959 }; 1103 };
960 }; 1104 };
961 1105
962 tdma_sclk_slv_ 1106 tdma_sclk_slv_pins: tdma_sclk_slv {
963 mux { 1107 mux {
964 1108 groups = "tdma_sclk_slv";
965 1109 function = "tdma";
966 <<
967 }; 1110 };
968 }; 1111 };
969 1112
970 tdmb_din0_pins !! 1113 tdma_fs_pins: tdma_fs {
971 mux { 1114 mux {
972 !! 1115 groups = "tdma_fs";
973 !! 1116 function = "tdma";
974 <<
975 }; 1117 };
976 }; 1118 };
977 1119
978 tdmb_din1_pins !! 1120 tdma_fs_slv_pins: tdma_fs_slv {
979 mux { 1121 mux {
980 !! 1122 groups = "tdma_fs_slv";
981 !! 1123 function = "tdma";
982 <<
983 }; 1124 };
984 }; 1125 };
985 1126
986 tdmb_din2_pins !! 1127 tdma_din0_pins: tdma_din0 {
987 mux { 1128 mux {
988 !! 1129 groups = "tdma_din0";
989 !! 1130 function = "tdma";
990 <<
991 }; 1131 };
992 }; 1132 };
993 1133
994 tdmb_din3_pins !! 1134 tdma_dout0_x14_pins: tdma_dout0_x14 {
995 mux { 1135 mux {
996 !! 1136 groups = "tdma_dout0_x14";
997 !! 1137 function = "tdma";
998 <<
999 }; 1138 };
1000 }; 1139 };
1001 1140
1002 tdmb_dout0_pi !! 1141 tdma_dout0_x15_pins: tdma_dout0_x15 {
1003 mux { 1142 mux {
1004 !! 1143 groups = "tdma_dout0_x15";
1005 !! 1144 function = "tdma";
1006 <<
1007 }; 1145 };
1008 }; 1146 };
1009 1147
1010 tdmb_dout1_pi !! 1148 tdma_dout1_pins: tdma_dout1 {
1011 mux { 1149 mux {
1012 !! 1150 groups = "tdma_dout1";
1013 !! 1151 function = "tdma";
1014 <<
1015 }; 1152 };
1016 }; 1153 };
1017 1154
1018 tdmb_dout2_pi !! 1155 tdma_din1_pins: tdma_din1 {
1019 mux { 1156 mux {
1020 !! 1157 groups = "tdma_din1";
>> 1158 function = "tdma";
>> 1159 };
>> 1160 };
>> 1161
>> 1162 tdmb_sclk_pins: tdmb_sclk {
>> 1163 mux {
>> 1164 groups = "tdmb_sclk";
1021 1165 function = "tdmb";
1022 <<
1023 }; 1166 };
1024 }; 1167 };
1025 1168
1026 tdmb_dout3_pi !! 1169 tdmb_sclk_slv_pins: tdmb_sclk_slv {
1027 mux { 1170 mux {
1028 !! 1171 groups = "tdmb_sclk_slv";
1029 1172 function = "tdmb";
1030 <<
1031 }; 1173 };
1032 }; 1174 };
1033 1175
1034 tdmb_fs_pins: 1176 tdmb_fs_pins: tdmb_fs {
1035 mux { 1177 mux {
1036 1178 groups = "tdmb_fs";
1037 1179 function = "tdmb";
1038 <<
1039 }; 1180 };
1040 }; 1181 };
1041 1182
1042 tdmb_fs_slv_p 1183 tdmb_fs_slv_pins: tdmb_fs_slv {
1043 mux { 1184 mux {
1044 1185 groups = "tdmb_fs_slv";
1045 1186 function = "tdmb";
1046 <<
1047 }; 1187 };
1048 }; 1188 };
1049 1189
1050 tdmb_sclk_pin !! 1190 tdmb_din0_pins: tdmb_din0 {
1051 mux { 1191 mux {
1052 !! 1192 groups = "tdmb_din0";
1053 1193 function = "tdmb";
1054 <<
1055 }; 1194 };
1056 }; 1195 };
1057 1196
1058 tdmb_sclk_slv !! 1197 tdmb_dout0_pins: tdmb_dout0 {
1059 mux { 1198 mux {
1060 !! 1199 groups = "tdmb_dout0";
1061 1200 function = "tdmb";
1062 <<
1063 }; 1201 };
1064 }; 1202 };
1065 1203
1066 tdmc_fs_pins: !! 1204 tdmb_din1_pins: tdmb_din1 {
1067 mux { 1205 mux {
1068 !! 1206 groups = "tdmb_din1";
1069 !! 1207 function = "tdmb";
1070 <<
1071 }; 1208 };
1072 }; 1209 };
1073 1210
1074 tdmc_fs_slv_p !! 1211 tdmb_dout1_pins: tdmb_dout1 {
1075 mux { 1212 mux {
1076 !! 1213 groups = "tdmb_dout1";
1077 !! 1214 function = "tdmb";
1078 <<
1079 }; 1215 };
1080 }; 1216 };
1081 1217
1082 tdmc_sclk_pin !! 1218 tdmb_din2_pins: tdmb_din2 {
1083 mux { 1219 mux {
1084 !! 1220 groups = "tdmb_din2";
1085 !! 1221 function = "tdmb";
1086 <<
1087 }; 1222 };
1088 }; 1223 };
1089 1224
1090 tdmc_sclk_slv !! 1225 tdmb_dout2_pins: tdmb_dout2 {
1091 mux { 1226 mux {
1092 !! 1227 groups = "tdmb_dout2";
1093 !! 1228 function = "tdmb";
1094 <<
1095 }; 1229 };
1096 }; 1230 };
1097 1231
1098 tdmc_din0_pin !! 1232 tdmb_din3_pins: tdmb_din3 {
1099 mux { 1233 mux {
1100 !! 1234 groups = "tdmb_din3";
1101 !! 1235 function = "tdmb";
1102 <<
1103 }; 1236 };
1104 }; 1237 };
1105 1238
1106 tdmc_din1_pin !! 1239 tdmb_dout3_pins: tdmb_dout3 {
1107 mux { 1240 mux {
1108 !! 1241 groups = "tdmb_dout3";
1109 !! 1242 function = "tdmb";
1110 <<
1111 }; 1243 };
1112 }; 1244 };
1113 1245
1114 tdmc_din2_pin !! 1246 tdmc_sclk_pins: tdmc_sclk {
1115 mux { 1247 mux {
1116 !! 1248 groups = "tdmc_sclk";
1117 1249 function = "tdmc";
1118 <<
1119 }; 1250 };
1120 }; 1251 };
1121 1252
1122 tdmc_din3_pin !! 1253 tdmc_sclk_slv_pins: tdmc_sclk_slv {
1123 mux { 1254 mux {
1124 !! 1255 groups = "tdmc_sclk_slv";
1125 1256 function = "tdmc";
1126 <<
1127 }; 1257 };
1128 }; 1258 };
1129 1259
1130 tdmc_dout0_pi !! 1260 tdmc_fs_pins: tdmc_fs {
1131 mux { 1261 mux {
1132 !! 1262 groups = "tdmc_fs";
1133 1263 function = "tdmc";
1134 <<
1135 }; 1264 };
1136 }; 1265 };
1137 1266
1138 tdmc_dout1_pi !! 1267 tdmc_fs_slv_pins: tdmc_fs_slv {
1139 mux { 1268 mux {
1140 !! 1269 groups = "tdmc_fs_slv";
1141 1270 function = "tdmc";
1142 <<
1143 }; 1271 };
1144 }; 1272 };
1145 1273
1146 tdmc_dout2_pi !! 1274 tdmc_din0_pins: tdmc_din0 {
1147 mux { 1275 mux {
1148 !! 1276 groups = "tdmc_din0";
1149 1277 function = "tdmc";
1150 <<
1151 }; 1278 };
1152 }; 1279 };
1153 1280
1154 tdmc_dout3_pi !! 1281 tdmc_dout0_pins: tdmc_dout0 {
1155 mux { 1282 mux {
1156 !! 1283 groups = "tdmc_dout0";
1157 1284 function = "tdmc";
1158 <<
1159 }; <<
1160 }; <<
1161 <<
1162 uart_a_pins: <<
1163 mux { <<
1164 <<
1165 <<
1166 <<
1167 <<
1168 }; <<
1169 }; <<
1170 <<
1171 uart_a_cts_rt <<
1172 mux { <<
1173 <<
1174 <<
1175 <<
1176 <<
1177 }; 1285 };
1178 }; 1286 };
1179 1287
1180 uart_b_x_pins !! 1288 tdmc_din1_pins: tdmc_din1 {
1181 mux { 1289 mux {
1182 !! 1290 groups = "tdmc_din1";
1183 !! 1291 function = "tdmc";
1184 <<
1185 <<
1186 }; 1292 };
1187 }; 1293 };
1188 1294
1189 uart_b_x_cts_ !! 1295 tdmc_dout1_pins: tdmc_dout1 {
1190 mux { 1296 mux {
1191 !! 1297 groups = "tdmc_dout1";
1192 !! 1298 function = "tdmc";
1193 <<
1194 <<
1195 }; 1299 };
1196 }; 1300 };
1197 1301
1198 uart_b_z_pins !! 1302 tdmc_din2_pins: tdmc_din2 {
1199 mux { 1303 mux {
1200 !! 1304 groups = "tdmc_din2";
1201 !! 1305 function = "tdmc";
1202 <<
1203 <<
1204 }; 1306 };
1205 }; 1307 };
1206 1308
1207 uart_b_z_cts_ !! 1309 tdmc_dout2_pins: tdmc_dout2 {
1208 mux { 1310 mux {
1209 !! 1311 groups = "tdmc_dout2";
1210 !! 1312 function = "tdmc";
1211 <<
1212 <<
1213 }; 1313 };
1214 }; 1314 };
1215 1315
1216 uart_ao_b_z_p !! 1316 tdmc_din3_pins: tdmc_din3 {
1217 mux { 1317 mux {
1218 !! 1318 groups = "tdmc_din3";
1219 !! 1319 function = "tdmc";
1220 <<
1221 <<
1222 }; 1320 };
1223 }; 1321 };
1224 1322
1225 uart_ao_b_z_c !! 1323 tdmc_dout3_pins: tdmc_dout3 {
1226 mux { 1324 mux {
1227 !! 1325 groups = "tdmc_dout3";
1228 !! 1326 function = "tdmc";
1229 <<
1230 <<
1231 }; 1327 };
1232 }; 1328 };
1233 }; 1329 };
1234 }; 1330 };
1235 1331
1236 hiubus: bus@ff63c000 { !! 1332 sram: sram@fffc0000 {
1237 compatible = "simple- !! 1333 compatible = "amlogic,meson-axg-sram", "mmio-sram";
1238 reg = <0x0 0xff63c000 !! 1334 reg = <0x0 0xfffc0000 0x0 0x20000>;
1239 #address-cells = <2>; !! 1335 #address-cells = <1>;
1240 #size-cells = <2>; !! 1336 #size-cells = <1>;
1241 ranges = <0x0 0x0 0x0 !! 1337 ranges = <0 0x0 0xfffc0000 0x20000>;
1242 <<
1243 sysctrl: system-contr <<
1244 compatible = <<
1245 <<
1246 reg = <0 0 0 <<
1247 <<
1248 clkc: clock-c <<
1249 compa <<
1250 #cloc <<
1251 clock <<
1252 clock <<
1253 }; <<
1254 <<
1255 pwrc: power-c <<
1256 compa <<
1257 #powe <<
1258 amlog <<
1259 reset <<
1260 <<
1261 <<
1262 <<
1263 <<
1264 reset <<
1265 <<
1266 clock <<
1267 <<
1268 clock <<
1269 /* <<
1270 * VP <<
1271 * VP <<
1272 * fr <<
1273 * Sa <<
1274 */ <<
1275 assig <<
1276 <<
1277 <<
1278 <<
1279 <<
1280 <<
1281 assig <<
1282 <<
1283 <<
1284 <<
1285 <<
1286 <<
1287 assig <<
1288 <<
1289 <<
1290 <<
1291 <<
1292 <<
1293 }; <<
1294 <<
1295 mipi_pcie_ana <<
1296 compa <<
1297 #phy- <<
1298 statu <<
1299 }; <<
1300 }; <<
1301 }; <<
1302 <<
1303 mailbox: mailbox@ff63c404 { <<
1304 compatible = "amlogic <<
1305 reg = <0 0xff63c404 0 <<
1306 interrupts = <GIC_SPI <<
1307 <GIC_SPI <<
1308 <GIC_SPI <<
1309 #mbox-cells = <1>; <<
1310 }; <<
1311 <<
1312 mipi_dphy: phy@ff640000 { <<
1313 compatible = "amlogic <<
1314 reg = <0x0 0xff640000 <<
1315 clocks = <&clkc CLKID <<
1316 clock-names = "pclk"; <<
1317 resets = <&reset RESE <<
1318 reset-names = "phy"; <<
1319 phys = <&mipi_pcie_an <<
1320 phy-names = "analog"; <<
1321 #phy-cells = <0>; <<
1322 status = "disabled"; <<
1323 }; <<
1324 <<
1325 audio: bus@ff642000 { <<
1326 compatible = "simple- <<
1327 reg = <0x0 0xff642000 <<
1328 #address-cells = <2>; <<
1329 #size-cells = <2>; <<
1330 ranges = <0x0 0x0 0x0 <<
1331 <<
1332 clkc_audio: clock-con <<
1333 compatible = <<
1334 reg = <0x0 0x <<
1335 #clock-cells <<
1336 <<
1337 clocks = <&cl <<
1338 <&cl <<
1339 <&cl <<
1340 <&cl <<
1341 <&cl <<
1342 <&cl <<
1343 <&cl <<
1344 <&cl <<
1345 <&cl <<
1346 clock-names = <<
1347 <<
1348 <<
1349 <<
1350 <<
1351 <<
1352 <<
1353 <<
1354 <<
1355 <<
1356 resets = <&re <<
1357 }; <<
1358 <<
1359 toddr_a: audio-contro <<
1360 compatible = <<
1361 reg = <0x0 0x <<
1362 #sound-dai-ce <<
1363 sound-name-pr <<
1364 interrupts = <<
1365 clocks = <&cl <<
1366 resets = <&ar <<
1367 amlogic,fifo- <<
1368 status = "dis <<
1369 }; <<
1370 <<
1371 toddr_b: audio-contro <<
1372 compatible = <<
1373 reg = <0x0 0x <<
1374 #sound-dai-ce <<
1375 sound-name-pr <<
1376 interrupts = <<
1377 clocks = <&cl <<
1378 resets = <&ar <<
1379 amlogic,fifo- <<
1380 status = "dis <<
1381 }; <<
1382 <<
1383 toddr_c: audio-contro <<
1384 compatible = <<
1385 reg = <0x0 0x <<
1386 #sound-dai-ce <<
1387 sound-name-pr <<
1388 interrupts = <<
1389 clocks = <&cl <<
1390 resets = <&ar <<
1391 amlogic,fifo- <<
1392 status = "dis <<
1393 }; <<
1394 <<
1395 frddr_a: audio-contro <<
1396 compatible = <<
1397 reg = <0x0 0x <<
1398 #sound-dai-ce <<
1399 sound-name-pr <<
1400 interrupts = <<
1401 clocks = <&cl <<
1402 resets = <&ar <<
1403 amlogic,fifo- <<
1404 status = "dis <<
1405 }; <<
1406 <<
1407 frddr_b: audio-contro <<
1408 compatible = <<
1409 reg = <0x0 0x <<
1410 #sound-dai-ce <<
1411 sound-name-pr <<
1412 interrupts = <<
1413 clocks = <&cl <<
1414 resets = <&ar <<
1415 amlogic,fifo- <<
1416 status = "dis <<
1417 }; <<
1418 <<
1419 frddr_c: audio-contro <<
1420 compatible = <<
1421 reg = <0x0 0x <<
1422 #sound-dai-ce <<
1423 sound-name-pr <<
1424 interrupts = <<
1425 clocks = <&cl <<
1426 resets = <&ar <<
1427 amlogic,fifo- <<
1428 status = "dis <<
1429 }; <<
1430 <<
1431 arb: reset-controller <<
1432 compatible = <<
1433 reg = <0x0 0x <<
1434 #reset-cells <<
1435 clocks = <&cl <<
1436 }; <<
1437 <<
1438 tdmin_a: audio-contro <<
1439 compatible = <<
1440 reg = <0x0 0x <<
1441 sound-name-pr <<
1442 clocks = <&cl <<
1443 <&cl <<
1444 <&cl <<
1445 <&cl <<
1446 <&cl <<
1447 clock-names = <<
1448 <<
1449 status = "dis <<
1450 }; <<
1451 <<
1452 tdmin_b: audio-contro <<
1453 compatible = <<
1454 reg = <0x0 0x <<
1455 sound-name-pr <<
1456 clocks = <&cl <<
1457 <&cl <<
1458 <&cl <<
1459 <&cl <<
1460 <&cl <<
1461 clock-names = <<
1462 <<
1463 status = "dis <<
1464 }; <<
1465 <<
1466 tdmin_c: audio-contro <<
1467 compatible = <<
1468 reg = <0x0 0x <<
1469 sound-name-pr <<
1470 clocks = <&cl <<
1471 <&cl <<
1472 <&cl <<
1473 <&cl <<
1474 <&cl <<
1475 clock-names = <<
1476 <<
1477 status = "dis <<
1478 }; <<
1479 <<
1480 tdmin_lb: audio-contr <<
1481 compatible = <<
1482 reg = <0x0 0x <<
1483 sound-name-pr <<
1484 clocks = <&cl <<
1485 <&cl <<
1486 <&cl <<
1487 <&cl <<
1488 <&cl <<
1489 clock-names = <<
1490 <<
1491 status = "dis <<
1492 }; <<
1493 <<
1494 spdifin: audio-contro <<
1495 compatible = <<
1496 reg = <0x0 0x <<
1497 #sound-dai-ce <<
1498 sound-name-pr <<
1499 interrupts = <<
1500 clocks = <&cl <<
1501 <&cl <<
1502 clock-names = <<
1503 status = "dis <<
1504 }; <<
1505 <<
1506 spdifout: audio-contr <<
1507 compatible = <<
1508 reg = <0x0 0x <<
1509 #sound-dai-ce <<
1510 sound-name-pr <<
1511 clocks = <&cl <<
1512 <&cl <<
1513 clock-names = <<
1514 status = "dis <<
1515 }; <<
1516 <<
1517 tdmout_a: audio-contr <<
1518 compatible = <<
1519 reg = <0x0 0x <<
1520 sound-name-pr <<
1521 clocks = <&cl <<
1522 <&cl <<
1523 <&cl <<
1524 <&cl <<
1525 <&cl <<
1526 clock-names = <<
1527 <<
1528 status = "dis <<
1529 }; <<
1530 1338
1531 tdmout_b: audio-contr !! 1339 cpu_scp_lpri: scp-shmem@0 {
1532 compatible = !! 1340 compatible = "amlogic,meson-axg-scp-shmem";
1533 reg = <0x0 0x !! 1341 reg = <0x13000 0x400>;
1534 sound-name-pr <<
1535 clocks = <&cl <<
1536 <&cl <<
1537 <&cl <<
1538 <&cl <<
1539 <&cl <<
1540 clock-names = <<
1541 <<
1542 status = "dis <<
1543 }; 1342 };
1544 1343
1545 tdmout_c: audio-contr !! 1344 cpu_scp_hpri: scp-shmem@200 {
1546 compatible = !! 1345 compatible = "amlogic,meson-axg-scp-shmem";
1547 reg = <0x0 0x !! 1346 reg = <0x13400 0x400>;
1548 sound-name-pr <<
1549 clocks = <&cl <<
1550 <&cl <<
1551 <&cl <<
1552 <&cl <<
1553 <&cl <<
1554 clock-names = <<
1555 <<
1556 status = "dis <<
1557 }; 1347 };
1558 }; 1348 };
1559 1349
1560 aobus: bus@ff800000 { 1350 aobus: bus@ff800000 {
1561 compatible = "simple- 1351 compatible = "simple-bus";
1562 reg = <0x0 0xff800000 1352 reg = <0x0 0xff800000 0x0 0x100000>;
1563 #address-cells = <2>; 1353 #address-cells = <2>;
1564 #size-cells = <2>; 1354 #size-cells = <2>;
1565 ranges = <0x0 0x0 0x0 1355 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1566 1356
1567 sysctrl_AO: sys-ctrl@ 1357 sysctrl_AO: sys-ctrl@0 {
1568 compatible = !! 1358 compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd";
1569 reg = <0x0 0x !! 1359 reg = <0x0 0x0 0x0 0x100>;
1570 1360
1571 clkc_AO: cloc 1361 clkc_AO: clock-controller {
1572 compa 1362 compatible = "amlogic,meson-axg-aoclkc";
1573 #cloc 1363 #clock-cells = <1>;
1574 #rese 1364 #reset-cells = <1>;
1575 clock <<
1576 clock <<
1577 }; 1365 };
1578 }; 1366 };
1579 1367
1580 pinctrl_aobus: pinctr 1368 pinctrl_aobus: pinctrl@14 {
1581 compatible = 1369 compatible = "amlogic,meson-axg-aobus-pinctrl";
1582 #address-cell 1370 #address-cells = <2>;
1583 #size-cells = 1371 #size-cells = <2>;
1584 ranges; 1372 ranges;
1585 1373
1586 gpio_ao: bank 1374 gpio_ao: bank@14 {
1587 reg = 1375 reg = <0x0 0x00014 0x0 0x8>,
1588 !! 1376 <0x0 0x0002c 0x0 0x4>,
1589 !! 1377 <0x0 0x00024 0x0 0x8>;
1590 reg-n 1378 reg-names = "mux", "pull", "gpio";
1591 gpio- 1379 gpio-controller;
1592 #gpio 1380 #gpio-cells = <2>;
1593 gpio- 1381 gpio-ranges = <&pinctrl_aobus 0 0 15>;
1594 }; 1382 };
1595 1383
1596 i2c_ao_sck_4_ 1384 i2c_ao_sck_4_pins: i2c_ao_sck_4 {
1597 mux { 1385 mux {
1598 1386 groups = "i2c_ao_sck_4";
1599 1387 function = "i2c_ao";
1600 <<
1601 }; 1388 };
1602 }; 1389 };
1603 1390
1604 i2c_ao_sck_8_ 1391 i2c_ao_sck_8_pins: i2c_ao_sck_8 {
1605 mux { 1392 mux {
1606 1393 groups = "i2c_ao_sck_8";
1607 1394 function = "i2c_ao";
1608 <<
1609 }; 1395 };
1610 }; 1396 };
1611 1397
1612 i2c_ao_sck_10 1398 i2c_ao_sck_10_pins: i2c_ao_sck_10 {
1613 mux { 1399 mux {
1614 1400 groups = "i2c_ao_sck_10";
1615 1401 function = "i2c_ao";
1616 <<
1617 }; 1402 };
1618 }; 1403 };
1619 1404
1620 i2c_ao_sda_5_ 1405 i2c_ao_sda_5_pins: i2c_ao_sda_5 {
1621 mux { 1406 mux {
1622 1407 groups = "i2c_ao_sda_5";
1623 1408 function = "i2c_ao";
1624 <<
1625 }; 1409 };
1626 }; 1410 };
1627 1411
1628 i2c_ao_sda_9_ 1412 i2c_ao_sda_9_pins: i2c_ao_sda_9 {
1629 mux { 1413 mux {
1630 1414 groups = "i2c_ao_sda_9";
1631 1415 function = "i2c_ao";
1632 <<
1633 }; 1416 };
1634 }; 1417 };
1635 1418
1636 i2c_ao_sda_11 1419 i2c_ao_sda_11_pins: i2c_ao_sda_11 {
1637 mux { 1420 mux {
1638 1421 groups = "i2c_ao_sda_11";
1639 1422 function = "i2c_ao";
1640 <<
1641 }; 1423 };
1642 }; 1424 };
1643 1425
1644 remote_input_ 1426 remote_input_ao_pins: remote_input_ao {
1645 mux { 1427 mux {
1646 1428 groups = "remote_input_ao";
1647 1429 function = "remote_input_ao";
1648 <<
1649 }; 1430 };
1650 }; 1431 };
1651 1432
1652 uart_ao_a_pin 1433 uart_ao_a_pins: uart_ao_a {
1653 mux { 1434 mux {
1654 1435 groups = "uart_ao_tx_a",
1655 !! 1436 "uart_ao_rx_a";
1656 1437 function = "uart_ao_a";
1657 <<
1658 }; 1438 };
1659 }; 1439 };
1660 1440
1661 uart_ao_a_cts 1441 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
1662 mux { 1442 mux {
1663 1443 groups = "uart_ao_cts_a",
1664 !! 1444 "uart_ao_rts_a";
1665 1445 function = "uart_ao_a";
1666 <<
1667 }; 1446 };
1668 }; 1447 };
1669 1448
1670 uart_ao_b_pin 1449 uart_ao_b_pins: uart_ao_b {
1671 mux { 1450 mux {
1672 1451 groups = "uart_ao_tx_b",
1673 !! 1452 "uart_ao_rx_b";
1674 1453 function = "uart_ao_b";
1675 <<
1676 }; 1454 };
1677 }; 1455 };
1678 1456
1679 uart_ao_b_cts 1457 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
1680 mux { 1458 mux {
1681 1459 groups = "uart_ao_cts_b",
1682 !! 1460 "uart_ao_rts_b";
1683 1461 function = "uart_ao_b";
1684 <<
1685 }; 1462 };
1686 }; 1463 };
1687 }; 1464 };
1688 1465
1689 sec_AO: ao-secure@140 1466 sec_AO: ao-secure@140 {
1690 compatible = 1467 compatible = "amlogic,meson-gx-ao-secure", "syscon";
1691 reg = <0x0 0x 1468 reg = <0x0 0x140 0x0 0x140>;
1692 amlogic,has-c 1469 amlogic,has-chip-id;
1693 }; 1470 };
1694 1471
>> 1472 pwm_AO_ab: pwm@7000 {
>> 1473 compatible = "amlogic,meson-axg-ao-pwm";
>> 1474 reg = <0x0 0x07000 0x0 0x20>;
>> 1475 #pwm-cells = <3>;
>> 1476 status = "disabled";
>> 1477 };
>> 1478
1695 pwm_AO_cd: pwm@2000 { 1479 pwm_AO_cd: pwm@2000 {
1696 compatible = 1480 compatible = "amlogic,meson-axg-ao-pwm";
1697 reg = <0x0 0x 1481 reg = <0x0 0x02000 0x0 0x20>;
1698 #pwm-cells = 1482 #pwm-cells = <3>;
1699 status = "dis 1483 status = "disabled";
1700 }; 1484 };
1701 1485
>> 1486 i2c_AO: i2c@5000 {
>> 1487 compatible = "amlogic,meson-axg-i2c";
>> 1488 reg = <0x0 0x05000 0x0 0x20>;
>> 1489 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
>> 1490 clocks = <&clkc CLKID_AO_I2C>;
>> 1491 #address-cells = <1>;
>> 1492 #size-cells = <0>;
>> 1493 status = "disabled";
>> 1494 };
>> 1495
1702 uart_AO: serial@3000 1496 uart_AO: serial@3000 {
1703 compatible = 1497 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
1704 reg = <0x0 0x 1498 reg = <0x0 0x3000 0x0 0x18>;
1705 interrupts = 1499 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
1706 clocks = <&xt 1500 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
1707 clock-names = 1501 clock-names = "xtal", "pclk", "baud";
1708 status = "dis 1502 status = "disabled";
1709 }; 1503 };
1710 1504
1711 uart_AO_B: serial@400 1505 uart_AO_B: serial@4000 {
1712 compatible = 1506 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
1713 reg = <0x0 0x 1507 reg = <0x0 0x4000 0x0 0x18>;
1714 interrupts = 1508 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
1715 clocks = <&xt 1509 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
1716 clock-names = 1510 clock-names = "xtal", "pclk", "baud";
1717 status = "dis 1511 status = "disabled";
1718 }; 1512 };
1719 1513
1720 i2c_AO: i2c@5000 { <<
1721 compatible = <<
1722 reg = <0x0 0x <<
1723 interrupts = <<
1724 clocks = <&cl <<
1725 #address-cell <<
1726 #size-cells = <<
1727 status = "dis <<
1728 }; <<
1729 <<
1730 pwm_AO_ab: pwm@7000 { <<
1731 compatible = <<
1732 reg = <0x0 0x <<
1733 #pwm-cells = <<
1734 status = "dis <<
1735 }; <<
1736 <<
1737 ir: ir@8000 { 1514 ir: ir@8000 {
1738 compatible = 1515 compatible = "amlogic,meson-gxbb-ir";
1739 reg = <0x0 0x 1516 reg = <0x0 0x8000 0x0 0x20>;
1740 interrupts = 1517 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
1741 status = "dis 1518 status = "disabled";
1742 }; 1519 };
1743 1520
1744 saradc: adc@9000 { 1521 saradc: adc@9000 {
1745 compatible = 1522 compatible = "amlogic,meson-axg-saradc",
1746 "amlo 1523 "amlogic,meson-saradc";
1747 reg = <0x0 0x 1524 reg = <0x0 0x9000 0x0 0x38>;
1748 #io-channel-c 1525 #io-channel-cells = <1>;
1749 interrupts = 1526 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
1750 clocks = <&xt 1527 clocks = <&xtal>,
1751 <&cl !! 1528 <&clkc_AO CLKID_AO_SAR_ADC>,
1752 <&cl !! 1529 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
1753 <&cl !! 1530 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
1754 clock-names = 1531 clock-names = "clkin", "core", "adc_clk", "adc_sel";
1755 status = "dis 1532 status = "disabled";
1756 }; 1533 };
1757 }; 1534 };
1758 <<
1759 ge2d: ge2d@ff940000 { <<
1760 compatible = "amlogic <<
1761 reg = <0x0 0xff940000 <<
1762 interrupts = <GIC_SPI <<
1763 clocks = <&clkc CLKID <<
1764 resets = <&reset RESE <<
1765 }; <<
1766 <<
1767 gic: interrupt-controller@ffc <<
1768 compatible = "arm,gic <<
1769 reg = <0x0 0xffc01000 <<
1770 <0x0 0xffc02000 <<
1771 <0x0 0xffc04000 <<
1772 <0x0 0xffc06000 <<
1773 interrupt-controller; <<
1774 interrupts = <GIC_PPI <<
1775 (GIC_CPU_MASK <<
1776 #interrupt-cells = <3 <<
1777 #address-cells = <0>; <<
1778 }; <<
1779 <<
1780 cbus: bus@ffd00000 { <<
1781 compatible = "simple- <<
1782 reg = <0x0 0xffd00000 <<
1783 #address-cells = <2>; <<
1784 #size-cells = <2>; <<
1785 ranges = <0x0 0x0 0x0 <<
1786 <<
1787 reset: reset-controll <<
1788 compatible = <<
1789 reg = <0x0 0x <<
1790 #reset-cells <<
1791 }; <<
1792 <<
1793 gpio_intc: interrupt- <<
1794 compatible = <<
1795 <<
1796 reg = <0x0 0x <<
1797 interrupt-con <<
1798 #interrupt-ce <<
1799 amlogic,chann <<
1800 }; <<
1801 <<
1802 watchdog@f0d0 { <<
1803 compatible = <<
1804 reg = <0x0 0x <<
1805 clocks = <&xt <<
1806 }; <<
1807 <<
1808 pwm_ab: pwm@1b000 { <<
1809 compatible = <<
1810 reg = <0x0 0x <<
1811 #pwm-cells = <<
1812 status = "dis <<
1813 }; <<
1814 <<
1815 pwm_cd: pwm@1a000 { <<
1816 compatible = <<
1817 reg = <0x0 0x <<
1818 #pwm-cells = <<
1819 status = "dis <<
1820 }; <<
1821 <<
1822 spicc0: spi@13000 { <<
1823 compatible = <<
1824 reg = <0x0 0x <<
1825 interrupts = <<
1826 clocks = <&cl <<
1827 clock-names = <<
1828 #address-cell <<
1829 #size-cells = <<
1830 status = "dis <<
1831 }; <<
1832 <<
1833 spicc1: spi@15000 { <<
1834 compatible = <<
1835 reg = <0x0 0x <<
1836 interrupts = <<
1837 clocks = <&cl <<
1838 clock-names = <<
1839 #address-cell <<
1840 #size-cells = <<
1841 status = "dis <<
1842 }; <<
1843 <<
1844 clk_msr: clock-measur <<
1845 compatible = <<
1846 reg = <0x0 0x <<
1847 }; <<
1848 <<
1849 i2c3: i2c@1c000 { <<
1850 compatible = <<
1851 reg = <0x0 0x <<
1852 interrupts = <<
1853 clocks = <&cl <<
1854 #address-cell <<
1855 #size-cells = <<
1856 status = "dis <<
1857 }; <<
1858 <<
1859 i2c2: i2c@1d000 { <<
1860 compatible = <<
1861 reg = <0x0 0x <<
1862 interrupts = <<
1863 clocks = <&cl <<
1864 #address-cell <<
1865 #size-cells = <<
1866 status = "dis <<
1867 }; <<
1868 <<
1869 i2c1: i2c@1e000 { <<
1870 compatible = <<
1871 reg = <0x0 0x <<
1872 interrupts = <<
1873 clocks = <&cl <<
1874 #address-cell <<
1875 #size-cells = <<
1876 status = "dis <<
1877 }; <<
1878 <<
1879 i2c0: i2c@1f000 { <<
1880 compatible = <<
1881 reg = <0x0 0x <<
1882 interrupts = <<
1883 clocks = <&cl <<
1884 #address-cell <<
1885 #size-cells = <<
1886 status = "dis <<
1887 }; <<
1888 <<
1889 uart_B: serial@23000 <<
1890 compatible = <<
1891 reg = <0x0 0x <<
1892 interrupts = <<
1893 status = "dis <<
1894 clocks = <&xt <<
1895 clock-names = <<
1896 }; <<
1897 <<
1898 uart_A: serial@24000 <<
1899 compatible = <<
1900 reg = <0x0 0x <<
1901 interrupts = <<
1902 status = "dis <<
1903 clocks = <&xt <<
1904 clock-names = <<
1905 fifo-size = < <<
1906 }; <<
1907 }; <<
1908 <<
1909 apb: bus@ffe00000 { <<
1910 compatible = "simple- <<
1911 reg = <0x0 0xffe00000 <<
1912 #address-cells = <2>; <<
1913 #size-cells = <2>; <<
1914 ranges = <0x0 0x0 0x0 <<
1915 <<
1916 sd_emmc_b: mmc@5000 { <<
1917 compatible = <<
1918 reg = <0x0 0x <<
1919 interrupts = <<
1920 status = "dis <<
1921 clocks = <&cl <<
1922 <&clk <<
1923 <&clk <<
1924 clock-names = <<
1925 resets = <&re <<
1926 }; <<
1927 <<
1928 sd_emmc_c: mmc@7000 { <<
1929 compatible = <<
1930 reg = <0x0 0x <<
1931 interrupts = <<
1932 status = "dis <<
1933 clocks = <&cl <<
1934 <&clk <<
1935 <&clk <<
1936 clock-names = <<
1937 resets = <&re <<
1938 }; <<
1939 <<
1940 nfc: nand-controller@ <<
1941 compatible = <<
1942 reg = <0x0 0x <<
1943 <0x0 0x <<
1944 reg-names = " <<
1945 pinctrl-0 = < <<
1946 pinctrl-names <<
1947 #address-cell <<
1948 #size-cells = <<
1949 interrupts = <<
1950 clocks = <&cl <<
1951 <&cl <<
1952 clock-names = <<
1953 }; <<
1954 <<
1955 usb2_phy1: phy@9020 { <<
1956 compatible = <<
1957 #phy-cells = <<
1958 reg = <0x0 0x <<
1959 clocks = <&cl <<
1960 clock-names = <<
1961 resets = <&re <<
1962 reset-names = <<
1963 }; <<
1964 }; <<
1965 <<
1966 sram: sram@fffc0000 { <<
1967 compatible = "mmio-sr <<
1968 reg = <0x0 0xfffc0000 <<
1969 #address-cells = <1>; <<
1970 #size-cells = <1>; <<
1971 ranges = <0 0x0 0xfff <<
1972 <<
1973 cpu_scp_lpri: scp-sra <<
1974 compatible = <<
1975 reg = <0x1300 <<
1976 }; <<
1977 <<
1978 cpu_scp_hpri: scp-sra <<
1979 compatible = <<
1980 reg = <0x1340 <<
1981 }; <<
1982 }; <<
1983 }; <<
1984 <<
1985 timer { <<
1986 compatible = "arm,armv8-timer <<
1987 interrupts = <GIC_PPI 13 <<
1988 (GIC_CPU_MASK_RAW(0xf <<
1989 <GIC_PPI 14 <<
1990 (GIC_CPU_MASK_RAW(0xf <<
1991 <GIC_PPI 11 <<
1992 (GIC_CPU_MASK_RAW(0xf <<
1993 <GIC_PPI 10 <<
1994 (GIC_CPU_MASK_RAW(0xf <<
1995 }; <<
1996 <<
1997 xtal: xtal-clk { <<
1998 compatible = "fixed-clock"; <<
1999 clock-frequency = <24000000>; <<
2000 clock-output-names = "xtal"; <<
2001 #clock-cells = <0>; <<
2002 }; 1535 };
2003 }; 1536 };
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