1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2018 BayLibre SAS. All rights 3 * Copyright (c) 2018 BayLibre SAS. All rights reserved.
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "meson-g12a.dtsi" 8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/meson-g12a-gpio.h> 9 #include <dt-bindings/gpio/meson-g12a-gpio.h>
10 #include <dt-bindings/sound/meson-g12a-tohdmit 10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
11 11
12 / { 12 / {
13 compatible = "radxa,zero", "amlogic,g1 13 compatible = "radxa,zero", "amlogic,g12a";
14 model = "Radxa Zero"; 14 model = "Radxa Zero";
15 15
16 aliases { 16 aliases {
17 serial0 = &uart_AO; 17 serial0 = &uart_AO;
18 }; 18 };
19 19
20 chosen { 20 chosen {
21 stdout-path = "serial0:115200n 21 stdout-path = "serial0:115200n8";
22 }; 22 };
23 23
24 memory@0 { 24 memory@0 {
25 device_type = "memory"; 25 device_type = "memory";
26 reg = <0x0 0x0 0x0 0x40000000> 26 reg = <0x0 0x0 0x0 0x40000000>;
27 }; 27 };
28 28
29 cvbs-connector { 29 cvbs-connector {
30 status = "disabled"; 30 status = "disabled";
31 compatible = "composite-video- 31 compatible = "composite-video-connector";
32 32
33 port { 33 port {
34 cvbs_connector_in: end 34 cvbs_connector_in: endpoint {
35 remote-endpoin 35 remote-endpoint = <&cvbs_vdac_out>;
36 }; 36 };
37 }; 37 };
38 }; 38 };
39 39
40 hdmi-connector { 40 hdmi-connector {
41 compatible = "hdmi-connector"; 41 compatible = "hdmi-connector";
42 type = "a"; 42 type = "a";
43 43
44 port { 44 port {
45 hdmi_connector_in: end 45 hdmi_connector_in: endpoint {
46 remote-endpoin 46 remote-endpoint = <&hdmi_tx_tmds_out>;
47 }; 47 };
48 }; 48 };
49 }; 49 };
50 50
51 emmc_pwrseq: emmc-pwrseq { 51 emmc_pwrseq: emmc-pwrseq {
52 compatible = "mmc-pwrseq-emmc" 52 compatible = "mmc-pwrseq-emmc";
53 reset-gpios = <&gpio BOOT_12 G 53 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
54 }; 54 };
55 55
56 sdio_pwrseq: sdio-pwrseq { 56 sdio_pwrseq: sdio-pwrseq {
57 compatible = "mmc-pwrseq-simpl 57 compatible = "mmc-pwrseq-simple";
58 reset-gpios = <&gpio GPIOX_6 G 58 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
59 clocks = <&wifi32k>; 59 clocks = <&wifi32k>;
60 clock-names = "ext_clock"; 60 clock-names = "ext_clock";
61 }; 61 };
62 62
63 ao_5v: regulator-ao-5v { 63 ao_5v: regulator-ao-5v {
64 compatible = "regulator-fixed" 64 compatible = "regulator-fixed";
65 regulator-name = "AO_5V"; 65 regulator-name = "AO_5V";
66 regulator-min-microvolt = <500 66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <500 67 regulator-max-microvolt = <5000000>;
68 regulator-always-on; 68 regulator-always-on;
69 }; 69 };
70 70
71 vcc_1v8: regulator-vcc-1v8 { 71 vcc_1v8: regulator-vcc-1v8 {
72 compatible = "regulator-fixed" 72 compatible = "regulator-fixed";
73 regulator-name = "VCC_1V8"; 73 regulator-name = "VCC_1V8";
74 regulator-min-microvolt = <180 74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <180 75 regulator-max-microvolt = <1800000>;
76 vin-supply = <&vcc_3v3>; 76 vin-supply = <&vcc_3v3>;
77 regulator-always-on; 77 regulator-always-on;
78 }; 78 };
79 79
80 vcc_3v3: regulator-vcc-3v3 { 80 vcc_3v3: regulator-vcc-3v3 {
81 compatible = "regulator-fixed" 81 compatible = "regulator-fixed";
82 regulator-name = "VCC_3V3"; 82 regulator-name = "VCC_3V3";
83 regulator-min-microvolt = <330 83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <330 84 regulator-max-microvolt = <3300000>;
85 vin-supply = <&vddao_3v3>; 85 vin-supply = <&vddao_3v3>;
86 regulator-always-on; 86 regulator-always-on;
87 }; 87 };
88 88
89 hdmi_pw: regulator-hdmi-pw { 89 hdmi_pw: regulator-hdmi-pw {
90 compatible = "regulator-fixed" 90 compatible = "regulator-fixed";
91 regulator-name = "HDMI_PW"; 91 regulator-name = "HDMI_PW";
92 regulator-min-microvolt = <500 92 regulator-min-microvolt = <5000000>;
93 regulator-max-microvolt = <500 93 regulator-max-microvolt = <5000000>;
94 vin-supply = <&ao_5v>; 94 vin-supply = <&ao_5v>;
95 regulator-always-on; 95 regulator-always-on;
96 }; 96 };
97 97
98 vddao_1v8: regulator-vddao-1v8 { 98 vddao_1v8: regulator-vddao-1v8 {
99 compatible = "regulator-fixed" 99 compatible = "regulator-fixed";
100 regulator-name = "VDDAO_1V8"; 100 regulator-name = "VDDAO_1V8";
101 regulator-min-microvolt = <180 101 regulator-min-microvolt = <1800000>;
102 regulator-max-microvolt = <180 102 regulator-max-microvolt = <1800000>;
103 vin-supply = <&vddao_3v3>; 103 vin-supply = <&vddao_3v3>;
104 regulator-always-on; 104 regulator-always-on;
105 }; 105 };
106 106
107 vddao_3v3: regulator-vddao-3v3 { 107 vddao_3v3: regulator-vddao-3v3 {
108 compatible = "regulator-fixed" 108 compatible = "regulator-fixed";
109 regulator-name = "VDDAO_3V3"; 109 regulator-name = "VDDAO_3V3";
110 regulator-min-microvolt = <330 110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <330 111 regulator-max-microvolt = <3300000>;
112 vin-supply = <&ao_5v>; 112 vin-supply = <&ao_5v>;
113 regulator-always-on; 113 regulator-always-on;
114 }; 114 };
115 115
116 vddcpu: regulator-vddcpu { 116 vddcpu: regulator-vddcpu {
117 compatible = "pwm-regulator"; 117 compatible = "pwm-regulator";
118 118
119 regulator-name = "VDDCPU"; 119 regulator-name = "VDDCPU";
120 regulator-min-microvolt = <721 120 regulator-min-microvolt = <721000>;
121 regulator-max-microvolt = <102 121 regulator-max-microvolt = <1022000>;
122 122
123 vin-supply = <&ao_5v>; 123 vin-supply = <&ao_5v>;
124 124
125 pwms = <&pwm_AO_cd 1 1250 0>; 125 pwms = <&pwm_AO_cd 1 1250 0>;
126 pwm-dutycycle-range = <100 0>; 126 pwm-dutycycle-range = <100 0>;
127 127
128 regulator-boot-on; 128 regulator-boot-on;
129 regulator-always-on; 129 regulator-always-on;
130 }; 130 };
131 131
132 sound { 132 sound {
133 compatible = "amlogic,axg-soun 133 compatible = "amlogic,axg-sound-card";
134 model = "RADXA-ZERO"; 134 model = "RADXA-ZERO";
135 audio-aux-devs = <&tdmout_b>; 135 audio-aux-devs = <&tdmout_b>;
136 audio-routing = "TDMOUT_B IN 0 136 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
137 "TDMOUT_B IN 1 137 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
138 "TDMOUT_B IN 2 138 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
139 "TDM_B Playbac 139 "TDM_B Playback", "TDMOUT_B OUT";
140 140
141 clocks = <&clkc CLKID_MPLL2>, 141 clocks = <&clkc CLKID_MPLL2>,
142 <&clkc CLKID_MPLL0>, 142 <&clkc CLKID_MPLL0>,
143 <&clkc CLKID_MPLL1>; 143 <&clkc CLKID_MPLL1>;
144 144
145 assigned-clocks = <&clkc CLKID 145 assigned-clocks = <&clkc CLKID_MPLL2>,
146 <&clkc CLKID 146 <&clkc CLKID_MPLL0>,
147 <&clkc CLKID 147 <&clkc CLKID_MPLL1>;
148 assigned-clock-parents = <0>, 148 assigned-clock-parents = <0>, <0>, <0>;
149 assigned-clock-rates = <294912 149 assigned-clock-rates = <294912000>,
150 <270950 150 <270950400>,
151 <393216 151 <393216000>;
152 152
153 dai-link-0 { 153 dai-link-0 {
154 sound-dai = <&frddr_a> 154 sound-dai = <&frddr_a>;
155 }; 155 };
156 156
157 dai-link-1 { 157 dai-link-1 {
158 sound-dai = <&frddr_b> 158 sound-dai = <&frddr_b>;
159 }; 159 };
160 160
161 dai-link-2 { 161 dai-link-2 {
162 sound-dai = <&frddr_c> 162 sound-dai = <&frddr_c>;
163 }; 163 };
164 164
165 /* 8ch hdmi interface */ 165 /* 8ch hdmi interface */
166 dai-link-3 { 166 dai-link-3 {
167 sound-dai = <&tdmif_b> 167 sound-dai = <&tdmif_b>;
168 dai-format = "i2s"; 168 dai-format = "i2s";
169 dai-tdm-slot-tx-mask-0 169 dai-tdm-slot-tx-mask-0 = <1 1>;
170 dai-tdm-slot-tx-mask-1 170 dai-tdm-slot-tx-mask-1 = <1 1>;
171 dai-tdm-slot-tx-mask-2 171 dai-tdm-slot-tx-mask-2 = <1 1>;
172 dai-tdm-slot-tx-mask-3 172 dai-tdm-slot-tx-mask-3 = <1 1>;
173 mclk-fs = <256>; 173 mclk-fs = <256>;
174 174
175 codec { 175 codec {
176 sound-dai = <& 176 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
177 }; 177 };
178 }; 178 };
179 179
180 dai-link-4 { 180 dai-link-4 {
181 sound-dai = <&tohdmitx 181 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
182 182
183 codec { 183 codec {
184 sound-dai = <& 184 sound-dai = <&hdmi_tx>;
185 }; 185 };
186 }; 186 };
187 }; 187 };
188 188
189 wifi32k: wifi32k { 189 wifi32k: wifi32k {
190 compatible = "pwm-clock"; 190 compatible = "pwm-clock";
191 #clock-cells = <0>; 191 #clock-cells = <0>;
192 clock-frequency = <32768>; 192 clock-frequency = <32768>;
193 pwms = <&pwm_ef 0 30518 0>; /* 193 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
194 }; 194 };
195 }; 195 };
196 196
197 &arb { 197 &arb {
198 status = "okay"; 198 status = "okay";
199 }; 199 };
200 200
201 &cec_AO { 201 &cec_AO {
202 pinctrl-0 = <&cec_ao_a_h_pins>; 202 pinctrl-0 = <&cec_ao_a_h_pins>;
203 pinctrl-names = "default"; 203 pinctrl-names = "default";
204 status = "disabled"; 204 status = "disabled";
205 hdmi-phandle = <&hdmi_tx>; 205 hdmi-phandle = <&hdmi_tx>;
206 }; 206 };
207 207
208 &cecb_AO { 208 &cecb_AO {
209 pinctrl-0 = <&cec_ao_b_h_pins>; 209 pinctrl-0 = <&cec_ao_b_h_pins>;
210 pinctrl-names = "default"; 210 pinctrl-names = "default";
211 status = "okay"; 211 status = "okay";
212 hdmi-phandle = <&hdmi_tx>; 212 hdmi-phandle = <&hdmi_tx>;
213 }; 213 };
214 214
215 &clkc_audio { 215 &clkc_audio {
216 status = "okay"; 216 status = "okay";
217 }; 217 };
218 218
219 &cpu0 { 219 &cpu0 {
220 cpu-supply = <&vddcpu>; 220 cpu-supply = <&vddcpu>;
221 operating-points-v2 = <&cpu_opp_table> 221 operating-points-v2 = <&cpu_opp_table>;
222 clocks = <&clkc CLKID_CPU_CLK>; 222 clocks = <&clkc CLKID_CPU_CLK>;
223 clock-latency = <50000>; 223 clock-latency = <50000>;
224 }; 224 };
225 225
226 &cpu1 { 226 &cpu1 {
227 cpu-supply = <&vddcpu>; 227 cpu-supply = <&vddcpu>;
228 operating-points-v2 = <&cpu_opp_table> 228 operating-points-v2 = <&cpu_opp_table>;
229 clocks = <&clkc CLKID_CPU_CLK>; 229 clocks = <&clkc CLKID_CPU_CLK>;
230 clock-latency = <50000>; 230 clock-latency = <50000>;
231 }; 231 };
232 232
233 &cpu2 { 233 &cpu2 {
234 cpu-supply = <&vddcpu>; 234 cpu-supply = <&vddcpu>;
235 operating-points-v2 = <&cpu_opp_table> 235 operating-points-v2 = <&cpu_opp_table>;
236 clocks = <&clkc CLKID_CPU_CLK>; 236 clocks = <&clkc CLKID_CPU_CLK>;
237 clock-latency = <50000>; 237 clock-latency = <50000>;
238 }; 238 };
239 239
240 &cpu3 { 240 &cpu3 {
241 cpu-supply = <&vddcpu>; 241 cpu-supply = <&vddcpu>;
242 operating-points-v2 = <&cpu_opp_table> 242 operating-points-v2 = <&cpu_opp_table>;
243 clocks = <&clkc CLKID_CPU_CLK>; 243 clocks = <&clkc CLKID_CPU_CLK>;
244 clock-latency = <50000>; 244 clock-latency = <50000>;
245 }; 245 };
246 246
247 &cvbs_vdac_port { 247 &cvbs_vdac_port {
248 cvbs_vdac_out: endpoint { 248 cvbs_vdac_out: endpoint {
249 remote-endpoint = <&cvbs_conne 249 remote-endpoint = <&cvbs_connector_in>;
250 }; 250 };
251 }; 251 };
252 252
253 &frddr_a { 253 &frddr_a {
254 status = "okay"; 254 status = "okay";
255 }; 255 };
256 256
257 &frddr_b { 257 &frddr_b {
258 status = "okay"; 258 status = "okay";
259 }; 259 };
260 260
261 &frddr_c { 261 &frddr_c {
262 status = "okay"; 262 status = "okay";
263 }; 263 };
264 264
265 &hdmi_tx { 265 &hdmi_tx {
266 status = "okay"; 266 status = "okay";
267 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmi 267 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
268 pinctrl-names = "default"; 268 pinctrl-names = "default";
269 hdmi-supply = <&hdmi_pw>; 269 hdmi-supply = <&hdmi_pw>;
270 }; 270 };
271 271
272 &hdmi_tx_tmds_port { 272 &hdmi_tx_tmds_port {
273 hdmi_tx_tmds_out: endpoint { 273 hdmi_tx_tmds_out: endpoint {
274 remote-endpoint = <&hdmi_conne 274 remote-endpoint = <&hdmi_connector_in>;
275 }; 275 };
276 }; 276 };
277 277
278 &ir { 278 &ir {
279 status = "disabled"; 279 status = "disabled";
280 pinctrl-0 = <&remote_input_ao_pins>; 280 pinctrl-0 = <&remote_input_ao_pins>;
281 pinctrl-names = "default"; 281 pinctrl-names = "default";
282 }; 282 };
283 283
284 &pwm_AO_cd { 284 &pwm_AO_cd {
285 pinctrl-0 = <&pwm_ao_d_e_pins>; 285 pinctrl-0 = <&pwm_ao_d_e_pins>;
286 pinctrl-names = "default"; 286 pinctrl-names = "default";
287 clocks = <&xtal>; 287 clocks = <&xtal>;
288 clock-names = "clkin1"; 288 clock-names = "clkin1";
289 status = "okay"; 289 status = "okay";
290 }; 290 };
291 291
292 &pwm_ef { 292 &pwm_ef {
293 status = "okay"; 293 status = "okay";
294 pinctrl-0 = <&pwm_e_pins>; 294 pinctrl-0 = <&pwm_e_pins>;
295 pinctrl-names = "default"; 295 pinctrl-names = "default";
296 clocks = <&xtal>; 296 clocks = <&xtal>;
297 clock-names = "clkin0"; 297 clock-names = "clkin0";
298 }; 298 };
299 299
300 &saradc { 300 &saradc {
301 status = "okay"; 301 status = "okay";
302 vref-supply = <&vddao_1v8>; 302 vref-supply = <&vddao_1v8>;
303 }; 303 };
304 304
305 /* SDIO */ 305 /* SDIO */
306 &sd_emmc_a { 306 &sd_emmc_a {
307 status = "okay"; 307 status = "okay";
308 pinctrl-0 = <&sdio_pins>; 308 pinctrl-0 = <&sdio_pins>;
309 pinctrl-1 = <&sdio_clk_gate_pins>; 309 pinctrl-1 = <&sdio_clk_gate_pins>;
310 pinctrl-names = "default", "clk-gate"; 310 pinctrl-names = "default", "clk-gate";
311 #address-cells = <1>; 311 #address-cells = <1>;
312 #size-cells = <0>; 312 #size-cells = <0>;
313 313
314 bus-width = <4>; 314 bus-width = <4>;
315 cap-sd-highspeed; 315 cap-sd-highspeed;
316 sd-uhs-sdr50; 316 sd-uhs-sdr50;
317 max-frequency = <100000000>; 317 max-frequency = <100000000>;
318 318
319 non-removable; 319 non-removable;
320 disable-wp; 320 disable-wp;
321 321
322 /* WiFi firmware requires power to be 322 /* WiFi firmware requires power to be kept while in suspend */
323 keep-power-in-suspend; 323 keep-power-in-suspend;
324 324
325 mmc-pwrseq = <&sdio_pwrseq>; 325 mmc-pwrseq = <&sdio_pwrseq>;
326 326
327 vmmc-supply = <&vddao_3v3>; 327 vmmc-supply = <&vddao_3v3>;
328 vqmmc-supply = <&vddao_1v8>; 328 vqmmc-supply = <&vddao_1v8>;
329 329
330 brcmf: wifi@1 { 330 brcmf: wifi@1 {
331 reg = <1>; 331 reg = <1>;
332 compatible = "brcm,bcm4329-fma 332 compatible = "brcm,bcm4329-fmac";
333 }; 333 };
334 }; 334 };
335 335
336 /* SD card */ 336 /* SD card */
337 &sd_emmc_b { 337 &sd_emmc_b {
338 status = "okay"; 338 status = "okay";
339 pinctrl-0 = <&sdcard_c_pins>; 339 pinctrl-0 = <&sdcard_c_pins>;
340 pinctrl-1 = <&sdcard_clk_gate_c_pins>; 340 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
341 pinctrl-names = "default", "clk-gate"; 341 pinctrl-names = "default", "clk-gate";
342 342
343 bus-width = <4>; 343 bus-width = <4>;
344 cap-sd-highspeed; 344 cap-sd-highspeed;
345 max-frequency = <100000000>; 345 max-frequency = <100000000>;
346 disable-wp; 346 disable-wp;
347 347
348 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_ 348 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
349 vmmc-supply = <&vddao_3v3>; 349 vmmc-supply = <&vddao_3v3>;
350 vqmmc-supply = <&vddao_3v3>; 350 vqmmc-supply = <&vddao_3v3>;
351 }; 351 };
352 352
353 /* eMMC */ 353 /* eMMC */
354 &sd_emmc_c { 354 &sd_emmc_c {
355 status = "okay"; 355 status = "okay";
356 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_ 356 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
357 pinctrl-1 = <&emmc_clk_gate_pins>; 357 pinctrl-1 = <&emmc_clk_gate_pins>;
358 pinctrl-names = "default", "clk-gate"; 358 pinctrl-names = "default", "clk-gate";
359 359
360 bus-width = <8>; 360 bus-width = <8>;
361 cap-mmc-highspeed; 361 cap-mmc-highspeed;
362 mmc-ddr-1_8v; 362 mmc-ddr-1_8v;
363 mmc-hs200-1_8v; 363 mmc-hs200-1_8v;
364 max-frequency = <200000000>; 364 max-frequency = <200000000>;
365 disable-wp; 365 disable-wp;
366 366
367 mmc-pwrseq = <&emmc_pwrseq>; 367 mmc-pwrseq = <&emmc_pwrseq>;
368 vmmc-supply = <&vcc_3v3>; 368 vmmc-supply = <&vcc_3v3>;
369 vqmmc-supply = <&vcc_1v8>; 369 vqmmc-supply = <&vcc_1v8>;
370 }; 370 };
371 371
372 &tdmif_b { 372 &tdmif_b {
373 status = "okay"; 373 status = "okay";
374 }; 374 };
375 375
376 &tdmout_b { 376 &tdmout_b {
377 status = "okay"; 377 status = "okay";
378 }; 378 };
379 379
380 &tohdmitx { 380 &tohdmitx {
381 status = "okay"; 381 status = "okay";
382 }; 382 };
383 383
384 &uart_A { 384 &uart_A {
385 status = "okay"; 385 status = "okay";
386 pinctrl-0 = <&uart_a_pins>, <&uart_a_c 386 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
387 pinctrl-names = "default"; 387 pinctrl-names = "default";
388 uart-has-rtscts; 388 uart-has-rtscts;
389 389
390 bluetooth { 390 bluetooth {
391 compatible = "brcm,bcm43438-bt 391 compatible = "brcm,bcm43438-bt";
392 shutdown-gpios = <&gpio GPIOX_ 392 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
393 max-speed = <2000000>; 393 max-speed = <2000000>;
394 clocks = <&wifi32k>; 394 clocks = <&wifi32k>;
395 clock-names = "lpo"; 395 clock-names = "lpo";
396 }; 396 };
397 }; 397 };
398 398
399 &uart_AO { 399 &uart_AO {
400 status = "okay"; 400 status = "okay";
401 pinctrl-0 = <&uart_ao_a_pins>; 401 pinctrl-0 = <&uart_ao_a_pins>;
402 pinctrl-names = "default"; 402 pinctrl-names = "default";
403 }; 403 };
404 404
405 &usb { 405 &usb {
406 status = "okay"; 406 status = "okay";
407 }; 407 };
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