1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2016 Andreas Färber
4 * Copyright (c) 2016 BayLibre, Inc.
5 * Author: Kevin Hilman <khilman@kernel.org>
6 */
7
8 #include "meson-gxbb.dtsi"
9
10 / {
11 aliases {
12 serial0 = &uart_AO;
13 ethernet0 = ðmac;
14 };
15
16 chosen {
17 stdout-path = "serial0:115200n
18 };
19
20 memory@0 {
21 device_type = "memory";
22 reg = <0x0 0x0 0x0 0x40000000>
23 };
24
25 usb_pwr: regulator-usb-pwrs {
26 compatible = "regulator-fixed"
27
28 regulator-name = "USB_PWR";
29
30 regulator-min-microvolt = <500
31 regulator-max-microvolt = <500
32
33 /* signal name in schematic: U
34 gpio = <&gpio GPIODV_24 GPIO_A
35 enable-active-high;
36 };
37
38 vddio_card: gpio-regulator {
39 compatible = "regulator-gpio";
40
41 regulator-name = "VDDIO_CARD";
42 regulator-min-microvolt = <180
43 regulator-max-microvolt = <330
44
45 gpios = <&gpio_ao GPIOAO_5 GPI
46 gpios-states = <1>;
47
48 /* Based on P200 schematics, s
49 states = <1800000 0>,
50 <3300000 1>;
51
52 regulator-settling-time-up-us
53 regulator-settling-time-down-u
54 };
55
56 vddio_boot: regulator-vddio-boot {
57 compatible = "regulator-fixed"
58 regulator-name = "VDDIO_BOOT";
59 regulator-min-microvolt = <180
60 regulator-max-microvolt = <180
61 };
62
63 vddao_3v3: regulator-vddao-3v3 {
64 compatible = "regulator-fixed"
65 regulator-name = "VDDAO_3V3";
66 regulator-min-microvolt = <330
67 regulator-max-microvolt = <330
68 };
69
70 vcc_3v3: regulator-vcc-3v3 {
71 compatible = "regulator-fixed"
72 regulator-name = "VCC_3V3";
73 regulator-min-microvolt = <330
74 regulator-max-microvolt = <330
75 };
76
77 emmc_pwrseq: emmc-pwrseq {
78 compatible = "mmc-pwrseq-emmc"
79 reset-gpios = <&gpio BOOT_9 GP
80 };
81
82 wifi32k: wifi32k {
83 compatible = "pwm-clock";
84 #clock-cells = <0>;
85 clock-frequency = <32768>;
86 pwms = <&pwm_ef 0 30518 0>; /*
87 };
88
89 sdio_pwrseq: sdio-pwrseq {
90 compatible = "mmc-pwrseq-simpl
91 reset-gpios = <&gpio GPIOX_6 G
92 clocks = <&wifi32k>;
93 clock-names = "ext_clock";
94 };
95
96 cvbs_connector: cvbs-connector {
97 compatible = "composite-video-
98
99 port {
100 cvbs_connector_in: end
101 remote-endpoin
102 };
103 };
104 };
105
106 hdmi-connector {
107 compatible = "hdmi-connector";
108 type = "a";
109
110 port {
111 hdmi_connector_in: end
112 remote-endpoin
113 };
114 };
115 };
116 };
117
118 &cec_AO {
119 status = "okay";
120 pinctrl-0 = <&ao_cec_pins>;
121 pinctrl-names = "default";
122 hdmi-phandle = <&hdmi_tx>;
123 };
124
125 &cvbs_vdac_port {
126 cvbs_vdac_out: endpoint {
127 remote-endpoint = <&cvbs_conne
128 };
129 };
130
131 &hdmi_tx {
132 status = "okay";
133 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i
134 pinctrl-names = "default";
135 };
136
137 &hdmi_tx_tmds_port {
138 hdmi_tx_tmds_out: endpoint {
139 remote-endpoint = <&hdmi_conne
140 };
141 };
142
143 &ir {
144 status = "okay";
145 pinctrl-0 = <&remote_input_ao_pins>;
146 pinctrl-names = "default";
147 };
148
149 &pwm_ef {
150 status = "okay";
151 pinctrl-0 = <&pwm_e_pins>;
152 pinctrl-names = "default";
153 clocks = <&clkc CLKID_FCLK_DIV4>;
154 clock-names = "clkin0";
155 };
156
157 /* Wireless SDIO Module */
158 &sd_emmc_a {
159 status = "okay";
160 pinctrl-0 = <&sdio_pins>;
161 pinctrl-1 = <&sdio_clk_gate_pins>;
162 pinctrl-names = "default", "clk-gate";
163 #address-cells = <1>;
164 #size-cells = <0>;
165
166 bus-width = <4>;
167 cap-sd-highspeed;
168 max-frequency = <50000000>;
169
170 non-removable;
171 disable-wp;
172
173 /* WiFi firmware requires power to be
174 keep-power-in-suspend;
175
176 mmc-pwrseq = <&sdio_pwrseq>;
177
178 vmmc-supply = <&vddao_3v3>;
179 vqmmc-supply = <&vddio_boot>;
180
181 brcmf: wifi@1 {
182 reg = <1>;
183 compatible = "brcm,bcm4329-fma
184 };
185 };
186
187 /* SD card */
188 &sd_emmc_b {
189 status = "okay";
190 pinctrl-0 = <&sdcard_pins>;
191 pinctrl-1 = <&sdcard_clk_gate_pins>;
192 pinctrl-names = "default", "clk-gate";
193
194 bus-width = <4>;
195 cap-sd-highspeed;
196 sd-uhs-sdr12;
197 sd-uhs-sdr25;
198 sd-uhs-sdr50;
199 max-frequency = <100000000>;
200 disable-wp;
201
202 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_L
203
204 vmmc-supply = <&vddao_3v3>;
205 vqmmc-supply = <&vddio_card>;
206 };
207
208 /* eMMC */
209 &sd_emmc_c {
210 status = "okay";
211 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pi
212 pinctrl-1 = <&emmc_clk_gate_pins>;
213 pinctrl-names = "default", "clk-gate";
214
215 bus-width = <8>;
216 cap-mmc-highspeed;
217 max-frequency = <200000000>;
218 non-removable;
219 disable-wp;
220 mmc-ddr-1_8v;
221 mmc-hs200-1_8v;
222
223 mmc-pwrseq = <&emmc_pwrseq>;
224 vmmc-supply = <&vcc_3v3>;
225 vqmmc-supply = <&vddio_boot>;
226 };
227
228 /* This UART is brought out to the DB9 connect
229 &uart_AO {
230 status = "okay";
231 pinctrl-0 = <&uart_ao_a_pins>;
232 pinctrl-names = "default";
233 };
234
235 &usb0_phy {
236 status = "okay";
237 phy-supply = <&usb_pwr>;
238 };
239
240 &usb1_phy {
241 status = "okay";
242 };
243
244 &usb0 {
245 status = "okay";
246 };
247
248 &usb1 {
249 status = "okay";
250 };
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