1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2019 BayLibre SAS. All rights 3 * Copyright (c) 2019 BayLibre SAS. All rights reserved.
4 * Copyright (c) 2020 Christian Hewitt <christi 4 * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include "meson-sm1-ac2xx.dtsi" 9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmit 10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
11 11
12 / { 12 / {
13 compatible = "haochuangyi,h96-max", "a 13 compatible = "haochuangyi,h96-max", "amlogic,sm1";
14 model = "Shenzhen Haochuangyi Technolo 14 model = "Shenzhen Haochuangyi Technology Co., Ltd H96 Max";
15 15
16 sound { 16 sound {
17 compatible = "amlogic,axg-soun 17 compatible = "amlogic,axg-sound-card";
18 model = "H96-MAX"; 18 model = "H96-MAX";
19 audio-aux-devs = <&tdmout_b>; 19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0 20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
21 "TDMOUT_B IN 1 21 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
22 "TDMOUT_B IN 2 22 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
23 "TDM_B Playbac 23 "TDM_B Playback", "TDMOUT_B OUT";
24 24
25 clocks = <&clkc CLKID_MPLL2>, <<
26 <&clkc CLKID_MPLL0>, <<
27 <&clkc CLKID_MPLL1>; <<
28 <<
29 assigned-clocks = <&clkc CLKID 25 assigned-clocks = <&clkc CLKID_MPLL2>,
30 <&clkc CLKID 26 <&clkc CLKID_MPLL0>,
31 <&clkc CLKID 27 <&clkc CLKID_MPLL1>;
32 assigned-clock-parents = <0>, 28 assigned-clock-parents = <0>, <0>, <0>;
33 assigned-clock-rates = <294912 29 assigned-clock-rates = <294912000>,
34 <270950 30 <270950400>,
35 <393216 31 <393216000>;
36 32
37 dai-link-0 { 33 dai-link-0 {
38 sound-dai = <&frddr_a> 34 sound-dai = <&frddr_a>;
39 }; 35 };
40 36
41 dai-link-1 { 37 dai-link-1 {
42 sound-dai = <&frddr_b> 38 sound-dai = <&frddr_b>;
43 }; 39 };
44 40
45 dai-link-2 { 41 dai-link-2 {
46 sound-dai = <&frddr_c> 42 sound-dai = <&frddr_c>;
47 }; 43 };
48 44
49 /* 8ch hdmi interface */ 45 /* 8ch hdmi interface */
50 dai-link-3 { 46 dai-link-3 {
51 sound-dai = <&tdmif_b> 47 sound-dai = <&tdmif_b>;
52 dai-format = "i2s"; 48 dai-format = "i2s";
53 dai-tdm-slot-tx-mask-0 49 dai-tdm-slot-tx-mask-0 = <1 1>;
54 dai-tdm-slot-tx-mask-1 50 dai-tdm-slot-tx-mask-1 = <1 1>;
55 dai-tdm-slot-tx-mask-2 51 dai-tdm-slot-tx-mask-2 = <1 1>;
56 dai-tdm-slot-tx-mask-3 52 dai-tdm-slot-tx-mask-3 = <1 1>;
57 mclk-fs = <256>; 53 mclk-fs = <256>;
58 54
59 codec { 55 codec {
60 sound-dai = <& 56 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
61 }; 57 };
62 }; 58 };
63 59
64 /* hdmi glue */ 60 /* hdmi glue */
65 dai-link-4 { 61 dai-link-4 {
66 sound-dai = <&tohdmitx 62 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
67 63
68 codec { 64 codec {
69 sound-dai = <& 65 sound-dai = <&hdmi_tx>;
70 }; 66 };
71 }; 67 };
72 }; 68 };
73 }; 69 };
74 70
75 &arb { 71 &arb {
76 status = "okay"; 72 status = "okay";
77 }; 73 };
78 74
79 &clkc_audio { 75 &clkc_audio {
80 status = "okay"; 76 status = "okay";
81 }; 77 };
82 78
83 ðmac { 79 ðmac {
84 status = "okay"; 80 status = "okay";
85 81
86 pinctrl-0 = <ð_pins>, <ð_rgmii_p 82 pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
87 pinctrl-names = "default"; 83 pinctrl-names = "default";
88 phy-mode = "rgmii-txid"; 84 phy-mode = "rgmii-txid";
89 phy-handle = <&external_phy>; 85 phy-handle = <&external_phy>;
90 86
91 rx-internal-delay-ps = <800>; 87 rx-internal-delay-ps = <800>;
92 }; 88 };
93 89
94 &ext_mdio { 90 &ext_mdio {
95 external_phy: ethernet-phy@0 { 91 external_phy: ethernet-phy@0 {
96 /* Realtek RTL8211F (0x001cc91 92 /* Realtek RTL8211F (0x001cc916) */
97 reg = <0>; 93 reg = <0>;
98 max-speed = <1000>; 94 max-speed = <1000>;
99 95
100 reset-assert-us = <10000>; 96 reset-assert-us = <10000>;
101 reset-deassert-us = <80000>; 97 reset-deassert-us = <80000>;
102 reset-gpios = <&gpio GPIOZ_15 98 reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
103 99
104 interrupt-parent = <&gpio_intc 100 interrupt-parent = <&gpio_intc>;
105 /* MAC_INTR on GPIOZ_14 */ 101 /* MAC_INTR on GPIOZ_14 */
106 interrupts = <IRQID_GPIOZ_14 I 102 interrupts = <IRQID_GPIOZ_14 IRQ_TYPE_LEVEL_LOW>;
107 }; 103 };
108 }; 104 };
109 105
110 &frddr_a { 106 &frddr_a {
111 status = "okay"; 107 status = "okay";
112 }; 108 };
113 109
114 &frddr_b { 110 &frddr_b {
115 status = "okay"; 111 status = "okay";
116 }; 112 };
117 113
118 &frddr_c { 114 &frddr_c {
119 status = "okay"; 115 status = "okay";
120 }; 116 };
121 117
122 &tdmif_b { 118 &tdmif_b {
123 status = "okay"; 119 status = "okay";
124 }; 120 };
125 121
126 &tdmout_b { 122 &tdmout_b {
127 status = "okay"; 123 status = "okay";
128 }; 124 };
129 125
130 &tohdmitx { 126 &tohdmitx {
131 status = "okay"; 127 status = "okay";
132 }; 128 };
133 129
134 &uart_A { 130 &uart_A {
135 status = "okay"; 131 status = "okay";
136 132
137 pinctrl-0 = <&uart_a_pins>, <&uart_a_c 133 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
138 pinctrl-names = "default"; 134 pinctrl-names = "default";
139 uart-has-rtscts; 135 uart-has-rtscts;
140 136
141 bluetooth { 137 bluetooth {
142 compatible = "brcm,bcm43438-bt 138 compatible = "brcm,bcm43438-bt";
143 shutdown-gpios = <&gpio GPIOX_ 139 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
144 max-speed = <2000000>; 140 max-speed = <2000000>;
145 clocks = <&wifi32k>; 141 clocks = <&wifi32k>;
146 clock-names = "lpo"; 142 clock-names = "lpo";
147 }; 143 };
148 }; 144 };
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