1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2019 BayLibre SAS. All rights 3 * Copyright (c) 2019 BayLibre SAS. All rights reserved.
4 * Copyright (c) 2020 Christian Hewitt <christi 4 * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include "meson-sm1-ac2xx.dtsi" 9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmit 10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
11 11
12 / { 12 / {
13 compatible = "haochuangyi,h96-max", "a 13 compatible = "haochuangyi,h96-max", "amlogic,sm1";
14 model = "Shenzhen Haochuangyi Technolo 14 model = "Shenzhen Haochuangyi Technology Co., Ltd H96 Max";
15 15
16 sound { 16 sound {
17 compatible = "amlogic,axg-soun 17 compatible = "amlogic,axg-sound-card";
18 model = "H96-MAX"; 18 model = "H96-MAX";
19 audio-aux-devs = <&tdmout_b>; 19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0 20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
21 "TDMOUT_B IN 1 21 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
22 "TDMOUT_B IN 2 22 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
23 "TDM_B Playbac 23 "TDM_B Playback", "TDMOUT_B OUT";
24 24
25 clocks = <&clkc CLKID_MPLL2>, <<
26 <&clkc CLKID_MPLL0>, <<
27 <&clkc CLKID_MPLL1>; <<
28 <<
29 assigned-clocks = <&clkc CLKID 25 assigned-clocks = <&clkc CLKID_MPLL2>,
30 <&clkc CLKID 26 <&clkc CLKID_MPLL0>,
31 <&clkc CLKID 27 <&clkc CLKID_MPLL1>;
32 assigned-clock-parents = <0>, 28 assigned-clock-parents = <0>, <0>, <0>;
33 assigned-clock-rates = <294912 29 assigned-clock-rates = <294912000>,
34 <270950 30 <270950400>,
35 <393216 31 <393216000>;
>> 32 status = "okay";
36 33
37 dai-link-0 { 34 dai-link-0 {
38 sound-dai = <&frddr_a> 35 sound-dai = <&frddr_a>;
39 }; 36 };
40 37
41 dai-link-1 { 38 dai-link-1 {
42 sound-dai = <&frddr_b> 39 sound-dai = <&frddr_b>;
43 }; 40 };
44 41
45 dai-link-2 { 42 dai-link-2 {
46 sound-dai = <&frddr_c> 43 sound-dai = <&frddr_c>;
47 }; 44 };
48 45
49 /* 8ch hdmi interface */ 46 /* 8ch hdmi interface */
50 dai-link-3 { 47 dai-link-3 {
51 sound-dai = <&tdmif_b> 48 sound-dai = <&tdmif_b>;
52 dai-format = "i2s"; 49 dai-format = "i2s";
53 dai-tdm-slot-tx-mask-0 50 dai-tdm-slot-tx-mask-0 = <1 1>;
54 dai-tdm-slot-tx-mask-1 51 dai-tdm-slot-tx-mask-1 = <1 1>;
55 dai-tdm-slot-tx-mask-2 52 dai-tdm-slot-tx-mask-2 = <1 1>;
56 dai-tdm-slot-tx-mask-3 53 dai-tdm-slot-tx-mask-3 = <1 1>;
57 mclk-fs = <256>; 54 mclk-fs = <256>;
58 55
59 codec { 56 codec {
60 sound-dai = <& 57 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
61 }; 58 };
62 }; 59 };
63 60
64 /* hdmi glue */ 61 /* hdmi glue */
65 dai-link-4 { 62 dai-link-4 {
66 sound-dai = <&tohdmitx 63 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
67 64
68 codec { 65 codec {
69 sound-dai = <& 66 sound-dai = <&hdmi_tx>;
70 }; 67 };
71 }; 68 };
72 }; 69 };
73 }; 70 };
74 71
75 &arb { 72 &arb {
76 status = "okay"; 73 status = "okay";
77 }; 74 };
78 75
79 &clkc_audio { 76 &clkc_audio {
80 status = "okay"; 77 status = "okay";
81 }; 78 };
82 79
83 ðmac { 80 ðmac {
84 status = "okay"; 81 status = "okay";
85 82
86 pinctrl-0 = <ð_pins>, <ð_rgmii_p 83 pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
87 pinctrl-names = "default"; 84 pinctrl-names = "default";
88 phy-mode = "rgmii-txid"; 85 phy-mode = "rgmii-txid";
89 phy-handle = <&external_phy>; 86 phy-handle = <&external_phy>;
90 87
91 rx-internal-delay-ps = <800>; 88 rx-internal-delay-ps = <800>;
92 }; 89 };
93 90
94 &ext_mdio { 91 &ext_mdio {
95 external_phy: ethernet-phy@0 { 92 external_phy: ethernet-phy@0 {
96 /* Realtek RTL8211F (0x001cc91 93 /* Realtek RTL8211F (0x001cc916) */
97 reg = <0>; 94 reg = <0>;
98 max-speed = <1000>; 95 max-speed = <1000>;
99 96
100 reset-assert-us = <10000>; 97 reset-assert-us = <10000>;
101 reset-deassert-us = <80000>; 98 reset-deassert-us = <80000>;
102 reset-gpios = <&gpio GPIOZ_15 99 reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
103 100
104 interrupt-parent = <&gpio_intc 101 interrupt-parent = <&gpio_intc>;
105 /* MAC_INTR on GPIOZ_14 */ 102 /* MAC_INTR on GPIOZ_14 */
106 interrupts = <IRQID_GPIOZ_14 I !! 103 interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
107 }; 104 };
108 }; 105 };
109 106
110 &frddr_a { 107 &frddr_a {
111 status = "okay"; 108 status = "okay";
112 }; 109 };
113 110
114 &frddr_b { 111 &frddr_b {
115 status = "okay"; 112 status = "okay";
116 }; 113 };
117 114
118 &frddr_c { 115 &frddr_c {
119 status = "okay"; 116 status = "okay";
120 }; 117 };
121 118
122 &tdmif_b { 119 &tdmif_b {
123 status = "okay"; 120 status = "okay";
124 }; 121 };
125 122
126 &tdmout_b { 123 &tdmout_b {
127 status = "okay"; 124 status = "okay";
128 }; 125 };
129 126
130 &tohdmitx { 127 &tohdmitx {
131 status = "okay"; 128 status = "okay";
132 }; 129 };
133 130
134 &uart_A { 131 &uart_A {
135 status = "okay"; 132 status = "okay";
136 133
137 pinctrl-0 = <&uart_a_pins>, <&uart_a_c 134 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
138 pinctrl-names = "default"; 135 pinctrl-names = "default";
139 uart-has-rtscts; 136 uart-has-rtscts;
140 137
141 bluetooth { 138 bluetooth {
142 compatible = "brcm,bcm43438-bt 139 compatible = "brcm,bcm43438-bt";
143 shutdown-gpios = <&gpio GPIOX_ 140 shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
144 max-speed = <2000000>; 141 max-speed = <2000000>;
145 clocks = <&wifi32k>; 142 clocks = <&wifi32k>;
146 clock-names = "lpo"; 143 clock-names = "lpo";
147 }; 144 };
148 }; 145 };
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