1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2019 BayLibre SAS. All rights 3 * Copyright (c) 2019 BayLibre SAS. All rights reserved.
4 * Copyright (c) 2020 Christian Hewitt <christi 4 * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include "meson-sm1-ac2xx.dtsi" 9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmit 10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
11 11
12 / { 12 / {
13 compatible = "amediatech,x96-air-gbit" 13 compatible = "amediatech,x96-air-gbit", "amlogic,sm1";
14 model = "Shenzhen Amediatech Technolog 14 model = "Shenzhen Amediatech Technology Co., Ltd X96 Air";
15 15
16 sound { 16 sound {
17 compatible = "amlogic,axg-soun 17 compatible = "amlogic,axg-sound-card";
18 model = "X96-AIR"; 18 model = "X96-AIR";
19 audio-aux-devs = <&tdmout_b>; 19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0 20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
21 "TDMOUT_B IN 1 21 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
22 "TDMOUT_B IN 2 22 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
23 "TDM_B Playbac 23 "TDM_B Playback", "TDMOUT_B OUT";
24 24
25 clocks = <&clkc CLKID_MPLL2>, 25 clocks = <&clkc CLKID_MPLL2>,
26 <&clkc CLKID_MPLL0>, 26 <&clkc CLKID_MPLL0>,
27 <&clkc CLKID_MPLL1>; 27 <&clkc CLKID_MPLL1>;
28 28
29 assigned-clocks = <&clkc CLKID 29 assigned-clocks = <&clkc CLKID_MPLL2>,
30 <&clkc CLKID 30 <&clkc CLKID_MPLL0>,
31 <&clkc CLKID 31 <&clkc CLKID_MPLL1>;
32 assigned-clock-parents = <0>, 32 assigned-clock-parents = <0>, <0>, <0>;
33 assigned-clock-rates = <294912 33 assigned-clock-rates = <294912000>,
34 <270950 34 <270950400>,
35 <393216 35 <393216000>;
36 36
37 dai-link-0 { 37 dai-link-0 {
38 sound-dai = <&frddr_a> 38 sound-dai = <&frddr_a>;
39 }; 39 };
40 40
41 dai-link-1 { 41 dai-link-1 {
42 sound-dai = <&frddr_b> 42 sound-dai = <&frddr_b>;
43 }; 43 };
44 44
45 dai-link-2 { 45 dai-link-2 {
46 sound-dai = <&frddr_c> 46 sound-dai = <&frddr_c>;
47 }; 47 };
48 48
49 /* 8ch hdmi interface */ 49 /* 8ch hdmi interface */
50 dai-link-3 { 50 dai-link-3 {
51 sound-dai = <&tdmif_b> 51 sound-dai = <&tdmif_b>;
52 dai-format = "i2s"; 52 dai-format = "i2s";
53 dai-tdm-slot-tx-mask-0 53 dai-tdm-slot-tx-mask-0 = <1 1>;
54 dai-tdm-slot-tx-mask-1 54 dai-tdm-slot-tx-mask-1 = <1 1>;
55 dai-tdm-slot-tx-mask-2 55 dai-tdm-slot-tx-mask-2 = <1 1>;
56 dai-tdm-slot-tx-mask-3 56 dai-tdm-slot-tx-mask-3 = <1 1>;
57 mclk-fs = <256>; 57 mclk-fs = <256>;
58 58
59 codec { 59 codec {
60 sound-dai = <& 60 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
61 }; 61 };
62 }; 62 };
63 63
64 /* hdmi glue */ 64 /* hdmi glue */
65 dai-link-4 { 65 dai-link-4 {
66 sound-dai = <&tohdmitx 66 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
67 67
68 codec { 68 codec {
69 sound-dai = <& 69 sound-dai = <&hdmi_tx>;
70 }; 70 };
71 }; 71 };
72 }; 72 };
73 }; 73 };
74 74
75 &arb { 75 &arb {
76 status = "okay"; 76 status = "okay";
77 }; 77 };
78 78
79 &clkc_audio { 79 &clkc_audio {
80 status = "okay"; 80 status = "okay";
81 }; 81 };
82 82
83 ðmac { 83 ðmac {
84 status = "okay"; 84 status = "okay";
85 85
86 pinctrl-0 = <ð_pins>, <ð_rgmii_p 86 pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
87 pinctrl-names = "default"; 87 pinctrl-names = "default";
88 phy-mode = "rgmii-txid"; 88 phy-mode = "rgmii-txid";
89 phy-handle = <&external_phy>; 89 phy-handle = <&external_phy>;
90 90
91 rx-internal-delay-ps = <800>; 91 rx-internal-delay-ps = <800>;
92 }; 92 };
93 93
94 &ext_mdio { 94 &ext_mdio {
95 external_phy: ethernet-phy@0 { 95 external_phy: ethernet-phy@0 {
96 /* Realtek RTL8211F (0x001cc91 96 /* Realtek RTL8211F (0x001cc916) */
97 reg = <0>; 97 reg = <0>;
98 max-speed = <1000>; 98 max-speed = <1000>;
99 99
100 reset-assert-us = <10000>; 100 reset-assert-us = <10000>;
101 reset-deassert-us = <80000>; 101 reset-deassert-us = <80000>;
102 reset-gpios = <&gpio GPIOZ_15 102 reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
103 103
104 interrupt-parent = <&gpio_intc 104 interrupt-parent = <&gpio_intc>;
105 /* MAC_INTR on GPIOZ_14 */ 105 /* MAC_INTR on GPIOZ_14 */
106 interrupts = <IRQID_GPIOZ_14 I 106 interrupts = <IRQID_GPIOZ_14 IRQ_TYPE_LEVEL_LOW>;
107 }; 107 };
108 }; 108 };
109 109
110 &frddr_a { 110 &frddr_a {
111 status = "okay"; 111 status = "okay";
112 }; 112 };
113 113
114 &frddr_b { 114 &frddr_b {
115 status = "okay"; 115 status = "okay";
116 }; 116 };
117 117
118 &frddr_c { 118 &frddr_c {
119 status = "okay"; 119 status = "okay";
120 }; 120 };
121 121
122 &ir { 122 &ir {
123 linux,rc-map-name = "rc-x96max"; 123 linux,rc-map-name = "rc-x96max";
124 }; 124 };
125 125
126 &tdmif_b { 126 &tdmif_b {
127 status = "okay"; 127 status = "okay";
128 }; 128 };
129 129
130 &tdmout_b { 130 &tdmout_b {
131 status = "okay"; 131 status = "okay";
132 }; 132 };
133 133
134 &tohdmitx { 134 &tohdmitx {
135 status = "okay"; 135 status = "okay";
136 }; 136 };
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