1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Linaro Ltd.
4 * Author: Manivannan Sadhasivam <manivannan.sa
5 */
6
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm
9 #include <dt-bindings/reset/bitmain,bm1880-res
10
11 / {
12 compatible = "bitmain,bm1880";
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 cpu0: cpu@0 {
22 device_type = "cpu";
23 compatible = "arm,cort
24 reg = <0x0>;
25 enable-method = "psci"
26 };
27
28 cpu1: cpu@1 {
29 device_type = "cpu";
30 compatible = "arm,cort
31 reg = <0x1>;
32 enable-method = "psci"
33 };
34 };
35
36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
39 ranges;
40
41 secmon@100000000 {
42 reg = <0x1 0x00000000
43 no-map;
44 };
45
46 jpu@130000000 {
47 reg = <0x1 0x30000000
48 no-map;
49 };
50
51 vpu@138000000 {
52 reg = <0x1 0x38000000
53 no-map;
54 };
55 };
56
57 psci {
58 compatible = "arm,psci-0.2";
59 method = "smc";
60 };
61
62 timer {
63 compatible = "arm,armv8-timer"
64 interrupts = <GIC_PPI 13 IRQ_T
65 <GIC_PPI 14 IRQ_T
66 <GIC_PPI 11 IRQ_T
67 <GIC_PPI 10 IRQ_T
68 };
69
70 osc: osc {
71 compatible = "fixed-clock";
72 clock-frequency = <25000000>;
73 #clock-cells = <0>;
74 };
75
76 soc {
77 compatible = "simple-bus";
78 #address-cells = <2>;
79 #size-cells = <2>;
80 ranges;
81
82 gic: interrupt-controller@5000
83 compatible = "arm,gic-
84 reg = <0x0 0x50001000
85 <0x0 0x50002000
86 interrupts = <GIC_PPI
87 interrupt-controller;
88 #interrupt-cells = <3>
89 };
90
91 sctrl: system-controller@50010
92 compatible = "bitmain,
93 "simple-m
94 reg = <0x0 0x50010000
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges = <0x0 0x0 0x50
98
99 pinctrl: pinctrl@400 {
100 compatible = "
101 reg = <0x400 0
102 };
103
104 clk: clock-controller@
105 compatible = "
106 reg = <0xe8 0x
107 reg-names = "p
108 clocks = <&osc
109 clock-names =
110 #clock-cells =
111 };
112
113 rst: reset-controller@
114 compatible = "
115 reg = <0xc00 0
116 #reset-cells =
117 };
118 };
119
120 gpio0: gpio@50027000 {
121 #address-cells = <1>;
122 #size-cells = <0>;
123 compatible = "snps,dw-
124 reg = <0x0 0x50027000
125
126 porta: gpio-controller
127 compatible = "
128 gpio-controlle
129 #gpio-cells =
130 ngpios = <32>;
131 reg = <0>;
132 interrupt-cont
133 #interrupt-cel
134 interrupts = <
135 };
136 };
137
138 gpio1: gpio@50027400 {
139 #address-cells = <1>;
140 #size-cells = <0>;
141 compatible = "snps,dw-
142 reg = <0x0 0x50027400
143
144 portb: gpio-controller
145 compatible = "
146 gpio-controlle
147 #gpio-cells =
148 ngpios = <32>;
149 reg = <0>;
150 interrupt-cont
151 #interrupt-cel
152 interrupts = <
153 };
154 };
155
156 gpio2: gpio@50027800 {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 compatible = "snps,dw-
160 reg = <0x0 0x50027800
161
162 portc: gpio-controller
163 compatible = "
164 gpio-controlle
165 #gpio-cells =
166 ngpios = <8>;
167 reg = <0>;
168 interrupt-cont
169 #interrupt-cel
170 interrupts = <
171 };
172 };
173
174 uart0: serial@58018000 {
175 compatible = "snps,dw-
176 reg = <0x0 0x58018000
177 clocks = <&clk BM1880_
178 <&clk BM1880_
179 clock-names = "baudclk
180 interrupts = <GIC_SPI
181 reg-shift = <2>;
182 reg-io-width = <4>;
183 resets = <&rst BM1880_
184 status = "disabled";
185 };
186
187 uart1: serial@5801a000 {
188 compatible = "snps,dw-
189 reg = <0x0 0x5801a000
190 clocks = <&clk BM1880_
191 <&clk BM1880_
192 clock-names = "baudclk
193 interrupts = <GIC_SPI
194 reg-shift = <2>;
195 reg-io-width = <4>;
196 resets = <&rst BM1880_
197 status = "disabled";
198 };
199
200 uart2: serial@5801c000 {
201 compatible = "snps,dw-
202 reg = <0x0 0x5801c000
203 clocks = <&clk BM1880_
204 <&clk BM1880_
205 clock-names = "baudclk
206 interrupts = <GIC_SPI
207 reg-shift = <2>;
208 reg-io-width = <4>;
209 resets = <&rst BM1880_
210 status = "disabled";
211 };
212
213 uart3: serial@5801e000 {
214 compatible = "snps,dw-
215 reg = <0x0 0x5801e000
216 clocks = <&clk BM1880_
217 <&clk BM1880_
218 clock-names = "baudclk
219 interrupts = <GIC_SPI
220 reg-shift = <2>;
221 reg-io-width = <4>;
222 resets = <&rst BM1880_
223 status = "disabled";
224 };
225 };
226 };
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