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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/broadcom/stingray/stingray-board-base.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/broadcom/stingray/stingray-board-base.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm64/broadcom/stingray/stingray-board-base.dtsi (Architecture mips)


  1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-      1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
  2 /*                                                  2 /*
  3  *  Copyright(c) 2016-2018 Broadcom                 3  *  Copyright(c) 2016-2018 Broadcom
  4  */                                                 4  */
  5                                                     5 
  6 #include "stingray.dtsi"                            6 #include "stingray.dtsi"
  7 #include <dt-bindings/gpio/gpio.h>                  7 #include <dt-bindings/gpio/gpio.h>
  8                                                     8 
  9 / {                                                 9 / {
 10         aliases {                                  10         aliases {
 11                 serial0 = &uart1;                  11                 serial0 = &uart1;
 12                 serial1 = &uart0;                  12                 serial1 = &uart0;
 13                 serial2 = &uart2;                  13                 serial2 = &uart2;
 14                 serial3 = &uart3;                  14                 serial3 = &uart3;
 15         };                                         15         };
 16                                                    16 
 17         chosen {                                   17         chosen {
 18                 stdout-path = "serial0:115200n     18                 stdout-path = "serial0:115200n8";
 19         };                                         19         };
 20 };                                                 20 };
 21                                                    21 
 22 &memory { /* Default DRAM banks */                 22 &memory { /* Default DRAM banks */
 23         reg = <0x00000000 0x80000000 0x0 0x800     23         reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
 24               <0x00000008 0x80000000 0x1 0x800     24               <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
 25 };                                                 25 };
 26                                                    26 
 27 &enet {                                            27 &enet {
 28         phy-mode = "rgmii-id";                     28         phy-mode = "rgmii-id";
 29         phy-handle = <&gphy0>;                     29         phy-handle = <&gphy0>;
 30 };                                                 30 };
 31                                                    31 
 32 &uart1 {                                           32 &uart1 {
 33         status = "okay";                           33         status = "okay";
 34 };                                                 34 };
 35                                                    35 
 36 &sdio0 {                                           36 &sdio0 {
 37         non-removable;                             37         non-removable;
 38         full-pwr-cycle;                            38         full-pwr-cycle;
 39 };                                                 39 };
 40                                                    40 
 41 &sdio1 {                                           41 &sdio1 {
 42         full-pwr-cycle;                            42         full-pwr-cycle;
 43 };                                                 43 };
 44                                                    44 
 45 &mdio_mux_iproc {                                  45 &mdio_mux_iproc {
 46         mdio@10 {                                  46         mdio@10 {
 47                 gphy0: eth-phy@10 {                47                 gphy0: eth-phy@10 {
 48                         reg = <0x10>;              48                         reg = <0x10>;
 49                 };                                 49                 };
 50         };                                         50         };
 51 };                                                 51 };
                                                      

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