1 // SPDX-License-Identifier: GPL-2.0 <<
2 /* 1 /*
3 * Samsung Exynos5433 TM2 board device tree so !! 2 * SAMSUNG Exynos5433 TM2 board device tree source
4 * 3 *
5 * Copyright (c) 2016 Samsung Electronics Co., 4 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
6 * 5 *
7 * Common device tree source file for Samsung' 6 * Common device tree source file for Samsung's TM2 and TM2E boards
8 * which are based on Samsung Exynos5433 SoC. 7 * which are based on Samsung Exynos5433 SoC.
>> 8 *
>> 9 * This program is free software; you can redistribute it and/or modify
>> 10 * it under the terms of the GNU General Public License version 2 as
>> 11 * published by the Free Software Foundation.
9 */ 12 */
10 13
11 /dts-v1/; 14 /dts-v1/;
12 #include "exynos5433.dtsi" 15 #include "exynos5433.dtsi"
13 #include <dt-bindings/clock/samsung,s2mps11.h> 16 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq 19 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h> <<
18 20
19 / { 21 / {
20 aliases { 22 aliases {
21 gsc0 = &gsc_0; 23 gsc0 = &gsc_0;
22 gsc1 = &gsc_1; 24 gsc1 = &gsc_1;
23 gsc2 = &gsc_2; 25 gsc2 = &gsc_2;
24 mmc0 = &mshc_0; <<
25 mmc2 = &mshc_2; <<
26 pinctrl0 = &pinctrl_alive; 26 pinctrl0 = &pinctrl_alive;
27 pinctrl1 = &pinctrl_aud; 27 pinctrl1 = &pinctrl_aud;
28 pinctrl2 = &pinctrl_cpif; 28 pinctrl2 = &pinctrl_cpif;
29 pinctrl3 = &pinctrl_ese; 29 pinctrl3 = &pinctrl_ese;
30 pinctrl4 = &pinctrl_finger; 30 pinctrl4 = &pinctrl_finger;
31 pinctrl5 = &pinctrl_fsys; 31 pinctrl5 = &pinctrl_fsys;
32 pinctrl6 = &pinctrl_imem; 32 pinctrl6 = &pinctrl_imem;
33 pinctrl7 = &pinctrl_nfc; 33 pinctrl7 = &pinctrl_nfc;
34 pinctrl8 = &pinctrl_peric; 34 pinctrl8 = &pinctrl_peric;
35 pinctrl9 = &pinctrl_touch; 35 pinctrl9 = &pinctrl_touch;
36 serial0 = &serial_0; 36 serial0 = &serial_0;
37 serial1 = &serial_1; 37 serial1 = &serial_1;
38 serial2 = &serial_2; 38 serial2 = &serial_2;
39 serial3 = &serial_3; 39 serial3 = &serial_3;
40 spi0 = &spi_0; 40 spi0 = &spi_0;
41 spi1 = &spi_1; 41 spi1 = &spi_1;
42 spi2 = &spi_2; 42 spi2 = &spi_2;
43 spi3 = &spi_3; 43 spi3 = &spi_3;
44 spi4 = &spi_4; 44 spi4 = &spi_4;
>> 45 mshc0 = &mshc_0;
>> 46 mshc2 = &mshc_2;
45 }; 47 };
46 48
47 chosen { 49 chosen {
48 stdout-path = &serial_1; 50 stdout-path = &serial_1;
49 }; 51 };
50 52
51 memory@20000000 { 53 memory@20000000 {
52 device_type = "memory"; 54 device_type = "memory";
53 reg = <0x0 0x20000000 0x0 0xc0 55 reg = <0x0 0x20000000 0x0 0xc0000000>;
54 }; 56 };
55 57
56 gpio-keys { 58 gpio-keys {
57 compatible = "gpio-keys"; 59 compatible = "gpio-keys";
58 60
59 power-key { 61 power-key {
60 gpios = <&gpa2 7 GPIO_ 62 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
61 linux,code = <KEY_POWE 63 linux,code = <KEY_POWER>;
62 label = "power key"; 64 label = "power key";
63 debounce-interval = <1 65 debounce-interval = <10>;
64 }; 66 };
65 67
66 volume-up-key { 68 volume-up-key {
67 gpios = <&gpa2 0 GPIO_ 69 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_VOLU 70 linux,code = <KEY_VOLUMEUP>;
69 label = "volume-up key 71 label = "volume-up key";
70 debounce-interval = <1 72 debounce-interval = <10>;
71 }; 73 };
72 74
73 volume-down-key { 75 volume-down-key {
74 gpios = <&gpa2 1 GPIO_ 76 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_VOLU 77 linux,code = <KEY_VOLUMEDOWN>;
76 label = "volume-down k 78 label = "volume-down key";
77 debounce-interval = <1 79 debounce-interval = <10>;
78 }; 80 };
79 81
80 homepage-key { 82 homepage-key {
81 gpios = <&gpa0 3 GPIO_ 83 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_MENU 84 linux,code = <KEY_MENU>;
83 label = "homepage key" 85 label = "homepage key";
84 debounce-interval = <1 86 debounce-interval = <10>;
85 }; 87 };
86 }; 88 };
87 89
88 i2c_max98504: i2c-gpio-0 { 90 i2c_max98504: i2c-gpio-0 {
89 compatible = "i2c-gpio"; 91 compatible = "i2c-gpio";
90 sda-gpios = <&gpd0 1 GPIO_ACTI !! 92 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
91 scl-gpios = <&gpd0 0 GPIO_ACTI !! 93 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
92 i2c-gpio,delay-us = <2>; 94 i2c-gpio,delay-us = <2>;
93 #address-cells = <1>; 95 #address-cells = <1>;
94 #size-cells = <0>; 96 #size-cells = <0>;
>> 97 status = "okay";
95 98
96 max98504: amplifier@31 { !! 99 max98504: max98504@31 {
97 compatible = "maxim,ma 100 compatible = "maxim,max98504";
98 reg = <0x31>; 101 reg = <0x31>;
99 !! 102 maxim,rx-path = <1>;
100 DIOVDD-supply = <&ldo3 !! 103 maxim,tx-path = <1>;
101 DVDD-supply = <&ldo3_r !! 104 maxim,tx-channel-mask = <3>;
102 PVDD-supply = <&vph_pw !! 105 maxim,tx-channel-source = <2>;
103 }; 106 };
104 }; 107 };
105 108
106 vph_pwr_regulator: regulator-vph-pwr { !! 109 irda_regulator: irda-regulator {
107 compatible = "regulator-fixed" <<
108 regulator-name = "VPH_PWR"; <<
109 regulator-min-microvolt = <420 <<
110 regulator-max-microvolt = <420 <<
111 }; <<
112 <<
113 irda_regulator: regulator-irda { <<
114 compatible = "regulator-fixed" 110 compatible = "regulator-fixed";
115 enable-active-high; 111 enable-active-high;
116 gpio = <&gpr3 3 GPIO_ACTIVE_HI 112 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
117 regulator-name = "irda_regulat 113 regulator-name = "irda_regulator";
118 }; 114 };
119 115
120 sound { 116 sound {
121 compatible = "samsung,tm2-audi 117 compatible = "samsung,tm2-audio";
122 audio-codec = <&wm5110>, <&hdm !! 118 audio-codec = <&wm5110>;
123 i2s-controller = <&i2s0 0>, <& !! 119 i2s-controller = <&i2s0>;
124 audio-amplifier = <&max98504>; 120 audio-amplifier = <&max98504>;
125 mic-bias-gpios = <&gpr3 2 GPIO 121 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
126 model = "wm5110"; 122 model = "wm5110";
127 audio-routing = /* Headphone * !! 123 samsung,audio-routing =
128 "HP", "HPOUT1L !! 124 /* Headphone */
129 "HP", "HPOUT1R !! 125 "HP", "HPOUT1L",
130 !! 126 "HP", "HPOUT1R",
131 /* Speaker */ !! 127
132 "SPK", "SPKOUT !! 128 /* Speaker */
133 "SPKOUT", "HPO !! 129 "SPK", "SPKOUT",
134 "SPKOUT", "HPO !! 130 "SPKOUT", "HPOUT2L",
135 !! 131 "SPKOUT", "HPOUT2R",
136 /* Receiver */ !! 132
137 "RCV", "HPOUT3 !! 133 /* Receiver */
138 "RCV", "HPOUT3 !! 134 "RCV", "HPOUT3L",
>> 135 "RCV", "HPOUT3R";
>> 136 status = "okay";
139 }; 137 };
140 }; 138 };
141 139
142 &adc { 140 &adc {
143 vdd-supply = <&ldo3_reg>; 141 vdd-supply = <&ldo3_reg>;
144 status = "okay"; 142 status = "okay";
145 143
146 thermistor-ap { 144 thermistor-ap {
147 compatible = "murata,ncp03wf10 145 compatible = "murata,ncp03wf104";
148 pullup-uv = <1800000>; 146 pullup-uv = <1800000>;
149 pullup-ohm = <100000>; 147 pullup-ohm = <100000>;
150 pulldown-ohm = <0>; 148 pulldown-ohm = <0>;
151 io-channels = <&adc 0>; 149 io-channels = <&adc 0>;
152 }; 150 };
153 151
154 thermistor-battery { 152 thermistor-battery {
155 compatible = "murata,ncp03wf10 153 compatible = "murata,ncp03wf104";
156 pullup-uv = <1800000>; 154 pullup-uv = <1800000>;
157 pullup-ohm = <100000>; 155 pullup-ohm = <100000>;
158 pulldown-ohm = <0>; 156 pulldown-ohm = <0>;
159 io-channels = <&adc 1>; 157 io-channels = <&adc 1>;
160 #thermal-sensor-cells = <0>; 158 #thermal-sensor-cells = <0>;
161 }; 159 };
162 160
163 thermistor-charger { 161 thermistor-charger {
164 compatible = "murata,ncp03wf10 162 compatible = "murata,ncp03wf104";
165 pullup-uv = <1800000>; 163 pullup-uv = <1800000>;
166 pullup-ohm = <100000>; 164 pullup-ohm = <100000>;
167 pulldown-ohm = <0>; 165 pulldown-ohm = <0>;
168 io-channels = <&adc 2>; 166 io-channels = <&adc 2>;
169 }; 167 };
170 }; 168 };
171 169
172 &bus_g2d_400 { 170 &bus_g2d_400 {
173 devfreq-events = <&ppmu_event0_d0_gene 171 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
174 vdd-supply = <&buck4_reg>; 172 vdd-supply = <&buck4_reg>;
175 exynos,saturation-ratio = <10>; 173 exynos,saturation-ratio = <10>;
176 status = "okay"; 174 status = "okay";
177 }; 175 };
178 176
179 &bus_g2d_266 { 177 &bus_g2d_266 {
180 devfreq = <&bus_g2d_400>; 178 devfreq = <&bus_g2d_400>;
181 status = "okay"; 179 status = "okay";
182 }; 180 };
183 181
184 &bus_gscl { 182 &bus_gscl {
185 devfreq = <&bus_g2d_400>; 183 devfreq = <&bus_g2d_400>;
186 status = "okay"; 184 status = "okay";
187 }; 185 };
188 186
189 &bus_hevc { 187 &bus_hevc {
190 devfreq = <&bus_g2d_400>; 188 devfreq = <&bus_g2d_400>;
191 status = "okay"; 189 status = "okay";
192 }; 190 };
193 191
194 &bus_jpeg { 192 &bus_jpeg {
195 devfreq = <&bus_g2d_400>; 193 devfreq = <&bus_g2d_400>;
196 status = "okay"; 194 status = "okay";
197 }; 195 };
198 196
199 &bus_mfc { 197 &bus_mfc {
200 devfreq = <&bus_g2d_400>; 198 devfreq = <&bus_g2d_400>;
201 status = "okay"; 199 status = "okay";
202 }; 200 };
203 201
204 &bus_mscl { 202 &bus_mscl {
205 devfreq = <&bus_g2d_400>; 203 devfreq = <&bus_g2d_400>;
206 status = "okay"; 204 status = "okay";
207 }; 205 };
208 206
209 &bus_noc0 { 207 &bus_noc0 {
210 devfreq = <&bus_g2d_400>; 208 devfreq = <&bus_g2d_400>;
211 status = "okay"; 209 status = "okay";
212 }; 210 };
213 211
214 &bus_noc1 { 212 &bus_noc1 {
215 devfreq = <&bus_g2d_400>; 213 devfreq = <&bus_g2d_400>;
216 status = "okay"; 214 status = "okay";
217 }; 215 };
218 216
219 &bus_noc2 { 217 &bus_noc2 {
220 devfreq = <&bus_g2d_400>; 218 devfreq = <&bus_g2d_400>;
221 status = "okay"; 219 status = "okay";
222 }; 220 };
223 221
224 &cmu_aud { 222 &cmu_aud {
225 assigned-clocks = <&cmu_aud CLK_MOUT_A !! 223 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
226 <&cmu_aud CLK_MOUT_SCLK_AUD_I2 !! 224 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
227 <&cmu_aud CLK_MOUT_SCLK_AUD_PC <<
228 <&cmu_top CLK_MOUT_AUD_PLL>, <<
229 <&cmu_top CLK_MOUT_AUD_PLL_USE <<
230 <&cmu_top CLK_MOUT_SCLK_AUDIO0 <<
231 <&cmu_top CLK_MOUT_SCLK_AUDIO1 <<
232 <&cmu_top CLK_MOUT_SCLK_SPDIF> <<
233 <<
234 <&cmu_aud CLK_DIV_AUD_CA5>, <<
235 <&cmu_aud CLK_DIV_ACLK_AUD>, <<
236 <&cmu_aud CLK_DIV_PCLK_DBG_AUD <<
237 <&cmu_aud CLK_DIV_SCLK_AUD_I2S <<
238 <&cmu_aud CLK_DIV_SCLK_AUD_PCM <<
239 <&cmu_aud CLK_DIV_SCLK_AUD_SLI <<
240 <&cmu_aud CLK_DIV_SCLK_AUD_UAR <<
241 <&cmu_top CLK_DIV_SCLK_AUDIO0> <<
242 <&cmu_top CLK_DIV_SCLK_AUDIO1> <<
243 <&cmu_top CLK_DIV_SCLK_PCM1>, <<
244 <&cmu_top CLK_DIV_SCLK_I2S1>; <<
245 <<
246 assigned-clock-parents = <&cmu_top CLK <<
247 <&cmu_aud CLK_MOUT_AUD_PLL_USE <<
248 <&cmu_aud CLK_MOUT_AUD_PLL_USE <<
249 <&cmu_top CLK_FOUT_AUD_PLL>, <<
250 <&cmu_top CLK_MOUT_AUD_PLL>, <<
251 <&cmu_top CLK_MOUT_AUD_PLL_USE <<
252 <&cmu_top CLK_MOUT_AUD_PLL_USE <<
253 <&cmu_top CLK_SCLK_AUDIO0>; <<
254 <<
255 assigned-clock-rates = <0>, <0>, <0>, <<
256 <196608001>, <65536001>, <3276 <<
257 <2048001>, <24576001>, <196608 <<
258 <24576001>, <98304001>, <20480 <<
259 }; 225 };
260 226
261 &cmu_fsys { 227 &cmu_fsys {
262 assigned-clocks = <&cmu_top CLK_MOUT_S 228 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
263 <&cmu_top CLK_MOUT_SCLK_USBHOS 229 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
264 <&cmu_fsys CLK_MOUT_SCLK_USBDR 230 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
265 <&cmu_fsys CLK_MOUT_SCLK_USBHO 231 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
266 <&cmu_fsys CLK_MOUT_PHYCLK_USB 232 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
267 <&cmu_fsys CLK_MOUT_PHYCLK_USB 233 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
268 <&cmu_fsys CLK_MOUT_PHYCLK_USB 234 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
269 <&cmu_fsys CLK_MOUT_PHYCLK_USB 235 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
270 <&cmu_top CLK_DIV_SCLK_USBDRD3 236 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
271 <&cmu_top CLK_DIV_SCLK_USBHOST 237 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
272 assigned-clock-parents = <&cmu_top CLK 238 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
273 <&cmu_top CLK_MOUT_BUS_PLL_USE 239 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
274 <&cmu_top CLK_SCLK_USBDRD30_FS 240 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
275 <&cmu_top CLK_SCLK_USBHOST30_F 241 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
276 <&cmu_fsys CLK_PHYCLK_USBDRD30 242 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
277 <&cmu_fsys CLK_PHYCLK_USBHOST3 243 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
278 <&cmu_fsys CLK_PHYCLK_USBDRD30 244 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
279 <&cmu_fsys CLK_PHYCLK_USBHOST3 245 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
280 assigned-clock-rates = <0>, <0>, <0>, 246 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
281 <66700000>, <66 247 <66700000>, <66700000>;
282 }; 248 };
283 249
284 &cmu_gscl { 250 &cmu_gscl {
285 assigned-clocks = <&cmu_gscl CLK_MOUT_ 251 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
286 <&cmu_gscl CLK_MOUT_ 252 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
287 assigned-clock-parents = <&cmu_top CLK 253 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
288 <&cmu_top CLK 254 <&cmu_top CLK_ACLK_GSCL_333>;
289 }; 255 };
290 256
291 &cmu_mfc { 257 &cmu_mfc {
292 assigned-clocks = <&cmu_mfc CLK_MOUT_A 258 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
293 assigned-clock-parents = <&cmu_top CLK 259 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
294 }; 260 };
295 261
296 &cmu_mif { <<
297 assigned-clocks = <&cmu_mif CLK_MOUT_S <<
298 assigned-clock-parents = <&cmu_mif CLK <<
299 assigned-clock-rates = <0>, <333000000 <<
300 }; <<
301 <<
302 &cmu_mscl { 262 &cmu_mscl {
303 assigned-clocks = <&cmu_mscl CLK_MOUT_ 263 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
304 <&cmu_mscl CLK_MOUT_ 264 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
305 <&cmu_mscl CLK_MOUT_ 265 <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
306 <&cmu_top CLK_MOUT_S 266 <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
307 assigned-clock-parents = <&cmu_top CLK 267 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
308 <&cmu_top CLK 268 <&cmu_top CLK_SCLK_JPEG_MSCL>,
309 <&cmu_mscl CL 269 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
310 <&cmu_top CLK 270 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
311 }; 271 };
312 272
313 &cmu_top { <<
314 assigned-clocks = <&cmu_top CLK_FOUT_A <<
315 assigned-clock-rates = <196608001>; <<
316 }; <<
317 <<
318 &cpu0 { 273 &cpu0 {
319 cpu-supply = <&buck3_reg>; 274 cpu-supply = <&buck3_reg>;
320 }; 275 };
321 276
322 &cpu4 { 277 &cpu4 {
323 cpu-supply = <&buck2_reg>; 278 cpu-supply = <&buck2_reg>;
324 }; 279 };
325 280
326 &decon { 281 &decon {
327 status = "okay"; 282 status = "okay";
328 }; 283 };
329 284
330 &decon_tv { 285 &decon_tv {
331 status = "okay"; 286 status = "okay";
332 287
333 ports { 288 ports {
334 #address-cells = <1>; 289 #address-cells = <1>;
335 #size-cells = <0>; 290 #size-cells = <0>;
336 291
337 port@0 { 292 port@0 {
338 reg = <0>; 293 reg = <0>;
339 tv_to_hdmi: endpoint { 294 tv_to_hdmi: endpoint {
340 remote-endpoin 295 remote-endpoint = <&hdmi_to_tv>;
341 }; 296 };
342 }; 297 };
343 }; 298 };
344 }; 299 };
345 300
346 &dsi { 301 &dsi {
347 status = "okay"; 302 status = "okay";
348 vddcore-supply = <&ldo6_reg>; 303 vddcore-supply = <&ldo6_reg>;
349 vddio-supply = <&ldo7_reg>; 304 vddio-supply = <&ldo7_reg>;
350 samsung,burst-clock-frequency = <51200 305 samsung,burst-clock-frequency = <512000000>;
351 samsung,esc-clock-frequency = <1600000 306 samsung,esc-clock-frequency = <16000000>;
352 samsung,pll-clock-frequency = <2400000 307 samsung,pll-clock-frequency = <24000000>;
353 pinctrl-names = "default"; 308 pinctrl-names = "default";
354 pinctrl-0 = <&te_irq>; 309 pinctrl-0 = <&te_irq>;
355 }; 310 };
356 311
357 &gpu { <<
358 mali-supply = <&buck6_reg>; <<
359 status = "okay"; <<
360 }; <<
361 <<
362 &hdmi { 312 &hdmi {
363 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH> 313 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
364 status = "okay"; 314 status = "okay";
365 vdd-supply = <&ldo6_reg>; 315 vdd-supply = <&ldo6_reg>;
366 vdd_osc-supply = <&ldo7_reg>; 316 vdd_osc-supply = <&ldo7_reg>;
367 vdd_pll-supply = <&ldo6_reg>; 317 vdd_pll-supply = <&ldo6_reg>;
368 318
369 ports { 319 ports {
370 #address-cells = <1>; 320 #address-cells = <1>;
371 #size-cells = <0>; 321 #size-cells = <0>;
372 322
373 port@0 { 323 port@0 {
374 reg = <0>; 324 reg = <0>;
375 hdmi_to_tv: endpoint { 325 hdmi_to_tv: endpoint {
376 remote-endpoin 326 remote-endpoint = <&tv_to_hdmi>;
377 }; 327 };
378 }; 328 };
379 329
380 port@1 { 330 port@1 {
381 reg = <1>; 331 reg = <1>;
382 hdmi_to_mhl: endpoint 332 hdmi_to_mhl: endpoint {
383 remote-endpoin 333 remote-endpoint = <&mhl_to_hdmi>;
384 }; 334 };
385 }; 335 };
386 }; 336 };
387 }; 337 };
388 338
389 &hsi2c_0 { 339 &hsi2c_0 {
390 status = "okay"; 340 status = "okay";
391 clock-frequency = <2500000>; 341 clock-frequency = <2500000>;
392 342
393 pmic@66 { !! 343 s2mps13-pmic@66 {
394 compatible = "samsung,s2mps13- 344 compatible = "samsung,s2mps13-pmic";
395 interrupt-parent = <&gpa0>; 345 interrupt-parent = <&gpa0>;
396 interrupts = <7 IRQ_TYPE_LEVEL 346 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
397 reg = <0x66>; 347 reg = <0x66>;
398 samsung,s2mps11-wrstbi-ground; 348 samsung,s2mps11-wrstbi-ground;
399 wakeup-source; <<
400 349
401 s2mps13_osc: clocks { 350 s2mps13_osc: clocks {
402 compatible = "samsung, 351 compatible = "samsung,s2mps13-clk";
403 #clock-cells = <1>; 352 #clock-cells = <1>;
404 clock-output-names = " 353 clock-output-names = "s2mps13_ap", "s2mps13_cp",
405 "s2mps13_bt"; 354 "s2mps13_bt";
406 }; 355 };
407 356
408 regulators { 357 regulators {
409 ldo1_reg: LDO1 { 358 ldo1_reg: LDO1 {
410 regulator-name 359 regulator-name = "VDD_ALIVE_0.9V_AP";
411 regulator-min- 360 regulator-min-microvolt = <900000>;
412 regulator-max- 361 regulator-max-microvolt = <900000>;
413 regulator-alwa 362 regulator-always-on;
414 }; 363 };
415 364
416 ldo2_reg: LDO2 { 365 ldo2_reg: LDO2 {
417 regulator-name 366 regulator-name = "VDDQ_MMC2_2.8V_AP";
418 regulator-min- 367 regulator-min-microvolt = <2800000>;
419 regulator-max- 368 regulator-max-microvolt = <2800000>;
420 regulator-alwa 369 regulator-always-on;
421 regulator-stat 370 regulator-state-mem {
422 regula 371 regulator-off-in-suspend;
423 }; 372 };
424 }; 373 };
425 374
426 ldo3_reg: LDO3 { 375 ldo3_reg: LDO3 {
427 regulator-name 376 regulator-name = "VDD1_E_1.8V_AP";
428 regulator-min- 377 regulator-min-microvolt = <1800000>;
429 regulator-max- 378 regulator-max-microvolt = <1800000>;
430 regulator-alwa 379 regulator-always-on;
431 }; 380 };
432 381
433 ldo4_reg: LDO4 { 382 ldo4_reg: LDO4 {
434 regulator-name 383 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
435 regulator-min- 384 regulator-min-microvolt = <1300000>;
436 regulator-max- 385 regulator-max-microvolt = <1300000>;
437 regulator-alwa 386 regulator-always-on;
438 regulator-stat 387 regulator-state-mem {
439 regula 388 regulator-off-in-suspend;
440 }; 389 };
441 }; 390 };
442 391
443 ldo5_reg: LDO5 { 392 ldo5_reg: LDO5 {
444 regulator-name 393 regulator-name = "VDD10_DPLL_1.0V_AP";
445 regulator-min- 394 regulator-min-microvolt = <1000000>;
446 regulator-max- 395 regulator-max-microvolt = <1000000>;
447 regulator-alwa 396 regulator-always-on;
448 regulator-stat 397 regulator-state-mem {
449 regula 398 regulator-off-in-suspend;
450 }; 399 };
451 }; 400 };
452 401
453 ldo6_reg: LDO6 { 402 ldo6_reg: LDO6 {
454 regulator-name 403 regulator-name = "VDD10_MIPI2L_1.0V_AP";
455 regulator-min- 404 regulator-min-microvolt = <1000000>;
456 regulator-max- 405 regulator-max-microvolt = <1000000>;
457 regulator-stat 406 regulator-state-mem {
458 regula 407 regulator-off-in-suspend;
459 }; 408 };
460 }; 409 };
461 410
462 ldo7_reg: LDO7 { 411 ldo7_reg: LDO7 {
463 regulator-name 412 regulator-name = "VDD18_MIPI2L_1.8V_AP";
464 regulator-min- 413 regulator-min-microvolt = <1800000>;
465 regulator-max- 414 regulator-max-microvolt = <1800000>;
466 regulator-alwa 415 regulator-always-on;
467 regulator-stat 416 regulator-state-mem {
468 regula 417 regulator-off-in-suspend;
469 }; 418 };
470 }; 419 };
471 420
472 ldo8_reg: LDO8 { 421 ldo8_reg: LDO8 {
473 regulator-name 422 regulator-name = "VDD18_LLI_1.8V_AP";
474 regulator-min- 423 regulator-min-microvolt = <1800000>;
475 regulator-max- 424 regulator-max-microvolt = <1800000>;
476 regulator-alwa 425 regulator-always-on;
477 regulator-stat 426 regulator-state-mem {
478 regula 427 regulator-off-in-suspend;
479 }; 428 };
480 }; 429 };
481 430
482 ldo9_reg: LDO9 { 431 ldo9_reg: LDO9 {
483 regulator-name 432 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
484 regulator-min- 433 regulator-min-microvolt = <1800000>;
485 regulator-max- 434 regulator-max-microvolt = <1800000>;
486 regulator-alwa 435 regulator-always-on;
487 regulator-stat 436 regulator-state-mem {
488 regula 437 regulator-off-in-suspend;
489 }; 438 };
490 }; 439 };
491 440
492 ldo10_reg: LDO10 { 441 ldo10_reg: LDO10 {
493 regulator-name 442 regulator-name = "VDD33_USB30_3.0V_AP";
494 regulator-min- 443 regulator-min-microvolt = <3000000>;
495 regulator-max- 444 regulator-max-microvolt = <3000000>;
496 regulator-stat 445 regulator-state-mem {
497 regula 446 regulator-off-in-suspend;
498 }; 447 };
499 }; 448 };
500 449
501 ldo11_reg: LDO11 { 450 ldo11_reg: LDO11 {
502 regulator-name 451 regulator-name = "VDD_INT_M_1.0V_AP";
503 regulator-min- 452 regulator-min-microvolt = <1000000>;
504 regulator-max- 453 regulator-max-microvolt = <1000000>;
505 regulator-alwa 454 regulator-always-on;
506 regulator-stat 455 regulator-state-mem {
507 regula 456 regulator-off-in-suspend;
508 }; 457 };
509 }; 458 };
510 459
511 ldo12_reg: LDO12 { 460 ldo12_reg: LDO12 {
512 regulator-name 461 regulator-name = "VDD_KFC_M_1.1V_AP";
513 regulator-min- 462 regulator-min-microvolt = <800000>;
514 regulator-max- 463 regulator-max-microvolt = <1350000>;
515 regulator-alwa 464 regulator-always-on;
516 }; 465 };
517 466
518 ldo13_reg: LDO13 { 467 ldo13_reg: LDO13 {
519 regulator-name 468 regulator-name = "VDD_G3D_M_0.95V_AP";
520 regulator-min- 469 regulator-min-microvolt = <950000>;
521 regulator-max- 470 regulator-max-microvolt = <950000>;
522 regulator-alwa 471 regulator-always-on;
523 regulator-stat 472 regulator-state-mem {
524 regula 473 regulator-off-in-suspend;
525 }; 474 };
526 }; 475 };
527 476
528 ldo14_reg: LDO14 { 477 ldo14_reg: LDO14 {
529 regulator-name 478 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
530 regulator-min- 479 regulator-min-microvolt = <1200000>;
531 regulator-max- 480 regulator-max-microvolt = <1200000>;
532 regulator-alwa 481 regulator-always-on;
533 regulator-stat 482 regulator-state-mem {
534 regula 483 regulator-off-in-suspend;
535 }; 484 };
536 }; 485 };
537 486
538 ldo15_reg: LDO15 { 487 ldo15_reg: LDO15 {
539 regulator-name 488 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
540 regulator-min- 489 regulator-min-microvolt = <1200000>;
541 regulator-max- 490 regulator-max-microvolt = <1200000>;
542 regulator-alwa 491 regulator-always-on;
543 regulator-stat 492 regulator-state-mem {
544 regula 493 regulator-off-in-suspend;
545 }; 494 };
546 }; 495 };
547 496
548 ldo16_reg: LDO16 { 497 ldo16_reg: LDO16 {
549 regulator-name 498 regulator-name = "VDDQ_EFUSE";
550 regulator-min- 499 regulator-min-microvolt = <1400000>;
551 regulator-max- 500 regulator-max-microvolt = <3400000>;
552 regulator-alwa 501 regulator-always-on;
553 }; 502 };
554 503
555 ldo17_reg: LDO17 { 504 ldo17_reg: LDO17 {
556 regulator-name 505 regulator-name = "V_TFLASH_2.8V_AP";
557 regulator-min- 506 regulator-min-microvolt = <2800000>;
558 regulator-max- 507 regulator-max-microvolt = <2800000>;
559 }; 508 };
560 509
561 ldo18_reg: LDO18 { 510 ldo18_reg: LDO18 {
562 regulator-name 511 regulator-name = "V_CODEC_1.8V_AP";
563 regulator-min- 512 regulator-min-microvolt = <1800000>;
564 regulator-max- 513 regulator-max-microvolt = <1800000>;
565 }; 514 };
566 515
567 ldo19_reg: LDO19 { 516 ldo19_reg: LDO19 {
568 regulator-name 517 regulator-name = "VDDA_1.8V_COMP";
569 regulator-min- 518 regulator-min-microvolt = <1800000>;
570 regulator-max- 519 regulator-max-microvolt = <1800000>;
571 regulator-alwa 520 regulator-always-on;
572 }; 521 };
573 522
574 ldo20_reg: LDO20 { 523 ldo20_reg: LDO20 {
575 regulator-name 524 regulator-name = "VCC_2.8V_AP";
576 regulator-min- 525 regulator-min-microvolt = <2800000>;
577 regulator-max- 526 regulator-max-microvolt = <2800000>;
578 regulator-alwa 527 regulator-always-on;
579 }; 528 };
580 529
581 ldo21_reg: LDO21 { 530 ldo21_reg: LDO21 {
582 regulator-name 531 regulator-name = "VT_CAM_1.8V";
583 regulator-min- 532 regulator-min-microvolt = <1800000>;
584 regulator-max- 533 regulator-max-microvolt = <1800000>;
585 }; 534 };
586 535
587 ldo22_reg: LDO22 { 536 ldo22_reg: LDO22 {
588 regulator-name 537 regulator-name = "CAM_IO_1.8V_AP";
589 regulator-min- 538 regulator-min-microvolt = <1800000>;
590 regulator-max- 539 regulator-max-microvolt = <1800000>;
591 }; 540 };
592 541
593 ldo23_reg: LDO23 { 542 ldo23_reg: LDO23 {
594 regulator-name 543 regulator-name = "CAM_SEN_CORE_1.05V_AP";
595 regulator-min- 544 regulator-min-microvolt = <1050000>;
596 regulator-max- 545 regulator-max-microvolt = <1050000>;
597 }; 546 };
598 547
599 ldo24_reg: LDO24 { 548 ldo24_reg: LDO24 {
600 regulator-name 549 regulator-name = "VT_CAM_1.2V";
601 regulator-min- 550 regulator-min-microvolt = <1200000>;
602 regulator-max- 551 regulator-max-microvolt = <1200000>;
603 }; 552 };
604 553
605 ldo25_reg: LDO25 { 554 ldo25_reg: LDO25 {
606 regulator-name 555 regulator-name = "UNUSED_LDO25";
607 regulator-min- 556 regulator-min-microvolt = <2800000>;
608 regulator-max- 557 regulator-max-microvolt = <2800000>;
609 }; 558 };
610 559
611 ldo26_reg: LDO26 { 560 ldo26_reg: LDO26 {
612 regulator-name 561 regulator-name = "CAM_AF_2.8V_AP";
613 regulator-min- 562 regulator-min-microvolt = <2800000>;
614 regulator-max- 563 regulator-max-microvolt = <2800000>;
615 }; 564 };
616 565
617 ldo27_reg: LDO27 { 566 ldo27_reg: LDO27 {
618 regulator-name 567 regulator-name = "VCC_3.0V_LCD_AP";
619 regulator-min- 568 regulator-min-microvolt = <3000000>;
620 regulator-max- 569 regulator-max-microvolt = <3000000>;
621 }; 570 };
622 571
623 ldo28_reg: LDO28 { 572 ldo28_reg: LDO28 {
624 regulator-name 573 regulator-name = "VCC_1.8V_LCD_AP";
625 regulator-min- 574 regulator-min-microvolt = <1800000>;
626 regulator-max- 575 regulator-max-microvolt = <1800000>;
627 }; 576 };
628 577
629 ldo29_reg: LDO29 { 578 ldo29_reg: LDO29 {
630 regulator-name 579 regulator-name = "VT_CAM_2.8V";
631 regulator-min- 580 regulator-min-microvolt = <3000000>;
632 regulator-max- 581 regulator-max-microvolt = <3000000>;
633 }; 582 };
634 583
635 ldo30_reg: LDO30 { 584 ldo30_reg: LDO30 {
636 regulator-name 585 regulator-name = "TSP_AVDD_3.3V_AP";
637 regulator-min- 586 regulator-min-microvolt = <3300000>;
638 regulator-max- 587 regulator-max-microvolt = <3300000>;
639 }; 588 };
640 589
641 ldo31_reg: LDO31 { 590 ldo31_reg: LDO31 {
642 /* 591 /*
643 * LDO31 diffe 592 * LDO31 differs from target to target,
644 * its definit 593 * its definition is in the .dts
645 */ 594 */
646 }; 595 };
647 596
648 ldo32_reg: LDO32 { 597 ldo32_reg: LDO32 {
649 regulator-name 598 regulator-name = "VTOUCH_1.8V_AP";
650 regulator-min- 599 regulator-min-microvolt = <1800000>;
651 regulator-max- 600 regulator-max-microvolt = <1800000>;
652 }; 601 };
653 602
654 ldo33_reg: LDO33 { 603 ldo33_reg: LDO33 {
655 regulator-name 604 regulator-name = "VTOUCH_LED_3.3V";
656 regulator-min- 605 regulator-min-microvolt = <2500000>;
657 regulator-max- 606 regulator-max-microvolt = <3300000>;
658 regulator-ramp 607 regulator-ramp-delay = <12500>;
659 }; 608 };
660 609
661 ldo34_reg: LDO34 { 610 ldo34_reg: LDO34 {
662 regulator-name 611 regulator-name = "VCC_1.8V_MHL_AP";
663 regulator-min- 612 regulator-min-microvolt = <1000000>;
664 regulator-max- 613 regulator-max-microvolt = <2100000>;
665 }; 614 };
666 615
667 ldo35_reg: LDO35 { 616 ldo35_reg: LDO35 {
668 regulator-name 617 regulator-name = "OIS_VM_2.8V";
669 regulator-min- 618 regulator-min-microvolt = <1800000>;
670 regulator-max- 619 regulator-max-microvolt = <2800000>;
671 }; 620 };
672 621
673 ldo36_reg: LDO36 { 622 ldo36_reg: LDO36 {
674 regulator-name 623 regulator-name = "VSIL_1.0V";
675 regulator-min- 624 regulator-min-microvolt = <1000000>;
676 regulator-max- 625 regulator-max-microvolt = <1000000>;
677 }; 626 };
678 627
679 ldo37_reg: LDO37 { 628 ldo37_reg: LDO37 {
680 regulator-name 629 regulator-name = "VF_1.8V";
681 regulator-min- 630 regulator-min-microvolt = <1800000>;
682 regulator-max- 631 regulator-max-microvolt = <1800000>;
683 }; 632 };
684 633
685 ldo38_reg: LDO38 { 634 ldo38_reg: LDO38 {
686 /* 635 /*
687 * LDO38 diffe 636 * LDO38 differs from target to target,
688 * its definit 637 * its definition is in the .dts
689 */ 638 */
690 }; 639 };
691 640
692 ldo39_reg: LDO39 { 641 ldo39_reg: LDO39 {
693 regulator-name 642 regulator-name = "V_HRM_1.8V";
694 regulator-min- 643 regulator-min-microvolt = <1800000>;
695 regulator-max- 644 regulator-max-microvolt = <1800000>;
696 }; 645 };
697 646
698 ldo40_reg: LDO40 { 647 ldo40_reg: LDO40 {
699 regulator-name 648 regulator-name = "V_HRM_3.3V";
700 regulator-min- 649 regulator-min-microvolt = <3300000>;
701 regulator-max- 650 regulator-max-microvolt = <3300000>;
702 }; 651 };
703 652
704 buck1_reg: BUCK1 { 653 buck1_reg: BUCK1 {
705 regulator-name 654 regulator-name = "VDD_MIF_0.9V_AP";
706 regulator-min- 655 regulator-min-microvolt = <600000>;
707 regulator-max- 656 regulator-max-microvolt = <1500000>;
708 regulator-alwa 657 regulator-always-on;
709 regulator-stat 658 regulator-state-mem {
710 regula 659 regulator-off-in-suspend;
711 }; 660 };
712 }; 661 };
713 662
714 buck2_reg: BUCK2 { 663 buck2_reg: BUCK2 {
715 regulator-name 664 regulator-name = "VDD_EGL_1.0V_AP";
716 regulator-min- 665 regulator-min-microvolt = <900000>;
717 regulator-max- 666 regulator-max-microvolt = <1300000>;
718 regulator-alwa 667 regulator-always-on;
719 regulator-stat 668 regulator-state-mem {
720 regula 669 regulator-off-in-suspend;
721 }; 670 };
722 }; 671 };
723 672
724 buck3_reg: BUCK3 { 673 buck3_reg: BUCK3 {
725 regulator-name 674 regulator-name = "VDD_KFC_1.0V_AP";
726 regulator-min- 675 regulator-min-microvolt = <800000>;
727 regulator-max- 676 regulator-max-microvolt = <1200000>;
728 regulator-alwa 677 regulator-always-on;
729 regulator-stat 678 regulator-state-mem {
730 regula 679 regulator-off-in-suspend;
731 }; 680 };
732 }; 681 };
733 682
734 buck4_reg: BUCK4 { 683 buck4_reg: BUCK4 {
735 regulator-name 684 regulator-name = "VDD_INT_0.95V_AP";
736 regulator-min- 685 regulator-min-microvolt = <600000>;
737 regulator-max- 686 regulator-max-microvolt = <1500000>;
738 regulator-alwa 687 regulator-always-on;
739 regulator-stat 688 regulator-state-mem {
740 regula 689 regulator-off-in-suspend;
741 }; 690 };
742 }; 691 };
743 692
744 buck5_reg: BUCK5 { 693 buck5_reg: BUCK5 {
745 regulator-name 694 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
746 regulator-min- 695 regulator-min-microvolt = <600000>;
747 regulator-max- 696 regulator-max-microvolt = <1500000>;
748 regulator-alwa 697 regulator-always-on;
749 regulator-stat 698 regulator-state-mem {
750 regula 699 regulator-off-in-suspend;
751 }; 700 };
752 }; 701 };
753 702
754 buck6_reg: BUCK6 { 703 buck6_reg: BUCK6 {
755 regulator-name 704 regulator-name = "VDD_G3D_0.9V_AP";
756 regulator-min- 705 regulator-min-microvolt = <600000>;
757 regulator-max- 706 regulator-max-microvolt = <1500000>;
758 regulator-alwa 707 regulator-always-on;
759 regulator-stat 708 regulator-state-mem {
760 regula 709 regulator-off-in-suspend;
761 }; 710 };
762 }; 711 };
763 712
764 buck7_reg: BUCK7 { 713 buck7_reg: BUCK7 {
765 regulator-name 714 regulator-name = "VDD_MEM1_1.2V_AP";
766 regulator-min- 715 regulator-min-microvolt = <1200000>;
767 regulator-max- 716 regulator-max-microvolt = <1200000>;
768 regulator-alwa 717 regulator-always-on;
769 }; 718 };
770 719
771 buck8_reg: BUCK8 { 720 buck8_reg: BUCK8 {
772 regulator-name 721 regulator-name = "VDD_LLDO_1.35V_AP";
773 regulator-min- 722 regulator-min-microvolt = <1350000>;
774 regulator-max- 723 regulator-max-microvolt = <3300000>;
775 regulator-alwa 724 regulator-always-on;
776 }; 725 };
777 726
778 buck9_reg: BUCK9 { 727 buck9_reg: BUCK9 {
779 regulator-name 728 regulator-name = "VDD_MLDO_2.0V_AP";
780 regulator-min- 729 regulator-min-microvolt = <1350000>;
781 regulator-max- 730 regulator-max-microvolt = <3300000>;
782 regulator-alwa 731 regulator-always-on;
783 }; 732 };
784 733
785 buck10_reg: BUCK10 { 734 buck10_reg: BUCK10 {
786 regulator-name 735 regulator-name = "vdd_mem2";
787 regulator-min- 736 regulator-min-microvolt = <550000>;
788 regulator-max- 737 regulator-max-microvolt = <1500000>;
789 regulator-alwa 738 regulator-always-on;
790 }; 739 };
791 }; 740 };
792 }; 741 };
793 }; 742 };
794 743
795 &hsi2c_4 { <<
796 status = "okay"; <<
797 <<
798 s3fwrn5: nfc@27 { <<
799 compatible = "samsung,s3fwrn5- <<
800 reg = <0x27>; <<
801 interrupt-parent = <&gpa1>; <<
802 interrupts = <3 IRQ_TYPE_EDGE_ <<
803 en-gpios = <&gpf1 4 GPIO_ACTIV <<
804 wake-gpios = <&gpj0 2 GPIO_ACT <<
805 }; <<
806 }; <<
807 <<
808 &hsi2c_5 { 744 &hsi2c_5 {
809 status = "okay"; 745 status = "okay";
810 746
811 stmfts: touchscreen@49 { 747 stmfts: touchscreen@49 {
812 compatible = "st,stmfts"; 748 compatible = "st,stmfts";
813 reg = <0x49>; 749 reg = <0x49>;
814 interrupt-parent = <&gpa1>; 750 interrupt-parent = <&gpa1>;
815 interrupts = <1 IRQ_TYPE_LEVEL 751 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
816 avdd-supply = <&ldo30_reg>; 752 avdd-supply = <&ldo30_reg>;
817 vdd-supply = <&ldo31_reg>; 753 vdd-supply = <&ldo31_reg>;
818 }; 754 };
819 }; 755 };
820 756
821 &hsi2c_7 { 757 &hsi2c_7 {
822 status = "okay"; 758 status = "okay";
823 clock-frequency = <1000000>; <<
824 759
825 bridge@39 { !! 760 sii8620@39 {
826 reg = <0x39>; 761 reg = <0x39>;
827 compatible = "sil,sii8620"; 762 compatible = "sil,sii8620";
828 cvcc10-supply = <&ldo36_reg>; 763 cvcc10-supply = <&ldo36_reg>;
829 iovcc18-supply = <&ldo34_reg>; 764 iovcc18-supply = <&ldo34_reg>;
830 interrupt-parent = <&gpf0>; 765 interrupt-parent = <&gpf0>;
831 interrupts = <2 IRQ_TYPE_LEVEL 766 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
832 reset-gpios = <&gpv7 0 GPIO_AC 767 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
833 clocks = <&pmu_system_controll 768 clocks = <&pmu_system_controller 0>;
834 clock-names = "xtal"; 769 clock-names = "xtal";
835 770
836 ports { !! 771 port {
837 #address-cells = <1>; !! 772 mhl_to_hdmi: endpoint {
838 #size-cells = <0>; !! 773 remote-endpoint = <&hdmi_to_mhl>;
839 <<
840 port@0 { <<
841 reg = <0>; <<
842 mhl_to_hdmi: e <<
843 remote <<
844 }; <<
845 }; <<
846 <<
847 port@1 { <<
848 reg = <1>; <<
849 mhl_to_musb_co <<
850 remote <<
851 }; <<
852 }; 774 };
853 }; 775 };
854 }; 776 };
855 }; 777 };
856 778
857 &hsi2c_8 { 779 &hsi2c_8 {
858 status = "okay"; 780 status = "okay";
859 781
860 pmic@66 { !! 782 max77843@66 {
861 compatible = "maxim,max77843"; 783 compatible = "maxim,max77843";
862 interrupt-parent = <&gpa1>; 784 interrupt-parent = <&gpa1>;
863 interrupts = <5 IRQ_TYPE_EDGE_ 785 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
864 reg = <0x66>; 786 reg = <0x66>;
865 787
866 muic: extcon { !! 788 muic: max77843-muic {
867 compatible = "maxim,ma 789 compatible = "maxim,max77843-muic";
868 <<
869 musb_con: connector { <<
870 compatible = " <<
871 " <<
872 label = "micro <<
873 type = "micro" <<
874 <<
875 ports { <<
876 #addre <<
877 #size- <<
878 <<
879 port@0 <<
880 <<
881 <<
882 <<
883 <<
884 <<
885 <<
886 <<
887 <<
888 }; <<
889 <<
890 port@3 <<
891 <<
892 <<
893 <<
894 <<
895 }; <<
896 }; <<
897 }; <<
898 <<
899 ports { <<
900 port { <<
901 muic_t <<
902 <<
903 }; <<
904 }; <<
905 }; <<
906 }; 790 };
907 791
908 regulators { 792 regulators {
909 compatible = "maxim,ma 793 compatible = "maxim,max77843-regulator";
910 safeout1_reg: SAFEOUT1 794 safeout1_reg: SAFEOUT1 {
911 regulator-name 795 regulator-name = "SAFEOUT1";
912 regulator-min- 796 regulator-min-microvolt = <3300000>;
913 regulator-max- 797 regulator-max-microvolt = <4950000>;
914 }; 798 };
915 799
916 safeout2_reg: SAFEOUT2 800 safeout2_reg: SAFEOUT2 {
917 regulator-name 801 regulator-name = "SAFEOUT2";
918 regulator-min- 802 regulator-min-microvolt = <3300000>;
919 regulator-max- 803 regulator-max-microvolt = <4950000>;
920 }; 804 };
921 805
922 charger_reg: CHARGER { 806 charger_reg: CHARGER {
923 regulator-name 807 regulator-name = "CHARGER";
924 regulator-min- 808 regulator-min-microamp = <100000>;
925 regulator-max- 809 regulator-max-microamp = <3150000>;
926 }; 810 };
927 }; 811 };
928 812
929 haptic: motor-driver { !! 813 haptic: max77843-haptic {
930 compatible = "maxim,ma 814 compatible = "maxim,max77843-haptic";
931 haptic-supply = <&ldo3 815 haptic-supply = <&ldo38_reg>;
932 pwms = <&pwm 0 33670 0 816 pwms = <&pwm 0 33670 0>;
>> 817 pwm-names = "haptic";
933 }; 818 };
934 }; 819 };
935 }; 820 };
936 821
937 &hsi2c_11 { 822 &hsi2c_11 {
938 status = "okay"; 823 status = "okay";
939 }; 824 };
940 825
941 &i2s0 { 826 &i2s0 {
942 status = "okay"; 827 status = "okay";
943 }; 828 };
944 829
945 &i2s1 { <<
946 assigned-clocks = <&i2s1 CLK_I2S_RCLK_ <<
947 assigned-clock-parents = <&cmu_peric C <<
948 status = "okay"; <<
949 }; <<
950 <<
951 &mshc_0 { 830 &mshc_0 {
952 status = "okay"; 831 status = "okay";
953 mmc-ddr-1_8v; <<
954 mmc-hs200-1_8v; 832 mmc-hs200-1_8v;
955 mmc-hs400-1_8v; 833 mmc-hs400-1_8v;
956 cap-mmc-highspeed; 834 cap-mmc-highspeed;
957 non-removable; 835 non-removable;
958 card-detect-delay = <200>; 836 card-detect-delay = <200>;
959 samsung,dw-mshc-ciu-div = <3>; 837 samsung,dw-mshc-ciu-div = <3>;
960 samsung,dw-mshc-sdr-timing = <0 4>; 838 samsung,dw-mshc-sdr-timing = <0 4>;
961 samsung,dw-mshc-ddr-timing = <0 2>; 839 samsung,dw-mshc-ddr-timing = <0 2>;
962 samsung,dw-mshc-hs400-timing = <0 3>; 840 samsung,dw-mshc-hs400-timing = <0 3>;
963 samsung,read-strobe-delay = <90>; 841 samsung,read-strobe-delay = <90>;
964 fifo-depth = <0x80>; 842 fifo-depth = <0x80>;
965 pinctrl-names = "default"; 843 pinctrl-names = "default";
966 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qr 844 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
967 &sd0_bus8 &sd0_rdqs>; 845 &sd0_bus8 &sd0_rdqs>;
968 bus-width = <8>; 846 bus-width = <8>;
969 assigned-clocks = <&cmu_top CLK_SCLK_M 847 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
970 assigned-clock-rates = <800000000>; 848 assigned-clock-rates = <800000000>;
971 }; 849 };
972 850
973 &mshc_2 { 851 &mshc_2 {
974 status = "okay"; 852 status = "okay";
975 cap-sd-highspeed; 853 cap-sd-highspeed;
976 disable-wp; 854 disable-wp;
977 cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; !! 855 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
>> 856 cd-inverted;
978 card-detect-delay = <200>; 857 card-detect-delay = <200>;
979 samsung,dw-mshc-ciu-div = <3>; 858 samsung,dw-mshc-ciu-div = <3>;
980 samsung,dw-mshc-sdr-timing = <0 4>; 859 samsung,dw-mshc-sdr-timing = <0 4>;
981 samsung,dw-mshc-ddr-timing = <0 2>; 860 samsung,dw-mshc-ddr-timing = <0 2>;
982 fifo-depth = <0x80>; 861 fifo-depth = <0x80>;
983 pinctrl-names = "default"; 862 pinctrl-names = "default";
984 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bu 863 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
985 bus-width = <4>; 864 bus-width = <4>;
986 }; 865 };
987 866
988 &pcie { <<
989 status = "okay"; <<
990 pinctrl-names = "default"; <<
991 pinctrl-0 = <&pcie_bus &pcie_wlanen>; <<
992 vdd10-supply = <&ldo6_reg>; <<
993 vdd18-supply = <&ldo7_reg>; <<
994 assigned-clocks = <&cmu_fsys CLK_MOUT_ <<
995 <&cmu_top CLK_MOUT_S <<
996 assigned-clock-parents = <&cmu_top CLK <<
997 <&cmu_top CLK <<
998 assigned-clock-rates = <0>, <100000000 <<
999 interrupt-map-mask = <0 0 0 0>; <<
1000 interrupt-map = <0 0 0 0 &gic GIC_SPI <<
1001 }; <<
1002 <<
1003 &pcie_phy { <<
1004 status = "okay"; <<
1005 }; <<
1006 <<
1007 &ppmu_d0_general { 867 &ppmu_d0_general {
1008 status = "okay"; 868 status = "okay";
1009 events { 869 events {
1010 ppmu_event0_d0_general: ppmu- 870 ppmu_event0_d0_general: ppmu-event0-d0-general {
1011 event-name = "ppmu-ev 871 event-name = "ppmu-event0-d0-general";
1012 }; 872 };
1013 }; 873 };
1014 }; 874 };
1015 875
1016 &ppmu_d1_general { 876 &ppmu_d1_general {
1017 status = "okay"; 877 status = "okay";
1018 events { 878 events {
1019 ppmu_event0_d1_general: ppmu- 879 ppmu_event0_d1_general: ppmu-event0-d1-general {
1020 event-name = "ppmu-eve 880 event-name = "ppmu-event0-d1-general";
1021 }; 881 };
1022 }; !! 882 };
1023 }; 883 };
1024 884
1025 &pinctrl_alive { 885 &pinctrl_alive {
1026 pinctrl-names = "default"; 886 pinctrl-names = "default";
1027 pinctrl-0 = <&initial_alive>; 887 pinctrl-0 = <&initial_alive>;
1028 888
1029 initial_alive: initial-state { 889 initial_alive: initial-state {
1030 PIN_IN(gpa0-0, DOWN, FAST_SR1 !! 890 PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
1031 PIN_IN(gpa0-1, NONE, FAST_SR1 !! 891 PIN(INPUT, gpa0-1, NONE, FAST_SR1);
1032 PIN_IN(gpa0-2, DOWN, FAST_SR1 !! 892 PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
1033 PIN_IN(gpa0-3, NONE, FAST_SR1 !! 893 PIN(INPUT, gpa0-3, NONE, FAST_SR1);
1034 PIN_IN(gpa0-4, NONE, FAST_SR1 !! 894 PIN(INPUT, gpa0-4, NONE, FAST_SR1);
1035 PIN_IN(gpa0-5, DOWN, FAST_SR1 !! 895 PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
1036 PIN_IN(gpa0-6, NONE, FAST_SR1 !! 896 PIN(INPUT, gpa0-6, NONE, FAST_SR1);
1037 PIN_IN(gpa0-7, NONE, FAST_SR1 !! 897 PIN(INPUT, gpa0-7, NONE, FAST_SR1);
1038 !! 898
1039 PIN_IN(gpa1-0, UP, FAST_SR1); !! 899 PIN(INPUT, gpa1-0, UP, FAST_SR1);
1040 PIN_IN(gpa1-1, UP, FAST_SR1); !! 900 PIN(INPUT, gpa1-1, UP, FAST_SR1);
1041 PIN_IN(gpa1-2, NONE, FAST_SR1 !! 901 PIN(INPUT, gpa1-2, NONE, FAST_SR1);
1042 PIN_IN(gpa1-3, DOWN, FAST_SR1 !! 902 PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
1043 PIN_IN(gpa1-4, DOWN, FAST_SR1 !! 903 PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
1044 PIN_IN(gpa1-5, NONE, FAST_SR1 !! 904 PIN(INPUT, gpa1-5, NONE, FAST_SR1);
1045 PIN_IN(gpa1-6, NONE, FAST_SR1 !! 905 PIN(INPUT, gpa1-6, NONE, FAST_SR1);
1046 PIN_IN(gpa1-7, NONE, FAST_SR1 !! 906 PIN(INPUT, gpa1-7, NONE, FAST_SR1);
1047 !! 907
1048 PIN_IN(gpa2-0, NONE, FAST_SR1 !! 908 PIN(INPUT, gpa2-0, NONE, FAST_SR1);
1049 PIN_IN(gpa2-1, NONE, FAST_SR1 !! 909 PIN(INPUT, gpa2-1, NONE, FAST_SR1);
1050 PIN_IN(gpa2-2, NONE, FAST_SR1 !! 910 PIN(INPUT, gpa2-2, NONE, FAST_SR1);
1051 PIN_IN(gpa2-3, DOWN, FAST_SR1 !! 911 PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
1052 PIN_IN(gpa2-4, NONE, FAST_SR1 !! 912 PIN(INPUT, gpa2-4, NONE, FAST_SR1);
1053 PIN_IN(gpa2-5, DOWN, FAST_SR1 !! 913 PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
1054 PIN_IN(gpa2-6, DOWN, FAST_SR1 !! 914 PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
1055 PIN_IN(gpa2-7, NONE, FAST_SR1 !! 915 PIN(INPUT, gpa2-7, NONE, FAST_SR1);
1056 !! 916
1057 PIN_IN(gpa3-0, DOWN, FAST_SR1 !! 917 PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
1058 PIN_IN(gpa3-1, DOWN, FAST_SR1 !! 918 PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
1059 PIN_IN(gpa3-2, NONE, FAST_SR1 !! 919 PIN(INPUT, gpa3-2, NONE, FAST_SR1);
1060 PIN_IN(gpa3-3, DOWN, FAST_SR1 !! 920 PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
1061 PIN_IN(gpa3-4, NONE, FAST_SR1 !! 921 PIN(INPUT, gpa3-4, NONE, FAST_SR1);
1062 PIN_IN(gpa3-5, DOWN, FAST_SR1 !! 922 PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
1063 PIN_IN(gpa3-6, DOWN, FAST_SR1 !! 923 PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
1064 PIN_IN(gpa3-7, DOWN, FAST_SR1 !! 924 PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
1065 !! 925
1066 PIN_IN(gpf1-0, NONE, FAST_SR1 !! 926 PIN(INPUT, gpf1-0, NONE, FAST_SR1);
1067 PIN_IN(gpf1-1, NONE, FAST_SR1 !! 927 PIN(INPUT, gpf1-1, NONE, FAST_SR1);
1068 PIN_IN(gpf1-2, DOWN, FAST_SR1 !! 928 PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
1069 PIN_IN(gpf1-4, UP, FAST_SR1); !! 929 PIN(INPUT, gpf1-4, UP, FAST_SR1);
1070 PIN_OT(gpf1-5, NONE, FAST_SR1 !! 930 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
1071 PIN_IN(gpf1-6, DOWN, FAST_SR1 !! 931 PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
1072 PIN_IN(gpf1-7, DOWN, FAST_SR1 !! 932 PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
1073 !! 933
1074 PIN_IN(gpf2-0, DOWN, FAST_SR1 !! 934 PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
1075 PIN_IN(gpf2-1, DOWN, FAST_SR1 !! 935 PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
1076 PIN_IN(gpf2-2, DOWN, FAST_SR1 !! 936 PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
1077 PIN_IN(gpf2-3, DOWN, FAST_SR1 !! 937 PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
1078 !! 938
1079 PIN_IN(gpf3-0, DOWN, FAST_SR1 !! 939 PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
1080 PIN_IN(gpf3-1, DOWN, FAST_SR1 !! 940 PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
1081 PIN_IN(gpf3-2, NONE, FAST_SR1 !! 941 PIN(INPUT, gpf3-2, NONE, FAST_SR1);
1082 PIN_IN(gpf3-3, DOWN, FAST_SR1 !! 942 PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
1083 !! 943
1084 PIN_IN(gpf4-0, DOWN, FAST_SR1 !! 944 PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
1085 PIN_IN(gpf4-1, DOWN, FAST_SR1 !! 945 PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
1086 PIN_IN(gpf4-2, DOWN, FAST_SR1 !! 946 PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
1087 PIN_IN(gpf4-3, DOWN, FAST_SR1 !! 947 PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
1088 PIN_IN(gpf4-4, DOWN, FAST_SR1 !! 948 PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
1089 PIN_IN(gpf4-5, DOWN, FAST_SR1 !! 949 PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
1090 PIN_IN(gpf4-6, DOWN, FAST_SR1 !! 950 PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
1091 PIN_IN(gpf4-7, DOWN, FAST_SR1 !! 951 PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
1092 !! 952
1093 PIN_IN(gpf5-0, DOWN, FAST_SR1 !! 953 PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
1094 PIN_IN(gpf5-1, DOWN, FAST_SR1 !! 954 PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
1095 PIN_IN(gpf5-2, DOWN, FAST_SR1 !! 955 PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
1096 PIN_IN(gpf5-3, DOWN, FAST_SR1 !! 956 PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
1097 PIN_OT(gpf5-4, NONE, FAST_SR1 !! 957 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
1098 PIN_IN(gpf5-5, DOWN, FAST_SR1 !! 958 PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
1099 PIN_IN(gpf5-6, DOWN, FAST_SR1 !! 959 PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
1100 PIN_IN(gpf5-7, DOWN, FAST_SR1 !! 960 PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
1101 }; 961 };
1102 962
1103 te_irq: te-irq-pins { !! 963 te_irq: te_irq {
1104 samsung,pins = "gpf1-3"; 964 samsung,pins = "gpf1-3";
1105 samsung,pin-function = <EXYNO !! 965 samsung,pin-function = <0xf>;
1106 }; 966 };
1107 }; 967 };
1108 968
1109 &pinctrl_cpif { 969 &pinctrl_cpif {
1110 pinctrl-names = "default"; 970 pinctrl-names = "default";
1111 pinctrl-0 = <&initial_cpif>; 971 pinctrl-0 = <&initial_cpif>;
1112 972
1113 initial_cpif: initial-state { 973 initial_cpif: initial-state {
1114 PIN_IN(gpv6-0, DOWN, FAST_SR1 !! 974 PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
1115 PIN_IN(gpv6-1, DOWN, FAST_SR1 !! 975 PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
1116 }; 976 };
1117 }; 977 };
1118 978
1119 &pinctrl_ese { 979 &pinctrl_ese {
1120 pinctrl-names = "default"; 980 pinctrl-names = "default";
1121 pinctrl-0 = <&initial_ese>; 981 pinctrl-0 = <&initial_ese>;
1122 982
1123 pcie_wlanen: pcie-wlanen-pins { <<
1124 samsung,pins = "gpj2-0"; <<
1125 samsung,pin-function = <EXYNO <<
1126 samsung,pin-pud = <EXYNOS_PIN <<
1127 samsung,pin-drv = <EXYNOS5433 <<
1128 }; <<
1129 <<
1130 initial_ese: initial-state { 983 initial_ese: initial-state {
1131 PIN_IN(gpj2-1, DOWN, FAST_SR1 !! 984 PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
1132 PIN_IN(gpj2-2, DOWN, FAST_SR1 !! 985 PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
>> 986 PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
1133 }; 987 };
1134 }; 988 };
1135 989
1136 &pinctrl_fsys { 990 &pinctrl_fsys {
1137 pinctrl-names = "default"; 991 pinctrl-names = "default";
1138 pinctrl-0 = <&initial_fsys>; 992 pinctrl-0 = <&initial_fsys>;
1139 993
1140 initial_fsys: initial-state { 994 initial_fsys: initial-state {
1141 PIN_IN(gpr3-0, NONE, FAST_SR1 !! 995 PIN(INPUT, gpr3-0, NONE, FAST_SR1);
1142 PIN_IN(gpr3-1, DOWN, FAST_SR1 !! 996 PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
1143 PIN_IN(gpr3-2, DOWN, FAST_SR1 !! 997 PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
1144 PIN_IN(gpr3-3, DOWN, FAST_SR1 !! 998 PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
1145 PIN_IN(gpr3-7, NONE, FAST_SR1 !! 999 PIN(INPUT, gpr3-7, NONE, FAST_SR1);
1146 }; 1000 };
1147 }; 1001 };
1148 1002
1149 &pinctrl_imem { 1003 &pinctrl_imem {
1150 pinctrl-names = "default"; 1004 pinctrl-names = "default";
1151 pinctrl-0 = <&initial_imem>; 1005 pinctrl-0 = <&initial_imem>;
1152 1006
1153 initial_imem: initial-state { 1007 initial_imem: initial-state {
1154 PIN_IN(gpf0-0, UP, FAST_SR1); !! 1008 PIN(INPUT, gpf0-0, UP, FAST_SR1);
1155 PIN_IN(gpf0-1, UP, FAST_SR1); !! 1009 PIN(INPUT, gpf0-1, UP, FAST_SR1);
1156 PIN_IN(gpf0-2, DOWN, FAST_SR1 !! 1010 PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1157 PIN_IN(gpf0-3, UP, FAST_SR1); !! 1011 PIN(INPUT, gpf0-3, UP, FAST_SR1);
1158 PIN_IN(gpf0-4, DOWN, FAST_SR1 !! 1012 PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1159 PIN_IN(gpf0-5, NONE, FAST_SR1 !! 1013 PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1160 PIN_IN(gpf0-6, DOWN, FAST_SR1 !! 1014 PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1161 PIN_IN(gpf0-7, UP, FAST_SR1); !! 1015 PIN(INPUT, gpf0-7, UP, FAST_SR1);
1162 }; 1016 };
1163 }; 1017 };
1164 1018
1165 &pinctrl_nfc { 1019 &pinctrl_nfc {
1166 pinctrl-names = "default"; 1020 pinctrl-names = "default";
1167 pinctrl-0 = <&initial_nfc>; 1021 pinctrl-0 = <&initial_nfc>;
1168 1022
1169 initial_nfc: initial-state { 1023 initial_nfc: initial-state {
1170 PIN_IN(gpj0-2, DOWN, FAST_SR1 !! 1024 PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1171 }; 1025 };
1172 }; 1026 };
1173 1027
1174 &pinctrl_peric { 1028 &pinctrl_peric {
1175 pinctrl-names = "default"; 1029 pinctrl-names = "default";
1176 pinctrl-0 = <&initial_peric>; 1030 pinctrl-0 = <&initial_peric>;
1177 1031
1178 initial_peric: initial-state { 1032 initial_peric: initial-state {
1179 PIN_IN(gpv7-0, DOWN, FAST_SR1 !! 1033 PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1180 PIN_IN(gpv7-1, DOWN, FAST_SR1 !! 1034 PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1181 PIN_IN(gpv7-2, NONE, FAST_SR1 !! 1035 PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1182 PIN_IN(gpv7-3, DOWN, FAST_SR1 !! 1036 PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1183 PIN_IN(gpv7-4, DOWN, FAST_SR1 !! 1037 PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1184 PIN_IN(gpv7-5, DOWN, FAST_SR1 !! 1038 PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1185 1039
1186 PIN_IN(gpb0-4, DOWN, FAST_SR1 !! 1040 PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1187 1041
1188 PIN_IN(gpc0-2, DOWN, FAST_SR1 !! 1042 PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1189 PIN_IN(gpc0-5, DOWN, FAST_SR1 !! 1043 PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1190 PIN_IN(gpc0-7, DOWN, FAST_SR1 !! 1044 PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1191 1045
1192 PIN_IN(gpc1-1, DOWN, FAST_SR1 !! 1046 PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1193 1047
1194 PIN_IN(gpc3-4, NONE, FAST_SR1 !! 1048 PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1195 PIN_IN(gpc3-5, NONE, FAST_SR1 !! 1049 PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1196 PIN_IN(gpc3-6, NONE, FAST_SR1 !! 1050 PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1197 PIN_IN(gpc3-7, NONE, FAST_SR1 !! 1051 PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1198 1052
1199 PIN_OT(gpg0-0, NONE, FAST_SR1 !! 1053 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1200 PIN_F2(gpg0-1, DOWN, FAST_SR1 !! 1054 PIN(2, gpg0-1, DOWN, FAST_SR1);
1201 1055
1202 PIN_IN(gpd2-5, DOWN, FAST_SR1 !! 1056 PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1203 1057
1204 PIN_IN(gpd4-0, NONE, FAST_SR1 !! 1058 PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1205 PIN_IN(gpd4-1, DOWN, FAST_SR1 !! 1059 PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1206 PIN_IN(gpd4-2, DOWN, FAST_SR1 !! 1060 PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1207 PIN_IN(gpd4-3, DOWN, FAST_SR1 !! 1061 PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1208 PIN_IN(gpd4-4, DOWN, FAST_SR1 !! 1062 PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1209 1063
1210 PIN_IN(gpd6-3, DOWN, FAST_SR1 !! 1064 PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1211 1065
1212 PIN_IN(gpd8-1, UP, FAST_SR1); !! 1066 PIN(INPUT, gpd8-1, UP, FAST_SR1);
1213 1067
1214 PIN_IN(gpg1-0, DOWN, FAST_SR1 !! 1068 PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1215 PIN_IN(gpg1-1, DOWN, FAST_SR1 !! 1069 PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1216 PIN_IN(gpg1-2, DOWN, FAST_SR1 !! 1070 PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1217 PIN_IN(gpg1-3, DOWN, FAST_SR1 !! 1071 PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1218 PIN_IN(gpg1-4, DOWN, FAST_SR1 !! 1072 PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1219 1073
1220 PIN_IN(gpg2-0, DOWN, FAST_SR1 !! 1074 PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1221 PIN_IN(gpg2-1, DOWN, FAST_SR1 !! 1075 PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1222 1076
1223 PIN_IN(gpg3-0, DOWN, FAST_SR1 !! 1077 PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1224 PIN_IN(gpg3-1, DOWN, FAST_SR1 !! 1078 PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1225 PIN_IN(gpg3-5, DOWN, FAST_SR1 !! 1079 PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1226 }; 1080 };
1227 }; 1081 };
1228 1082
1229 &pinctrl_touch { 1083 &pinctrl_touch {
1230 pinctrl-names = "default"; 1084 pinctrl-names = "default";
1231 pinctrl-0 = <&initial_touch>; 1085 pinctrl-0 = <&initial_touch>;
1232 1086
1233 initial_touch: initial-state { 1087 initial_touch: initial-state {
1234 PIN_IN(gpj1-2, DOWN, FAST_SR1 !! 1088 PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1235 }; 1089 };
1236 }; 1090 };
1237 1091
1238 &pwm { 1092 &pwm {
1239 pinctrl-0 = <&pwm0_out>; 1093 pinctrl-0 = <&pwm0_out>;
1240 pinctrl-names = "default"; 1094 pinctrl-names = "default";
1241 status = "okay"; 1095 status = "okay";
1242 }; 1096 };
1243 1097
1244 &mic { 1098 &mic {
1245 status = "okay"; 1099 status = "okay";
1246 }; 1100 };
1247 1101
1248 &pmu_system_controller { 1102 &pmu_system_controller {
1249 assigned-clocks = <&pmu_system_contro 1103 assigned-clocks = <&pmu_system_controller 0>;
1250 assigned-clock-parents = <&xxti>; 1104 assigned-clock-parents = <&xxti>;
1251 }; 1105 };
1252 1106
1253 &serial_1 { 1107 &serial_1 {
1254 status = "okay"; 1108 status = "okay";
1255 }; 1109 };
1256 1110
1257 &serial_3 { <<
1258 status = "okay"; <<
1259 <<
1260 bluetooth { <<
1261 compatible = "brcm,bcm43438-b <<
1262 max-speed = <3000000>; <<
1263 shutdown-gpios = <&gpd4 0 GPI <<
1264 device-wakeup-gpios = <&gpr3 <<
1265 host-wakeup-gpios = <&gpa2 2 <<
1266 clocks = <&s2mps13_osc S2MPS1 <<
1267 clock-names = "extclk"; <<
1268 }; <<
1269 }; <<
1270 <<
1271 &spi_1 { 1111 &spi_1 {
1272 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH> 1112 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1273 status = "okay"; 1113 status = "okay";
1274 1114
1275 wm5110: audio-codec@0 { !! 1115 wm5110: wm5110-codec@0 {
1276 compatible = "wlf,wm5110"; 1116 compatible = "wlf,wm5110";
1277 reg = <0x0>; 1117 reg = <0x0>;
1278 spi-max-frequency = <20000000 1118 spi-max-frequency = <20000000>;
1279 interrupt-parent = <&gpa0>; 1119 interrupt-parent = <&gpa0>;
1280 interrupts = <4 IRQ_TYPE_NONE 1120 interrupts = <4 IRQ_TYPE_NONE>;
1281 clocks = <&pmu_system_control 1121 clocks = <&pmu_system_controller 0>,
1282 <&s2mps13_osc S2MPS11 1122 <&s2mps13_osc S2MPS11_CLK_BT>;
1283 clock-names = "mclk1", "mclk2 1123 clock-names = "mclk1", "mclk2";
1284 1124
1285 gpio-controller; 1125 gpio-controller;
1286 #gpio-cells = <2>; 1126 #gpio-cells = <2>;
1287 interrupt-controller; <<
1288 #interrupt-cells = <2>; <<
1289 1127
1290 wlf,micd-detect-debounce = <3 1128 wlf,micd-detect-debounce = <300>;
1291 wlf,micd-bias-start-time = <0 1129 wlf,micd-bias-start-time = <0x1>;
1292 wlf,micd-rate = <0x7>; 1130 wlf,micd-rate = <0x7>;
1293 wlf,micd-dbtime = <0x2>; !! 1131 wlf,micd-dbtime = <0x1>;
1294 wlf,micd-force-micbias; 1132 wlf,micd-force-micbias;
1295 wlf,micd-configs = <0x0 1 0>; 1133 wlf,micd-configs = <0x0 1 0>;
1296 wlf,hpdet-channel = <1>; 1134 wlf,hpdet-channel = <1>;
1297 wlf,gpsw = <0x1>; 1135 wlf,gpsw = <0x1>;
1298 wlf,inmode = <2 0 2 0>; 1136 wlf,inmode = <2 0 2 0>;
1299 1137
1300 wlf,reset = <&gpc0 7 GPIO_ACT 1138 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1301 wlf,ldoena = <&gpf0 0 GPIO_AC 1139 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1302 1140
1303 /* core supplies */ 1141 /* core supplies */
1304 AVDD-supply = <&ldo18_reg>; 1142 AVDD-supply = <&ldo18_reg>;
1305 DBVDD1-supply = <&ldo18_reg>; 1143 DBVDD1-supply = <&ldo18_reg>;
1306 CPVDD-supply = <&ldo18_reg>; 1144 CPVDD-supply = <&ldo18_reg>;
1307 DBVDD2-supply = <&ldo18_reg>; 1145 DBVDD2-supply = <&ldo18_reg>;
1308 DBVDD3-supply = <&ldo18_reg>; 1146 DBVDD3-supply = <&ldo18_reg>;
1309 SPKVDDL-supply = <&vph_pwr_re <<
1310 SPKVDDR-supply = <&vph_pwr_re <<
1311 1147
1312 controller-data { 1148 controller-data {
1313 samsung,spi-feedback- 1149 samsung,spi-feedback-delay = <0>;
1314 }; 1150 };
1315 }; 1151 };
1316 }; 1152 };
1317 1153
1318 &spi_3 { 1154 &spi_3 {
1319 status = "okay"; 1155 status = "okay";
1320 no-cs-readback; 1156 no-cs-readback;
1321 1157
1322 irled@0 { 1158 irled@0 {
1323 compatible = "ir-spi-led"; 1159 compatible = "ir-spi-led";
1324 reg = <0x0>; 1160 reg = <0x0>;
1325 spi-max-frequency = <5000000> 1161 spi-max-frequency = <5000000>;
1326 power-supply = <&irda_regulat 1162 power-supply = <&irda_regulator>;
1327 duty-cycle = /bits/ 8 <60>; !! 1163 duty-cycle = <60>;
1328 led-active-low; 1164 led-active-low;
1329 1165
1330 controller-data { 1166 controller-data {
1331 samsung,spi-feedback- 1167 samsung,spi-feedback-delay = <0>;
1332 }; 1168 };
1333 }; 1169 };
1334 }; 1170 };
1335 1171
1336 &timer { 1172 &timer {
1337 clock-frequency = <24000000>; 1173 clock-frequency = <24000000>;
1338 }; 1174 };
1339 1175
1340 &tmu_atlas0 { 1176 &tmu_atlas0 {
1341 vtmu-supply = <&ldo3_reg>; 1177 vtmu-supply = <&ldo3_reg>;
1342 status = "okay"; 1178 status = "okay";
1343 }; 1179 };
1344 1180
1345 &tmu_apollo { 1181 &tmu_apollo {
1346 vtmu-supply = <&ldo3_reg>; 1182 vtmu-supply = <&ldo3_reg>;
1347 status = "okay"; 1183 status = "okay";
1348 }; 1184 };
1349 1185
1350 &tmu_g3d { 1186 &tmu_g3d {
1351 vtmu-supply = <&ldo3_reg>; 1187 vtmu-supply = <&ldo3_reg>;
1352 status = "okay"; 1188 status = "okay";
1353 }; 1189 };
1354 1190
1355 &usbdrd30 { 1191 &usbdrd30 {
1356 vdd33-supply = <&ldo10_reg>; 1192 vdd33-supply = <&ldo10_reg>;
1357 vdd10-supply = <&ldo6_reg>; 1193 vdd10-supply = <&ldo6_reg>;
1358 status = "okay"; 1194 status = "okay";
1359 }; 1195 };
1360 1196
1361 &usbdrd_dwc3 { 1197 &usbdrd_dwc3 {
1362 dr_mode = "otg"; 1198 dr_mode = "otg";
>> 1199 extcon = <&muic>;
1363 }; 1200 };
1364 1201
1365 &usbdrd30_phy { 1202 &usbdrd30_phy {
1366 vbus-supply = <&safeout1_reg>; 1203 vbus-supply = <&safeout1_reg>;
1367 status = "okay"; 1204 status = "okay";
1368 <<
1369 port { <<
1370 usb_to_muic: endpoint { <<
1371 remote-endpoint = <&m <<
1372 }; <<
1373 }; <<
1374 }; 1205 };
1375 1206
1376 &xxti { 1207 &xxti {
1377 clock-frequency = <24000000>; 1208 clock-frequency = <24000000>;
1378 }; 1209 };
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