1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Device Tree file for NXP LS1028A RDB Board.
4 *
5 * Copyright 2018-2021 NXP
6 *
7 * Harninder Rai <harninder.rai@nxp.com>
8 *
9 */
10
11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi"
13
14 / {
15 model = "LS1028A RDB Board";
16 compatible = "fsl,ls1028a-rdb", "fsl,l
17
18 aliases {
19 crypto = &crypto;
20 serial0 = &duart0;
21 serial1 = &duart1;
22 mmc0 = &esdhc;
23 mmc1 = &esdhc1;
24 rtc1 = &ftm_alarm1;
25 spi0 = &fspi;
26 ethernet0 = &enetc_port0;
27 ethernet1 = &enetc_port2;
28 ethernet2 = &mscc_felix_port0;
29 ethernet3 = &mscc_felix_port1;
30 ethernet4 = &mscc_felix_port2;
31 ethernet5 = &mscc_felix_port3;
32 ethernet6 = &mscc_felix_port4;
33 ethernet7 = &mscc_felix_port5;
34 ethernet8 = &enetc_port3;
35 };
36
37 chosen {
38 stdout-path = "serial0:115200n
39 };
40
41 memory@80000000 {
42 device_type = "memory";
43 reg = <0x0 0x80000000 0x1 0x00
44 };
45
46 sys_mclk: clock-mclk {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <25000000>;
50 };
51
52 reg_1p8v: regulator-1p8v {
53 compatible = "regulator-fixed"
54 regulator-name = "1P8V";
55 regulator-min-microvolt = <180
56 regulator-max-microvolt = <180
57 regulator-always-on;
58 };
59
60 sb_3v3: regulator-sb3v3 {
61 compatible = "regulator-fixed"
62 regulator-name = "3v3_vbus";
63 regulator-min-microvolt = <330
64 regulator-max-microvolt = <330
65 regulator-boot-on;
66 regulator-always-on;
67 };
68
69 sound {
70 compatible = "simple-audio-car
71 simple-audio-card,format = "i2
72 simple-audio-card,widgets =
73 "Microphone", "Microph
74 "Headphone", "Headphon
75 "Speaker", "Speaker Ex
76 "Line", "Line In Jack"
77 simple-audio-card,routing =
78 "MIC_IN", "Microphone
79 "Microphone Jack", "Mi
80 "LINE_IN", "Line In Ja
81 "Headphone Jack", "HP_
82 "Speaker Ext", "LINE_O
83
84 simple-audio-card,cpu {
85 sound-dai = <&sai4>;
86 frame-master;
87 bitclock-master;
88 };
89
90 simple-audio-card,codec {
91 sound-dai = <&sgtl5000
92 frame-master;
93 bitclock-master;
94 system-clock-frequency
95 };
96 };
97 };
98
99 &can0 {
100 status = "okay";
101
102 can-transceiver {
103 max-bitrate = <5000000>;
104 };
105 };
106
107 &can1 {
108 status = "okay";
109
110 can-transceiver {
111 max-bitrate = <5000000>;
112 };
113 };
114
115 &duart0 {
116 status = "okay";
117 };
118
119 &duart1 {
120 status = "okay";
121 };
122
123 &enetc_mdio_pf3 {
124 sgmii_phy0: ethernet-phy@2 {
125 reg = <0x2>;
126 };
127
128 /* VSC8514 QSGMII quad PHY */
129 qsgmii_phy0: ethernet-phy@10 {
130 reg = <0x10>;
131 };
132
133 qsgmii_phy1: ethernet-phy@11 {
134 reg = <0x11>;
135 };
136
137 qsgmii_phy2: ethernet-phy@12 {
138 reg = <0x12>;
139 };
140
141 qsgmii_phy3: ethernet-phy@13 {
142 reg = <0x13>;
143 };
144 };
145
146 &enetc_port0 {
147 phy-handle = <&sgmii_phy0>;
148 phy-mode = "sgmii";
149 managed = "in-band-status";
150 status = "okay";
151 };
152
153 &enetc_port2 {
154 status = "okay";
155 };
156
157 &enetc_port3 {
158 status = "okay";
159 };
160
161 &esdhc {
162 sd-uhs-sdr104;
163 sd-uhs-sdr50;
164 sd-uhs-sdr25;
165 sd-uhs-sdr12;
166 status = "okay";
167 };
168
169 &esdhc1 {
170 mmc-hs200-1_8v;
171 mmc-hs400-1_8v;
172 bus-width = <8>;
173 status = "okay";
174 };
175
176 &fspi {
177 status = "okay";
178
179 mt35xu02g0: flash@0 {
180 compatible = "jedec,spi-nor";
181 #address-cells = <1>;
182 #size-cells = <1>;
183 spi-max-frequency = <50000000>
184 /* The following setting enabl
185 spi-rx-bus-width = <8>; /* 8 S
186 spi-tx-bus-width = <1>; /* 1 S
187 reg = <0>;
188 };
189 };
190
191 &ftm_alarm1 {
192 status = "okay";
193 };
194
195 &i2c0 {
196 status = "okay";
197
198 i2c-mux@77 {
199 compatible = "nxp,pca9847";
200 reg = <0x77>;
201 #address-cells = <1>;
202 #size-cells = <0>;
203
204 i2c@0 {
205 #address-cells = <1>;
206 #size-cells = <0>;
207 reg = <0x0>;
208
209 /* Atmel AT24C512C-XHD
210 eeprom@50 {
211 compatible = "
212 reg = <0x50>;
213 #address-cells
214 #size-cells =
215 };
216
217 /* AT24C04C 512-byte D
218 /* Documentation says
219 eeprom@52 {
220 compatible = "
221 reg = <0x52>;
222 #address-cells
223 #size-cells =
224 };
225
226 /* Atmel AT24C02C-XHMÂ
227 eeprom@57 {
228 compatible = "
229 reg = <0x57>;
230 #address-cells
231 #size-cells =
232 };
233 };
234
235 i2c@1 {
236 #address-cells = <1>;
237 #size-cells = <0>;
238 reg = <0x1>;
239
240 sgtl5000: audio-codec@
241 #sound-dai-cel
242 compatible = "
243 reg = <0xa>;
244 VDDA-supply =
245 VDDIO-supply =
246 clocks = <&sys
247 sclk-strength
248 };
249 };
250
251 i2c@2 {
252 #address-cells = <1>;
253 #size-cells = <0>;
254 reg = <0x02>;
255
256 current-monitor@40 {
257 compatible = "
258 reg = <0x40>;
259 shunt-resistor
260 };
261 };
262
263 i2c@3 {
264 #address-cells = <1>;
265 #size-cells = <0>;
266 reg = <0x3>;
267
268 temperature-sensor@4c
269 compatible = "
270 reg = <0x4c>;
271 vcc-supply = <
272 };
273
274 rtc@51 {
275 compatible = "
276 reg = <0x51>;
277 };
278 };
279 };
280 };
281
282 &mscc_felix {
283 status = "okay";
284 };
285
286 &mscc_felix_port0 {
287 label = "swp0";
288 managed = "in-band-status";
289 phy-handle = <&qsgmii_phy0>;
290 phy-mode = "qsgmii";
291 status = "okay";
292 };
293
294 &mscc_felix_port1 {
295 label = "swp1";
296 managed = "in-band-status";
297 phy-handle = <&qsgmii_phy1>;
298 phy-mode = "qsgmii";
299 status = "okay";
300 };
301
302 &mscc_felix_port2 {
303 label = "swp2";
304 managed = "in-band-status";
305 phy-handle = <&qsgmii_phy2>;
306 phy-mode = "qsgmii";
307 status = "okay";
308 };
309
310 &mscc_felix_port3 {
311 label = "swp3";
312 managed = "in-band-status";
313 phy-handle = <&qsgmii_phy3>;
314 phy-mode = "qsgmii";
315 status = "okay";
316 };
317
318 &mscc_felix_port4 {
319 status = "okay";
320 };
321
322 &mscc_felix_port5 {
323 status = "okay";
324 };
325
326 &optee {
327 status = "okay";
328 };
329
330 &pwm0 {
331 status = "okay";
332 };
333
334 &sai4 {
335 status = "okay";
336 };
337
338 &sata {
339 status = "okay";
340 };
341
342 &usb0 {
343 dr_mode = "host";
344 status = "okay";
345 };
346
347 &usb1 {
348 status = "okay";
349 };
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