1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Device Tree file for NXP LS1028A RDB Board. 3 * Device Tree file for NXP LS1028A RDB Board.
4 * 4 *
5 * Copyright 2018-2021 NXP !! 5 * Copyright 2018 NXP
6 * 6 *
7 * Harninder Rai <harninder.rai@nxp.com> 7 * Harninder Rai <harninder.rai@nxp.com>
8 * 8 *
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi" 12 #include "fsl-ls1028a.dtsi"
13 13
14 / { 14 / {
15 model = "LS1028A RDB Board"; 15 model = "LS1028A RDB Board";
16 compatible = "fsl,ls1028a-rdb", "fsl,l 16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
17 17
18 aliases { 18 aliases {
19 crypto = &crypto; 19 crypto = &crypto;
20 serial0 = &duart0; 20 serial0 = &duart0;
21 serial1 = &duart1; 21 serial1 = &duart1;
22 mmc0 = &esdhc; 22 mmc0 = &esdhc;
23 mmc1 = &esdhc1; 23 mmc1 = &esdhc1;
24 rtc1 = &ftm_alarm1; !! 24 rtc1 = &ftm_alarm0;
25 spi0 = &fspi; <<
26 ethernet0 = &enetc_port0; <<
27 ethernet1 = &enetc_port2; <<
28 ethernet2 = &mscc_felix_port0; <<
29 ethernet3 = &mscc_felix_port1; <<
30 ethernet4 = &mscc_felix_port2; <<
31 ethernet5 = &mscc_felix_port3; <<
32 ethernet6 = &mscc_felix_port4; <<
33 ethernet7 = &mscc_felix_port5; <<
34 ethernet8 = &enetc_port3; <<
35 }; 25 };
36 26
37 chosen { 27 chosen {
38 stdout-path = "serial0:115200n 28 stdout-path = "serial0:115200n8";
39 }; 29 };
40 30
41 memory@80000000 { 31 memory@80000000 {
42 device_type = "memory"; 32 device_type = "memory";
43 reg = <0x0 0x80000000 0x1 0x00 33 reg = <0x0 0x80000000 0x1 0x0000000>;
44 }; 34 };
45 35
46 sys_mclk: clock-mclk { 36 sys_mclk: clock-mclk {
47 compatible = "fixed-clock"; 37 compatible = "fixed-clock";
48 #clock-cells = <0>; 38 #clock-cells = <0>;
49 clock-frequency = <25000000>; 39 clock-frequency = <25000000>;
50 }; 40 };
51 41
52 reg_1p8v: regulator-1p8v { 42 reg_1p8v: regulator-1p8v {
53 compatible = "regulator-fixed" 43 compatible = "regulator-fixed";
54 regulator-name = "1P8V"; 44 regulator-name = "1P8V";
55 regulator-min-microvolt = <180 45 regulator-min-microvolt = <1800000>;
56 regulator-max-microvolt = <180 46 regulator-max-microvolt = <1800000>;
57 regulator-always-on; 47 regulator-always-on;
58 }; 48 };
59 49
60 sb_3v3: regulator-sb3v3 { 50 sb_3v3: regulator-sb3v3 {
61 compatible = "regulator-fixed" 51 compatible = "regulator-fixed";
62 regulator-name = "3v3_vbus"; 52 regulator-name = "3v3_vbus";
63 regulator-min-microvolt = <330 53 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <330 54 regulator-max-microvolt = <3300000>;
65 regulator-boot-on; 55 regulator-boot-on;
66 regulator-always-on; 56 regulator-always-on;
67 }; 57 };
68 58
69 sound { 59 sound {
70 compatible = "simple-audio-car 60 compatible = "simple-audio-card";
71 simple-audio-card,format = "i2 61 simple-audio-card,format = "i2s";
72 simple-audio-card,widgets = 62 simple-audio-card,widgets =
73 "Microphone", "Microph 63 "Microphone", "Microphone Jack",
74 "Headphone", "Headphon 64 "Headphone", "Headphone Jack",
75 "Speaker", "Speaker Ex 65 "Speaker", "Speaker Ext",
76 "Line", "Line In Jack" 66 "Line", "Line In Jack";
77 simple-audio-card,routing = 67 simple-audio-card,routing =
78 "MIC_IN", "Microphone 68 "MIC_IN", "Microphone Jack",
79 "Microphone Jack", "Mi 69 "Microphone Jack", "Mic Bias",
80 "LINE_IN", "Line In Ja 70 "LINE_IN", "Line In Jack",
81 "Headphone Jack", "HP_ 71 "Headphone Jack", "HP_OUT",
82 "Speaker Ext", "LINE_O 72 "Speaker Ext", "LINE_OUT";
83 73
84 simple-audio-card,cpu { 74 simple-audio-card,cpu {
85 sound-dai = <&sai4>; 75 sound-dai = <&sai4>;
86 frame-master; 76 frame-master;
87 bitclock-master; 77 bitclock-master;
88 }; 78 };
89 79
90 simple-audio-card,codec { 80 simple-audio-card,codec {
91 sound-dai = <&sgtl5000 81 sound-dai = <&sgtl5000>;
92 frame-master; 82 frame-master;
93 bitclock-master; 83 bitclock-master;
94 system-clock-frequency 84 system-clock-frequency = <25000000>;
95 }; 85 };
96 }; 86 };
97 }; 87 };
98 88
99 &can0 { 89 &can0 {
100 status = "okay"; 90 status = "okay";
101 91
102 can-transceiver { 92 can-transceiver {
103 max-bitrate = <5000000>; 93 max-bitrate = <5000000>;
104 }; 94 };
105 }; 95 };
106 96
107 &can1 { 97 &can1 {
108 status = "okay"; 98 status = "okay";
109 99
110 can-transceiver { 100 can-transceiver {
111 max-bitrate = <5000000>; 101 max-bitrate = <5000000>;
112 }; 102 };
113 }; 103 };
114 104
115 &duart0 { <<
116 status = "okay"; <<
117 }; <<
118 <<
119 &duart1 { <<
120 status = "okay"; <<
121 }; <<
122 <<
123 &enetc_mdio_pf3 { <<
124 sgmii_phy0: ethernet-phy@2 { <<
125 reg = <0x2>; <<
126 }; <<
127 <<
128 /* VSC8514 QSGMII quad PHY */ <<
129 qsgmii_phy0: ethernet-phy@10 { <<
130 reg = <0x10>; <<
131 }; <<
132 <<
133 qsgmii_phy1: ethernet-phy@11 { <<
134 reg = <0x11>; <<
135 }; <<
136 <<
137 qsgmii_phy2: ethernet-phy@12 { <<
138 reg = <0x12>; <<
139 }; <<
140 <<
141 qsgmii_phy3: ethernet-phy@13 { <<
142 reg = <0x13>; <<
143 }; <<
144 }; <<
145 <<
146 &enetc_port0 { <<
147 phy-handle = <&sgmii_phy0>; <<
148 phy-mode = "sgmii"; <<
149 managed = "in-band-status"; <<
150 status = "okay"; <<
151 }; <<
152 <<
153 &enetc_port2 { <<
154 status = "okay"; <<
155 }; <<
156 <<
157 &enetc_port3 { <<
158 status = "okay"; <<
159 }; <<
160 <<
161 &esdhc { 105 &esdhc {
162 sd-uhs-sdr104; 106 sd-uhs-sdr104;
163 sd-uhs-sdr50; 107 sd-uhs-sdr50;
164 sd-uhs-sdr25; 108 sd-uhs-sdr25;
165 sd-uhs-sdr12; 109 sd-uhs-sdr12;
166 status = "okay"; 110 status = "okay";
167 }; 111 };
168 112
169 &esdhc1 { 113 &esdhc1 {
170 mmc-hs200-1_8v; 114 mmc-hs200-1_8v;
171 mmc-hs400-1_8v; 115 mmc-hs400-1_8v;
172 bus-width = <8>; 116 bus-width = <8>;
173 status = "okay"; 117 status = "okay";
174 }; 118 };
175 119
176 &fspi { 120 &fspi {
177 status = "okay"; 121 status = "okay";
178 122
179 mt35xu02g0: flash@0 { 123 mt35xu02g0: flash@0 {
180 compatible = "jedec,spi-nor"; 124 compatible = "jedec,spi-nor";
181 #address-cells = <1>; 125 #address-cells = <1>;
182 #size-cells = <1>; 126 #size-cells = <1>;
183 spi-max-frequency = <50000000> 127 spi-max-frequency = <50000000>;
184 /* The following setting enabl 128 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
185 spi-rx-bus-width = <8>; /* 8 S 129 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
186 spi-tx-bus-width = <1>; /* 1 S 130 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
187 reg = <0>; 131 reg = <0>;
188 }; 132 };
189 }; 133 };
190 134
191 &ftm_alarm1 { <<
192 status = "okay"; <<
193 }; <<
194 <<
195 &i2c0 { 135 &i2c0 {
196 status = "okay"; 136 status = "okay";
197 137
198 i2c-mux@77 { 138 i2c-mux@77 {
199 compatible = "nxp,pca9847"; 139 compatible = "nxp,pca9847";
200 reg = <0x77>; 140 reg = <0x77>;
201 #address-cells = <1>; 141 #address-cells = <1>;
202 #size-cells = <0>; 142 #size-cells = <0>;
203 143
204 i2c@0 { <<
205 #address-cells = <1>; <<
206 #size-cells = <0>; <<
207 reg = <0x0>; <<
208 <<
209 /* Atmel AT24C512C-XHD <<
210 eeprom@50 { <<
211 compatible = " <<
212 reg = <0x50>; <<
213 #address-cells <<
214 #size-cells = <<
215 }; <<
216 <<
217 /* AT24C04C 512-byte D <<
218 /* Documentation says <<
219 eeprom@52 { <<
220 compatible = " <<
221 reg = <0x52>; <<
222 #address-cells <<
223 #size-cells = <<
224 }; <<
225 <<
226 /* Atmel AT24C02C-XHMÂ <<
227 eeprom@57 { <<
228 compatible = " <<
229 reg = <0x57>; <<
230 #address-cells <<
231 #size-cells = <<
232 }; <<
233 }; <<
234 <<
235 i2c@1 { 144 i2c@1 {
236 #address-cells = <1>; 145 #address-cells = <1>;
237 #size-cells = <0>; 146 #size-cells = <0>;
238 reg = <0x1>; 147 reg = <0x1>;
239 148
240 sgtl5000: audio-codec@ 149 sgtl5000: audio-codec@a {
241 #sound-dai-cel 150 #sound-dai-cells = <0>;
242 compatible = " 151 compatible = "fsl,sgtl5000";
243 reg = <0xa>; 152 reg = <0xa>;
244 VDDA-supply = 153 VDDA-supply = <®_1p8v>;
245 VDDIO-supply = 154 VDDIO-supply = <®_1p8v>;
246 clocks = <&sys 155 clocks = <&sys_mclk>;
247 sclk-strength 156 sclk-strength = <3>;
248 }; 157 };
249 }; 158 };
250 159
251 i2c@2 { 160 i2c@2 {
252 #address-cells = <1>; 161 #address-cells = <1>;
253 #size-cells = <0>; 162 #size-cells = <0>;
254 reg = <0x02>; 163 reg = <0x02>;
255 164
256 current-monitor@40 { 165 current-monitor@40 {
257 compatible = " 166 compatible = "ti,ina220";
258 reg = <0x40>; 167 reg = <0x40>;
259 shunt-resistor 168 shunt-resistor = <500>;
260 }; 169 };
261 }; 170 };
262 171
263 i2c@3 { 172 i2c@3 {
264 #address-cells = <1>; 173 #address-cells = <1>;
265 #size-cells = <0>; 174 #size-cells = <0>;
266 reg = <0x3>; 175 reg = <0x3>;
267 176
268 temperature-sensor@4c 177 temperature-sensor@4c {
269 compatible = " 178 compatible = "nxp,sa56004";
270 reg = <0x4c>; 179 reg = <0x4c>;
271 vcc-supply = < 180 vcc-supply = <&sb_3v3>;
272 }; 181 };
273 182
274 rtc@51 { 183 rtc@51 {
275 compatible = " 184 compatible = "nxp,pcf2129";
276 reg = <0x51>; 185 reg = <0x51>;
277 }; 186 };
278 }; 187 };
279 }; 188 };
280 }; 189 };
281 190
>> 191 &duart0 {
>> 192 status = "okay";
>> 193 };
>> 194
>> 195 &duart1 {
>> 196 status = "okay";
>> 197 };
>> 198
>> 199 &enetc_mdio_pf3 {
>> 200 /* VSC8514 QSGMII quad PHY */
>> 201 qsgmii_phy0: ethernet-phy@10 {
>> 202 reg = <0x10>;
>> 203 };
>> 204
>> 205 qsgmii_phy1: ethernet-phy@11 {
>> 206 reg = <0x11>;
>> 207 };
>> 208
>> 209 qsgmii_phy2: ethernet-phy@12 {
>> 210 reg = <0x12>;
>> 211 };
>> 212
>> 213 qsgmii_phy3: ethernet-phy@13 {
>> 214 reg = <0x13>;
>> 215 };
>> 216 };
>> 217
>> 218 &enetc_port0 {
>> 219 phy-handle = <&sgmii_phy0>;
>> 220 phy-connection-type = "sgmii";
>> 221 managed = "in-band-status";
>> 222 status = "okay";
>> 223
>> 224 mdio {
>> 225 #address-cells = <1>;
>> 226 #size-cells = <0>;
>> 227 sgmii_phy0: ethernet-phy@2 {
>> 228 reg = <0x2>;
>> 229 };
>> 230 };
>> 231 };
>> 232
>> 233 &enetc_port2 {
>> 234 status = "okay";
>> 235 };
>> 236
282 &mscc_felix { 237 &mscc_felix {
283 status = "okay"; 238 status = "okay";
284 }; 239 };
285 240
286 &mscc_felix_port0 { 241 &mscc_felix_port0 {
287 label = "swp0"; 242 label = "swp0";
288 managed = "in-band-status"; 243 managed = "in-band-status";
289 phy-handle = <&qsgmii_phy0>; 244 phy-handle = <&qsgmii_phy0>;
290 phy-mode = "qsgmii"; 245 phy-mode = "qsgmii";
291 status = "okay"; 246 status = "okay";
292 }; 247 };
293 248
294 &mscc_felix_port1 { 249 &mscc_felix_port1 {
295 label = "swp1"; 250 label = "swp1";
296 managed = "in-band-status"; 251 managed = "in-band-status";
297 phy-handle = <&qsgmii_phy1>; 252 phy-handle = <&qsgmii_phy1>;
298 phy-mode = "qsgmii"; 253 phy-mode = "qsgmii";
299 status = "okay"; 254 status = "okay";
300 }; 255 };
301 256
302 &mscc_felix_port2 { 257 &mscc_felix_port2 {
303 label = "swp2"; 258 label = "swp2";
304 managed = "in-band-status"; 259 managed = "in-band-status";
305 phy-handle = <&qsgmii_phy2>; 260 phy-handle = <&qsgmii_phy2>;
306 phy-mode = "qsgmii"; 261 phy-mode = "qsgmii";
307 status = "okay"; 262 status = "okay";
308 }; 263 };
309 264
310 &mscc_felix_port3 { 265 &mscc_felix_port3 {
311 label = "swp3"; 266 label = "swp3";
312 managed = "in-band-status"; 267 managed = "in-band-status";
313 phy-handle = <&qsgmii_phy3>; 268 phy-handle = <&qsgmii_phy3>;
314 phy-mode = "qsgmii"; 269 phy-mode = "qsgmii";
315 status = "okay"; 270 status = "okay";
316 }; 271 };
317 272
318 &mscc_felix_port4 { 273 &mscc_felix_port4 {
319 status = "okay"; !! 274 ethernet = <&enetc_port2>;
320 }; <<
321 <<
322 &mscc_felix_port5 { <<
323 status = "okay"; 275 status = "okay";
324 }; 276 };
325 277
326 &optee { 278 &optee {
327 status = "okay"; 279 status = "okay";
328 }; 280 };
329 281
330 &pwm0 { <<
331 status = "okay"; <<
332 }; <<
333 <<
334 &sai4 { 282 &sai4 {
335 status = "okay"; 283 status = "okay";
336 }; 284 };
337 285
338 &sata { 286 &sata {
339 status = "okay"; 287 status = "okay";
340 }; 288 };
341 289
342 &usb0 { <<
343 dr_mode = "host"; <<
344 status = "okay"; <<
345 }; <<
346 <<
347 &usb1 { 290 &usb1 {
348 status = "okay"; !! 291 dr_mode = "otg";
349 }; 292 };
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