1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Device Tree file for NXP LS1028A RDB Board. 3 * Device Tree file for NXP LS1028A RDB Board.
4 * 4 *
5 * Copyright 2018-2021 NXP !! 5 * Copyright 2018 NXP
6 * 6 *
7 * Harninder Rai <harninder.rai@nxp.com> 7 * Harninder Rai <harninder.rai@nxp.com>
8 * 8 *
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi" 12 #include "fsl-ls1028a.dtsi"
13 13
14 / { 14 / {
15 model = "LS1028A RDB Board"; 15 model = "LS1028A RDB Board";
16 compatible = "fsl,ls1028a-rdb", "fsl,l 16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
17 17
18 aliases { 18 aliases {
19 crypto = &crypto; 19 crypto = &crypto;
20 serial0 = &duart0; 20 serial0 = &duart0;
21 serial1 = &duart1; 21 serial1 = &duart1;
22 mmc0 = &esdhc; <<
23 mmc1 = &esdhc1; <<
24 rtc1 = &ftm_alarm1; <<
25 spi0 = &fspi; <<
26 ethernet0 = &enetc_port0; <<
27 ethernet1 = &enetc_port2; <<
28 ethernet2 = &mscc_felix_port0; <<
29 ethernet3 = &mscc_felix_port1; <<
30 ethernet4 = &mscc_felix_port2; <<
31 ethernet5 = &mscc_felix_port3; <<
32 ethernet6 = &mscc_felix_port4; <<
33 ethernet7 = &mscc_felix_port5; <<
34 ethernet8 = &enetc_port3; <<
35 }; 22 };
36 23
37 chosen { 24 chosen {
38 stdout-path = "serial0:115200n 25 stdout-path = "serial0:115200n8";
39 }; 26 };
40 27
41 memory@80000000 { 28 memory@80000000 {
42 device_type = "memory"; 29 device_type = "memory";
43 reg = <0x0 0x80000000 0x1 0x00 30 reg = <0x0 0x80000000 0x1 0x0000000>;
44 }; 31 };
45 32
46 sys_mclk: clock-mclk { 33 sys_mclk: clock-mclk {
47 compatible = "fixed-clock"; 34 compatible = "fixed-clock";
48 #clock-cells = <0>; 35 #clock-cells = <0>;
49 clock-frequency = <25000000>; 36 clock-frequency = <25000000>;
50 }; 37 };
51 38
52 reg_1p8v: regulator-1p8v { 39 reg_1p8v: regulator-1p8v {
53 compatible = "regulator-fixed" 40 compatible = "regulator-fixed";
54 regulator-name = "1P8V"; 41 regulator-name = "1P8V";
55 regulator-min-microvolt = <180 42 regulator-min-microvolt = <1800000>;
56 regulator-max-microvolt = <180 43 regulator-max-microvolt = <1800000>;
57 regulator-always-on; 44 regulator-always-on;
58 }; 45 };
59 46
60 sb_3v3: regulator-sb3v3 { 47 sb_3v3: regulator-sb3v3 {
61 compatible = "regulator-fixed" 48 compatible = "regulator-fixed";
62 regulator-name = "3v3_vbus"; 49 regulator-name = "3v3_vbus";
63 regulator-min-microvolt = <330 50 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <330 51 regulator-max-microvolt = <3300000>;
65 regulator-boot-on; 52 regulator-boot-on;
66 regulator-always-on; 53 regulator-always-on;
67 }; 54 };
68 55
69 sound { 56 sound {
70 compatible = "simple-audio-car 57 compatible = "simple-audio-card";
71 simple-audio-card,format = "i2 58 simple-audio-card,format = "i2s";
72 simple-audio-card,widgets = 59 simple-audio-card,widgets =
73 "Microphone", "Microph 60 "Microphone", "Microphone Jack",
74 "Headphone", "Headphon 61 "Headphone", "Headphone Jack",
75 "Speaker", "Speaker Ex 62 "Speaker", "Speaker Ext",
76 "Line", "Line In Jack" 63 "Line", "Line In Jack";
77 simple-audio-card,routing = 64 simple-audio-card,routing =
78 "MIC_IN", "Microphone 65 "MIC_IN", "Microphone Jack",
79 "Microphone Jack", "Mi 66 "Microphone Jack", "Mic Bias",
80 "LINE_IN", "Line In Ja 67 "LINE_IN", "Line In Jack",
81 "Headphone Jack", "HP_ 68 "Headphone Jack", "HP_OUT",
82 "Speaker Ext", "LINE_O 69 "Speaker Ext", "LINE_OUT";
83 70
84 simple-audio-card,cpu { 71 simple-audio-card,cpu {
85 sound-dai = <&sai4>; 72 sound-dai = <&sai4>;
86 frame-master; 73 frame-master;
87 bitclock-master; 74 bitclock-master;
88 }; 75 };
89 76
90 simple-audio-card,codec { 77 simple-audio-card,codec {
91 sound-dai = <&sgtl5000 78 sound-dai = <&sgtl5000>;
92 frame-master; 79 frame-master;
93 bitclock-master; 80 bitclock-master;
94 system-clock-frequency 81 system-clock-frequency = <25000000>;
95 }; 82 };
96 }; 83 };
97 }; 84 };
98 85
99 &can0 { <<
100 status = "okay"; <<
101 <<
102 can-transceiver { <<
103 max-bitrate = <5000000>; <<
104 }; <<
105 }; <<
106 <<
107 &can1 { <<
108 status = "okay"; <<
109 <<
110 can-transceiver { <<
111 max-bitrate = <5000000>; <<
112 }; <<
113 }; <<
114 <<
115 &duart0 { <<
116 status = "okay"; <<
117 }; <<
118 <<
119 &duart1 { <<
120 status = "okay"; <<
121 }; <<
122 <<
123 &enetc_mdio_pf3 { <<
124 sgmii_phy0: ethernet-phy@2 { <<
125 reg = <0x2>; <<
126 }; <<
127 <<
128 /* VSC8514 QSGMII quad PHY */ <<
129 qsgmii_phy0: ethernet-phy@10 { <<
130 reg = <0x10>; <<
131 }; <<
132 <<
133 qsgmii_phy1: ethernet-phy@11 { <<
134 reg = <0x11>; <<
135 }; <<
136 <<
137 qsgmii_phy2: ethernet-phy@12 { <<
138 reg = <0x12>; <<
139 }; <<
140 <<
141 qsgmii_phy3: ethernet-phy@13 { <<
142 reg = <0x13>; <<
143 }; <<
144 }; <<
145 <<
146 &enetc_port0 { <<
147 phy-handle = <&sgmii_phy0>; <<
148 phy-mode = "sgmii"; <<
149 managed = "in-band-status"; <<
150 status = "okay"; <<
151 }; <<
152 <<
153 &enetc_port2 { <<
154 status = "okay"; <<
155 }; <<
156 <<
157 &enetc_port3 { <<
158 status = "okay"; <<
159 }; <<
160 <<
161 &esdhc { 86 &esdhc {
162 sd-uhs-sdr104; 87 sd-uhs-sdr104;
163 sd-uhs-sdr50; 88 sd-uhs-sdr50;
164 sd-uhs-sdr25; 89 sd-uhs-sdr25;
165 sd-uhs-sdr12; 90 sd-uhs-sdr12;
166 status = "okay"; 91 status = "okay";
167 }; 92 };
168 93
169 &esdhc1 { 94 &esdhc1 {
170 mmc-hs200-1_8v; 95 mmc-hs200-1_8v;
171 mmc-hs400-1_8v; <<
172 bus-width = <8>; <<
173 status = "okay"; <<
174 }; <<
175 <<
176 &fspi { <<
177 status = "okay"; <<
178 <<
179 mt35xu02g0: flash@0 { <<
180 compatible = "jedec,spi-nor"; <<
181 #address-cells = <1>; <<
182 #size-cells = <1>; <<
183 spi-max-frequency = <50000000> <<
184 /* The following setting enabl <<
185 spi-rx-bus-width = <8>; /* 8 S <<
186 spi-tx-bus-width = <1>; /* 1 S <<
187 reg = <0>; <<
188 }; <<
189 }; <<
190 <<
191 &ftm_alarm1 { <<
192 status = "okay"; 96 status = "okay";
193 }; 97 };
194 98
195 &i2c0 { 99 &i2c0 {
196 status = "okay"; 100 status = "okay";
197 101
198 i2c-mux@77 { 102 i2c-mux@77 {
199 compatible = "nxp,pca9847"; 103 compatible = "nxp,pca9847";
200 reg = <0x77>; 104 reg = <0x77>;
201 #address-cells = <1>; 105 #address-cells = <1>;
202 #size-cells = <0>; 106 #size-cells = <0>;
203 107
204 i2c@0 { <<
205 #address-cells = <1>; <<
206 #size-cells = <0>; <<
207 reg = <0x0>; <<
208 <<
209 /* Atmel AT24C512C-XHD <<
210 eeprom@50 { <<
211 compatible = " <<
212 reg = <0x50>; <<
213 #address-cells <<
214 #size-cells = <<
215 }; <<
216 <<
217 /* AT24C04C 512-byte D <<
218 /* Documentation says <<
219 eeprom@52 { <<
220 compatible = " <<
221 reg = <0x52>; <<
222 #address-cells <<
223 #size-cells = <<
224 }; <<
225 <<
226 /* Atmel AT24C02C-XHMÂ <<
227 eeprom@57 { <<
228 compatible = " <<
229 reg = <0x57>; <<
230 #address-cells <<
231 #size-cells = <<
232 }; <<
233 }; <<
234 <<
235 i2c@1 { 108 i2c@1 {
236 #address-cells = <1>; 109 #address-cells = <1>;
237 #size-cells = <0>; 110 #size-cells = <0>;
238 reg = <0x1>; 111 reg = <0x1>;
239 112
240 sgtl5000: audio-codec@ 113 sgtl5000: audio-codec@a {
241 #sound-dai-cel 114 #sound-dai-cells = <0>;
242 compatible = " 115 compatible = "fsl,sgtl5000";
243 reg = <0xa>; 116 reg = <0xa>;
244 VDDA-supply = 117 VDDA-supply = <®_1p8v>;
245 VDDIO-supply = 118 VDDIO-supply = <®_1p8v>;
246 clocks = <&sys 119 clocks = <&sys_mclk>;
247 sclk-strength 120 sclk-strength = <3>;
248 }; 121 };
249 }; 122 };
250 123
251 i2c@2 { 124 i2c@2 {
252 #address-cells = <1>; 125 #address-cells = <1>;
253 #size-cells = <0>; 126 #size-cells = <0>;
254 reg = <0x02>; 127 reg = <0x02>;
255 128
256 current-monitor@40 { 129 current-monitor@40 {
257 compatible = " 130 compatible = "ti,ina220";
258 reg = <0x40>; 131 reg = <0x40>;
259 shunt-resistor 132 shunt-resistor = <500>;
260 }; 133 };
261 }; 134 };
262 135
263 i2c@3 { 136 i2c@3 {
264 #address-cells = <1>; 137 #address-cells = <1>;
265 #size-cells = <0>; 138 #size-cells = <0>;
266 reg = <0x3>; 139 reg = <0x3>;
267 140
268 temperature-sensor@4c 141 temperature-sensor@4c {
269 compatible = " 142 compatible = "nxp,sa56004";
270 reg = <0x4c>; 143 reg = <0x4c>;
271 vcc-supply = < 144 vcc-supply = <&sb_3v3>;
272 }; 145 };
273 146
274 rtc@51 { 147 rtc@51 {
275 compatible = " 148 compatible = "nxp,pcf2129";
276 reg = <0x51>; 149 reg = <0x51>;
277 }; 150 };
278 }; 151 };
279 }; 152 };
280 }; 153 };
281 154
282 &mscc_felix { !! 155 &duart0 {
283 status = "okay"; <<
284 }; <<
285 <<
286 &mscc_felix_port0 { <<
287 label = "swp0"; <<
288 managed = "in-band-status"; <<
289 phy-handle = <&qsgmii_phy0>; <<
290 phy-mode = "qsgmii"; <<
291 status = "okay"; <<
292 }; <<
293 <<
294 &mscc_felix_port1 { <<
295 label = "swp1"; <<
296 managed = "in-band-status"; <<
297 phy-handle = <&qsgmii_phy1>; <<
298 phy-mode = "qsgmii"; <<
299 status = "okay"; <<
300 }; <<
301 <<
302 &mscc_felix_port2 { <<
303 label = "swp2"; <<
304 managed = "in-band-status"; <<
305 phy-handle = <&qsgmii_phy2>; <<
306 phy-mode = "qsgmii"; <<
307 status = "okay"; <<
308 }; <<
309 <<
310 &mscc_felix_port3 { <<
311 label = "swp3"; <<
312 managed = "in-band-status"; <<
313 phy-handle = <&qsgmii_phy3>; <<
314 phy-mode = "qsgmii"; <<
315 status = "okay"; 156 status = "okay";
316 }; 157 };
317 158
318 &mscc_felix_port4 { !! 159 &duart1 {
319 status = "okay"; 160 status = "okay";
320 }; 161 };
321 162
322 &mscc_felix_port5 { !! 163 &enetc_port0 {
323 status = "okay"; !! 164 phy-handle = <&sgmii_phy0>;
324 }; !! 165 phy-connection-type = "sgmii";
325 166
326 &optee { !! 167 mdio {
327 status = "okay"; !! 168 #address-cells = <1>;
>> 169 #size-cells = <0>;
>> 170 sgmii_phy0: ethernet-phy@2 {
>> 171 reg = <0x2>;
>> 172 };
>> 173 };
328 }; 174 };
329 175
330 &pwm0 { !! 176 &enetc_port1 {
331 status = "okay"; !! 177 status = "disabled";
332 }; 178 };
333 179
334 &sai4 { 180 &sai4 {
335 status = "okay"; 181 status = "okay";
336 }; 182 };
337 183
338 &sata { 184 &sata {
339 status = "okay"; <<
340 }; <<
341 <<
342 &usb0 { <<
343 dr_mode = "host"; <<
344 status = "okay"; <<
345 }; <<
346 <<
347 &usb1 { <<
348 status = "okay"; 185 status = "okay";
349 }; 186 };
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