1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) <<
2 /* 1 /*
3 * Device Tree Include file for Freescale Laye 2 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4 * 3 *
5 * Copyright 2016 Freescale Semiconductor, Inc !! 4 * Copyright 2016, Freescale Semiconductor, Inc.
6 * Copyright 2019-2020 NXP <<
7 * 5 *
8 * Mingkai Hu <mingkai.hu@nxp.com> 6 * Mingkai Hu <mingkai.hu@nxp.com>
>> 7 *
>> 8 * This file is dual-licensed: you can use it either under the terms
>> 9 * of the GPLv2 or the X11 license, at your option. Note that this dual
>> 10 * licensing only applies to this file, and not this project as a
>> 11 * whole.
>> 12 *
>> 13 * a) This library is free software; you can redistribute it and/or
>> 14 * modify it under the terms of the GNU General Public License as
>> 15 * published by the Free Software Foundation; either version 2 of the
>> 16 * License, or (at your option) any later version.
>> 17 *
>> 18 * This library is distributed in the hope that it will be useful,
>> 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> 21 * GNU General Public License for more details.
>> 22 *
>> 23 * Or, alternatively,
>> 24 *
>> 25 * b) Permission is hereby granted, free of charge, to any person
>> 26 * obtaining a copy of this software and associated documentation
>> 27 * files (the "Software"), to deal in the Software without
>> 28 * restriction, including without limitation the rights to use,
>> 29 * copy, modify, merge, publish, distribute, sublicense, and/or
>> 30 * sell copies of the Software, and to permit persons to whom the
>> 31 * Software is furnished to do so, subject to the following
>> 32 * conditions:
>> 33 *
>> 34 * The above copyright notice and this permission notice shall be
>> 35 * included in all copies or substantial portions of the Software.
>> 36 *
>> 37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> 38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> 39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> 40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> 41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> 42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> 43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> 44 * OTHER DEALINGS IN THE SOFTWARE.
9 */ 45 */
10 46
11 /dts-v1/; 47 /dts-v1/;
12 48
13 #include "fsl-ls1046a.dtsi" 49 #include "fsl-ls1046a.dtsi"
14 50
15 / { 51 / {
16 model = "LS1046A RDB Board"; 52 model = "LS1046A RDB Board";
17 compatible = "fsl,ls1046a-rdb", "fsl,l 53 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
18 54
19 aliases { 55 aliases {
20 serial0 = &duart0; 56 serial0 = &duart0;
21 serial1 = &duart1; 57 serial1 = &duart1;
22 serial2 = &duart2; 58 serial2 = &duart2;
23 serial3 = &duart3; 59 serial3 = &duart3;
24 }; 60 };
25 61
26 chosen { 62 chosen {
27 stdout-path = "serial0:115200n 63 stdout-path = "serial0:115200n8";
28 }; 64 };
29 }; 65 };
30 66
31 &duart0 { 67 &duart0 {
32 status = "okay"; 68 status = "okay";
33 }; 69 };
34 70
35 &duart1 { 71 &duart1 {
36 status = "okay"; 72 status = "okay";
37 }; 73 };
38 74
39 &esdhc { <<
40 mmc-hs200-1_8v; <<
41 sd-uhs-sdr104; <<
42 sd-uhs-sdr50; <<
43 sd-uhs-sdr25; <<
44 sd-uhs-sdr12; <<
45 }; <<
46 <<
47 &i2c0 { 75 &i2c0 {
48 status = "okay"; 76 status = "okay";
49 77
50 ina220@40 { 78 ina220@40 {
51 compatible = "ti,ina220"; 79 compatible = "ti,ina220";
52 reg = <0x40>; 80 reg = <0x40>;
53 shunt-resistor = <1000>; 81 shunt-resistor = <1000>;
54 }; 82 };
55 83
56 temp-sensor@4c { 84 temp-sensor@4c {
57 compatible = "adi,adt7461"; 85 compatible = "adi,adt7461";
58 reg = <0x4c>; 86 reg = <0x4c>;
59 }; 87 };
60 88
61 eeprom@52 { !! 89 eeprom@56 {
62 compatible = "onnn,cat24c05", !! 90 compatible = "atmel,24c512";
63 reg = <0x52>; 91 reg = <0x52>;
64 }; 92 };
>> 93
>> 94 eeprom@57 {
>> 95 compatible = "atmel,24c512";
>> 96 reg = <0x53>;
>> 97 };
65 }; 98 };
66 99
67 &i2c3 { 100 &i2c3 {
68 status = "okay"; 101 status = "okay";
69 102
70 rtc@51 { 103 rtc@51 {
71 compatible = "nxp,pcf2129"; 104 compatible = "nxp,pcf2129";
72 reg = <0x51>; 105 reg = <0x51>;
73 /* IRQ_RTC_B -> IRQ05, active <<
74 interrupts-extended = <&extirq <<
75 }; 106 };
76 }; 107 };
77 108
78 &ifc { 109 &ifc {
79 #address-cells = <2>; 110 #address-cells = <2>;
80 #size-cells = <1>; 111 #size-cells = <1>;
81 /* NAND Flashe and CPLD on board */ 112 /* NAND Flashe and CPLD on board */
82 ranges = <0x0 0x0 0x0 0x7e800000 0x000 113 ranges = <0x0 0x0 0x0 0x7e800000 0x00010000
83 0x2 0x0 0x0 0x7fb00000 0x000 114 0x2 0x0 0x0 0x7fb00000 0x00000100>;
84 status = "okay"; 115 status = "okay";
85 116
86 nand@0,0 { 117 nand@0,0 {
87 compatible = "fsl,ifc-nand"; 118 compatible = "fsl,ifc-nand";
88 #address-cells = <1>; 119 #address-cells = <1>;
89 #size-cells = <1>; 120 #size-cells = <1>;
90 reg = <0x0 0x0 0x10000>; 121 reg = <0x0 0x0 0x10000>;
91 }; 122 };
92 123
93 cpld: board-control@2,0 { 124 cpld: board-control@2,0 {
94 compatible = "fsl,ls1046ardb-c 125 compatible = "fsl,ls1046ardb-cpld";
95 reg = <0x2 0x0 0x0000100>; 126 reg = <0x2 0x0 0x0000100>;
96 }; 127 };
97 }; 128 };
98 129
99 &qspi { 130 &qspi {
>> 131 num-cs = <2>;
>> 132 bus-num = <0>;
100 status = "okay"; 133 status = "okay";
101 134
102 s25fs512s0: flash@0 { !! 135 qflash0: s25fs512s@0 {
103 compatible = "jedec,spi-nor"; !! 136 compatible = "spansion,m25p80";
104 #address-cells = <1>; 137 #address-cells = <1>;
105 #size-cells = <1>; 138 #size-cells = <1>;
106 spi-max-frequency = <50000000> !! 139 spi-max-frequency = <20000000>;
107 spi-rx-bus-width = <4>; <<
108 spi-tx-bus-width = <1>; <<
109 reg = <0>; 140 reg = <0>;
110 }; 141 };
111 142
112 s25fs512s1: flash@1 { !! 143 qflash1: s25fs512s@1 {
113 compatible = "jedec,spi-nor"; !! 144 compatible = "spansion,m25p80";
114 #address-cells = <1>; 145 #address-cells = <1>;
115 #size-cells = <1>; 146 #size-cells = <1>;
116 spi-max-frequency = <50000000> !! 147 spi-max-frequency = <20000000>;
117 spi-rx-bus-width = <4>; <<
118 spi-tx-bus-width = <1>; <<
119 reg = <1>; 148 reg = <1>;
120 }; <<
121 }; <<
122 <<
123 &usb1 { <<
124 dr_mode = "otg"; <<
125 }; <<
126 <<
127 #include "fsl-ls1046-post.dtsi" <<
128 <<
129 &fman0 { <<
130 ethernet@e4000 { <<
131 phy-handle = <&rgmii_phy1>; <<
132 phy-connection-type = "rgmii-i <<
133 }; <<
134 <<
135 ethernet@e6000 { <<
136 phy-handle = <&rgmii_phy2>; <<
137 phy-connection-type = "rgmii-i <<
138 }; <<
139 <<
140 ethernet@e8000 { <<
141 phy-handle = <&sgmii_phy1>; <<
142 phy-connection-type = "sgmii"; <<
143 }; <<
144 <<
145 ethernet@ea000 { <<
146 phy-handle = <&sgmii_phy2>; <<
147 phy-connection-type = "sgmii"; <<
148 }; <<
149 <<
150 ethernet@f0000 { /* 10GEC1 */ <<
151 phy-handle = <&aqr106_phy>; <<
152 phy-connection-type = "xgmii"; <<
153 }; <<
154 <<
155 ethernet@f2000 { /* 10GEC2 */ <<
156 phy-connection-type = "10gbase <<
157 managed = "in-band-status"; <<
158 }; <<
159 <<
160 mdio@fc000 { <<
161 rgmii_phy1: ethernet-phy@1 { <<
162 reg = <0x1>; <<
163 }; <<
164 <<
165 rgmii_phy2: ethernet-phy@2 { <<
166 reg = <0x2>; <<
167 }; <<
168 <<
169 sgmii_phy1: ethernet-phy@3 { <<
170 reg = <0x3>; <<
171 }; <<
172 <<
173 sgmii_phy2: ethernet-phy@4 { <<
174 reg = <0x4>; <<
175 }; <<
176 }; <<
177 <<
178 mdio@fd000 { <<
179 aqr106_phy: ethernet-phy@0 { <<
180 compatible = "ethernet <<
181 interrupts = <0 131 4> <<
182 reg = <0x0>; <<
183 }; <<
184 }; 149 };
185 }; 150 };
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