1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Device Tree file for NXP LS1088A RDB Board. 3 * Device Tree file for NXP LS1088A RDB Board.
4 * 4 *
5 * Copyright 2017-2020 NXP !! 5 * Copyright 2017 NXP
6 * 6 *
7 * Harninder Rai <harninder.rai@nxp.com> 7 * Harninder Rai <harninder.rai@nxp.com>
8 * 8 *
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 12
13 #include "fsl-ls1088a.dtsi" 13 #include "fsl-ls1088a.dtsi"
14 14
15 / { 15 / {
16 model = "LS1088A RDB Board"; 16 model = "LS1088A RDB Board";
17 compatible = "fsl,ls1088a-rdb", "fsl,l 17 compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
18 }; 18 };
19 19
20 &dpmac2 { <<
21 phy-handle = <&mdio2_aquantia_phy>; <<
22 phy-connection-type = "10gbase-r"; <<
23 pcs-handle = <&pcs2>; <<
24 }; <<
25 <<
26 &dpmac3 { <<
27 phy-handle = <&mdio1_phy5>; <<
28 phy-connection-type = "qsgmii"; <<
29 managed = "in-band-status"; <<
30 pcs-handle = <&pcs3_0>; <<
31 }; <<
32 <<
33 &dpmac4 { <<
34 phy-handle = <&mdio1_phy6>; <<
35 phy-connection-type = "qsgmii"; <<
36 managed = "in-band-status"; <<
37 pcs-handle = <&pcs3_1>; <<
38 }; <<
39 <<
40 &dpmac5 { <<
41 phy-handle = <&mdio1_phy7>; <<
42 phy-connection-type = "qsgmii"; <<
43 managed = "in-band-status"; <<
44 pcs-handle = <&pcs3_2>; <<
45 }; <<
46 <<
47 &dpmac6 { <<
48 phy-handle = <&mdio1_phy8>; <<
49 phy-connection-type = "qsgmii"; <<
50 managed = "in-band-status"; <<
51 pcs-handle = <&pcs3_3>; <<
52 }; <<
53 <<
54 &dpmac7 { <<
55 phy-handle = <&mdio1_phy1>; <<
56 phy-connection-type = "qsgmii"; <<
57 managed = "in-band-status"; <<
58 pcs-handle = <&pcs7_0>; <<
59 }; <<
60 <<
61 &dpmac8 { <<
62 phy-handle = <&mdio1_phy2>; <<
63 phy-connection-type = "qsgmii"; <<
64 managed = "in-band-status"; <<
65 pcs-handle = <&pcs7_1>; <<
66 }; <<
67 <<
68 &dpmac9 { <<
69 phy-handle = <&mdio1_phy3>; <<
70 phy-connection-type = "qsgmii"; <<
71 managed = "in-band-status"; <<
72 pcs-handle = <&pcs7_2>; <<
73 }; <<
74 <<
75 &dpmac10 { <<
76 phy-handle = <&mdio1_phy4>; <<
77 phy-connection-type = "qsgmii"; <<
78 managed = "in-band-status"; <<
79 pcs-handle = <&pcs7_3>; <<
80 }; <<
81 <<
82 &emdio1 { <<
83 status = "okay"; <<
84 <<
85 mdio1_phy5: ethernet-phy@c { <<
86 interrupts-extended = <&extirq <<
87 reg = <0xc>; <<
88 }; <<
89 <<
90 mdio1_phy6: ethernet-phy@d { <<
91 interrupts-extended = <&extirq <<
92 reg = <0xd>; <<
93 }; <<
94 <<
95 mdio1_phy7: ethernet-phy@e { <<
96 interrupts-extended = <&extirq <<
97 reg = <0xe>; <<
98 }; <<
99 <<
100 mdio1_phy8: ethernet-phy@f { <<
101 interrupts-extended = <&extirq <<
102 reg = <0xf>; <<
103 }; <<
104 <<
105 mdio1_phy1: ethernet-phy@1c { <<
106 interrupts-extended = <&extirq <<
107 reg = <0x1c>; <<
108 }; <<
109 <<
110 mdio1_phy2: ethernet-phy@1d { <<
111 interrupts-extended = <&extirq <<
112 reg = <0x1d>; <<
113 }; <<
114 <<
115 mdio1_phy3: ethernet-phy@1e { <<
116 interrupts-extended = <&extirq <<
117 reg = <0x1e>; <<
118 }; <<
119 <<
120 mdio1_phy4: ethernet-phy@1f { <<
121 interrupts-extended = <&extirq <<
122 reg = <0x1f>; <<
123 }; <<
124 }; <<
125 <<
126 &emdio2 { <<
127 status = "okay"; <<
128 <<
129 mdio2_aquantia_phy: ethernet-phy@0 { <<
130 compatible = "ethernet-phy-iee <<
131 interrupts-extended = <&extirq <<
132 reg = <0x0>; <<
133 }; <<
134 }; <<
135 <<
136 &i2c0 { 20 &i2c0 {
137 status = "okay"; 21 status = "okay";
138 22
139 i2c-mux@77 { !! 23 i2c-switch@77 {
140 compatible = "nxp,pca9547"; 24 compatible = "nxp,pca9547";
141 reg = <0x77>; 25 reg = <0x77>;
142 #address-cells = <1>; 26 #address-cells = <1>;
143 #size-cells = <0>; 27 #size-cells = <0>;
144 28
145 i2c@2 { 29 i2c@2 {
146 #address-cells = <1>; 30 #address-cells = <1>;
147 #size-cells = <0>; 31 #size-cells = <0>;
148 reg = <0x2>; 32 reg = <0x2>;
149 33
150 ina220@40 { 34 ina220@40 {
151 compatible = " 35 compatible = "ti,ina220";
152 reg = <0x40>; 36 reg = <0x40>;
153 shunt-resistor 37 shunt-resistor = <1000>;
154 }; 38 };
155 }; 39 };
156 40
157 i2c@3 { 41 i2c@3 {
158 #address-cells = <1>; 42 #address-cells = <1>;
159 #size-cells = <0>; 43 #size-cells = <0>;
160 reg = <0x3>; 44 reg = <0x3>;
161 45
162 temp-sensor@4c { 46 temp-sensor@4c {
163 compatible = " 47 compatible = "adi,adt7461a";
164 reg = <0x4c>; 48 reg = <0x4c>;
165 }; 49 };
166 50
167 rtc@51 { 51 rtc@51 {
168 compatible = " 52 compatible = "nxp,pcf2129";
169 reg = <0x51>; 53 reg = <0x51>;
170 /* IRQ_RTC_B - !! 54 /* IRQ10_B */
171 interrupts-ext !! 55 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
172 }; <<
173 <<
174 rtc@53 { <<
175 compatible = " <<
176 reg = <0x53>; <<
177 /* IRQ_RTC_B - <<
178 interrupts-ext <<
179 }; 56 };
180 }; 57 };
181 }; 58 };
182 }; 59 };
183 60
184 &ifc { 61 &ifc {
185 ranges = <0 0 0x5 0x30000000 0x0001000 62 ranges = <0 0 0x5 0x30000000 0x00010000
186 2 0 0x5 0x20000000 0x0001000 63 2 0 0x5 0x20000000 0x00010000>;
187 status = "okay"; 64 status = "okay";
188 65
189 nand@0,0 { 66 nand@0,0 {
190 compatible = "fsl,ifc-nand"; 67 compatible = "fsl,ifc-nand";
191 reg = <0x0 0x0 0x10000>; 68 reg = <0x0 0x0 0x10000>;
192 }; 69 };
193 70
194 fpga: board-control@2,0 { 71 fpga: board-control@2,0 {
195 compatible = "fsl,ls1088ardb-f 72 compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
196 reg = <0x2 0x0 0x0000100>; 73 reg = <0x2 0x0 0x0000100>;
197 }; 74 };
198 }; 75 };
199 76
200 &duart0 { 77 &duart0 {
201 status = "okay"; 78 status = "okay";
202 }; 79 };
203 80
204 &duart1 { 81 &duart1 {
205 status = "okay"; 82 status = "okay";
206 }; 83 };
207 84
208 &esdhc { 85 &esdhc {
209 mmc-hs200-1_8v; <<
210 status = "okay"; <<
211 }; <<
212 <<
213 &pcs_mdio2 { <<
214 status = "okay"; 86 status = "okay";
215 }; 87 };
216 88
217 &pcs_mdio3 { <<
218 status = "okay"; <<
219 }; <<
220 <<
221 &pcs_mdio7 { <<
222 status = "okay"; <<
223 }; <<
224 <<
225 &qspi { <<
226 status = "okay"; <<
227 <<
228 s25fs512s0: flash@0 { <<
229 compatible = "jedec,spi-nor"; <<
230 #address-cells = <1>; <<
231 #size-cells = <1>; <<
232 spi-max-frequency = <50000000> <<
233 spi-rx-bus-width = <4>; <<
234 spi-tx-bus-width = <1>; <<
235 reg = <0>; <<
236 }; <<
237 <<
238 s25fs512s1: flash@1 { <<
239 compatible = "jedec,spi-nor"; <<
240 #address-cells = <1>; <<
241 #size-cells = <1>; <<
242 spi-max-frequency = <50000000> <<
243 spi-rx-bus-width = <4>; <<
244 spi-tx-bus-width = <1>; <<
245 reg = <1>; <<
246 }; <<
247 }; <<
248 <<
249 &sata { 89 &sata {
250 status = "okay"; 90 status = "okay";
251 }; 91 };
252 92
253 &usb0 { 93 &usb0 {
254 status = "okay"; 94 status = "okay";
255 }; 95 };
256 96
257 &usb1 { 97 &usb1 {
258 dr_mode = "otg"; <<
259 status = "okay"; 98 status = "okay";
260 }; 99 };
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