1 // SPDX-License-Identifier: GPL-2.0-or-later O 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* 2 /*
3 * Copyright 2022 Toradex 3 * Copyright 2022 Toradex
4 */ 4 */
5 5
6 / { 6 / {
7 aliases { 7 aliases {
8 rtc0 = &rtc_i2c; 8 rtc0 = &rtc_i2c;
9 rtc1 = &rtc; 9 rtc1 = &rtc;
10 }; 10 };
11 11
12 reg_usb_host_vbus: regulator-usb-host- 12 reg_usb_host_vbus: regulator-usb-host-vbus {
13 regulator-name = "VCC USBH2(AB 13 regulator-name = "VCC USBH2(ABCD) / USBH(3|4)";
14 }; 14 };
15 }; 15 };
16 16
17 &adc0 { 17 &adc0 {
18 status = "okay"; 18 status = "okay";
19 }; 19 };
20 20
21 &adc1 { 21 &adc1 {
22 status = "okay"; 22 status = "okay";
23 }; 23 };
24 24
25 /* TODO: Audio Mixer */ 25 /* TODO: Audio Mixer */
26 26
27 /* TODO: Asynchronous Sample Rate Converter (A 27 /* TODO: Asynchronous Sample Rate Converter (ASRC) */
28 28
29 /* TODO: Display Controller */ 29 /* TODO: Display Controller */
30 30
31 /* TODO: DPU */ 31 /* TODO: DPU */
32 32
33 /* Apalis ETH1 */ 33 /* Apalis ETH1 */
34 &fec1 { 34 &fec1 {
35 status = "okay"; 35 status = "okay";
36 }; 36 };
37 37
38 /* Apalis I2C1 */ 38 /* Apalis I2C1 */
39 &i2c2 { 39 &i2c2 {
40 status = "okay"; 40 status = "okay";
41 41
42 /* M41T0M6 real time clock on carrier 42 /* M41T0M6 real time clock on carrier board */
43 rtc_i2c: rtc@68 { 43 rtc_i2c: rtc@68 {
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 }; 46 };
47 47
48 /* Apalis I2C3 (CAM) */ 48 /* Apalis I2C3 (CAM) */
49 &i2c3 { 49 &i2c3 {
50 status = "okay"; 50 status = "okay";
51 }; 51 };
52 52
53 /* Apalis SPI1 */ 53 /* Apalis SPI1 */
54 &lpspi0 { 54 &lpspi0 {
55 status = "okay"; 55 status = "okay";
56 }; 56 };
57 57
58 /* Apalis SPI2 */ 58 /* Apalis SPI2 */
59 &lpspi2 { 59 &lpspi2 {
60 status = "okay"; 60 status = "okay";
61 }; 61 };
62 62
63 /* Apalis UART3 */ 63 /* Apalis UART3 */
64 &lpuart0 { 64 &lpuart0 {
65 status = "okay"; 65 status = "okay";
66 }; 66 };
67 67
68 /* Apalis UART1 */ 68 /* Apalis UART1 */
69 &lpuart1 { 69 &lpuart1 {
70 status = "okay"; 70 status = "okay";
71 }; 71 };
72 72
73 /* Apalis UART4 */ 73 /* Apalis UART4 */
74 &lpuart2 { 74 &lpuart2 {
75 status = "okay"; 75 status = "okay";
76 }; 76 };
77 77
78 /* Apalis UART2 */ 78 /* Apalis UART2 */
79 &lpuart3 { 79 &lpuart3 {
80 status = "okay"; 80 status = "okay";
81 }; 81 };
82 82
83 /* Apalis PWM3, MXM3 pin 6 */ 83 /* Apalis PWM3, MXM3 pin 6 */
84 &lsio_pwm0 { 84 &lsio_pwm0 {
85 status = "okay"; 85 status = "okay";
86 }; 86 };
87 87
88 /* Apalis PWM4, MXM3 pin 8 */ 88 /* Apalis PWM4, MXM3 pin 8 */
89 &lsio_pwm1 { 89 &lsio_pwm1 {
90 status = "okay"; 90 status = "okay";
91 }; 91 };
92 92
93 /* Apalis PWM1, MXM3 pin 2 */ 93 /* Apalis PWM1, MXM3 pin 2 */
94 &lsio_pwm2 { 94 &lsio_pwm2 {
95 status = "okay"; 95 status = "okay";
96 }; 96 };
97 97
98 /* Apalis PWM2, MXM3 pin 4 */ 98 /* Apalis PWM2, MXM3 pin 4 */
99 &lsio_pwm3 { 99 &lsio_pwm3 {
100 status = "okay"; 100 status = "okay";
101 }; 101 };
102 102
103 /* TODO: Apalis PCIE1 */ 103 /* TODO: Apalis PCIE1 */
104 104
105 /* TODO: Apalis BKL1_PWM */ 105 /* TODO: Apalis BKL1_PWM */
106 106
107 /* TODO: Apalis DAP1 */ 107 /* TODO: Apalis DAP1 */
108 108
109 /* TODO: Apalis Analogue Audio */ 109 /* TODO: Apalis Analogue Audio */
110 110
111 /* TODO: Apalis SATA1 */ 111 /* TODO: Apalis SATA1 */
112 112
113 /* TODO: Apalis SPDIF1 */ 113 /* TODO: Apalis SPDIF1 */
114 114
115 /* TODO: Apalis USBH2, Apalis USBH3 and on-mod 115 /* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */
116 116
117 /* Apalis USBO1 */ 117 /* Apalis USBO1 */
118 &usbotg1 { 118 &usbotg1 {
119 status = "okay"; 119 status = "okay";
120 }; 120 };
121 121
122 /* TODO: Apalis USBH4 SuperSpeed */ 122 /* TODO: Apalis USBH4 SuperSpeed */
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