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Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mm-ddr4-evk.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8mm-ddr4-evk.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/freescale/imx8mm-ddr4-evk.dts (Version linux-6.4.16)


  1 // SPDX-License-Identifier: GPL-2.0+                1 // SPDX-License-Identifier: GPL-2.0+
  2 /*                                                  2 /*
  3  * Copyright 2020 NXP                               3  * Copyright 2020 NXP
  4  */                                                 4  */
  5                                                     5 
  6 /dts-v1/;                                           6 /dts-v1/;
  7                                                     7 
  8 #include "imx8mm-evk.dtsi"                          8 #include "imx8mm-evk.dtsi"
  9                                                     9 
 10 / {                                                10 / {
 11         model = "FSL i.MX8MM DDR4 EVK with CYW     11         model = "FSL i.MX8MM DDR4 EVK with CYW43455 WIFI/BT board";
 12         compatible = "fsl,imx8mm-ddr4-evk", "f     12         compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm";
 13                                                    13 
 14         leds {                                     14         leds {
 15                 pinctrl-0 = <&pinctrl_gpio_led     15                 pinctrl-0 = <&pinctrl_gpio_led_2>;
 16                                                    16 
 17                 status {                           17                 status {
 18                         gpios = <&gpio3 4 GPIO     18                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
 19                 };                                 19                 };
 20         };                                         20         };
 21 };                                                 21 };
 22                                                    22 
 23 &gpmi {                                            23 &gpmi {
 24         pinctrl-names = "default";                 24         pinctrl-names = "default";
 25         pinctrl-0 = <&pinctrl_gpmi_nand>;          25         pinctrl-0 = <&pinctrl_gpmi_nand>;
                                                   >>  26         nand-on-flash-bbt;
 26         status = "okay";                           27         status = "okay";
 27 };                                                 28 };
 28                                                    29 
 29 &iomuxc {                                          30 &iomuxc {
 30         pinctrl_gpmi_nand: gpminandgrp {           31         pinctrl_gpmi_nand: gpminandgrp {
 31                 fsl,pins = <                       32                 fsl,pins = <
 32                         MX8MM_IOMUXC_NAND_ALE_     33                         MX8MM_IOMUXC_NAND_ALE_RAWNAND_ALE               0x00000096
 33                         MX8MM_IOMUXC_NAND_CE0_     34                         MX8MM_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B           0x00000096
 34                         MX8MM_IOMUXC_NAND_CE1_     35                         MX8MM_IOMUXC_NAND_CE1_B_RAWNAND_CE1_B           0x00000096
 35                         MX8MM_IOMUXC_NAND_CLE_     36                         MX8MM_IOMUXC_NAND_CLE_RAWNAND_CLE               0x00000096
 36                         MX8MM_IOMUXC_NAND_DATA     37                         MX8MM_IOMUXC_NAND_DATA00_RAWNAND_DATA00         0x00000096
 37                         MX8MM_IOMUXC_NAND_DATA     38                         MX8MM_IOMUXC_NAND_DATA01_RAWNAND_DATA01         0x00000096
 38                         MX8MM_IOMUXC_NAND_DATA     39                         MX8MM_IOMUXC_NAND_DATA02_RAWNAND_DATA02         0x00000096
 39                         MX8MM_IOMUXC_NAND_DATA     40                         MX8MM_IOMUXC_NAND_DATA03_RAWNAND_DATA03         0x00000096
 40                         MX8MM_IOMUXC_NAND_DATA     41                         MX8MM_IOMUXC_NAND_DATA04_RAWNAND_DATA04         0x00000096
 41                         MX8MM_IOMUXC_NAND_DATA     42                         MX8MM_IOMUXC_NAND_DATA05_RAWNAND_DATA05         0x00000096
 42                         MX8MM_IOMUXC_NAND_DATA     43                         MX8MM_IOMUXC_NAND_DATA06_RAWNAND_DATA06         0x00000096
 43                         MX8MM_IOMUXC_NAND_DATA     44                         MX8MM_IOMUXC_NAND_DATA07_RAWNAND_DATA07         0x00000096
 44                         MX8MM_IOMUXC_NAND_RE_B     45                         MX8MM_IOMUXC_NAND_RE_B_RAWNAND_RE_B             0x00000096
 45                         MX8MM_IOMUXC_NAND_READ     46                         MX8MM_IOMUXC_NAND_READY_B_RAWNAND_READY_B       0x00000056
 46                         MX8MM_IOMUXC_NAND_WE_B     47                         MX8MM_IOMUXC_NAND_WE_B_RAWNAND_WE_B             0x00000096
 47                         MX8MM_IOMUXC_NAND_WP_B     48                         MX8MM_IOMUXC_NAND_WP_B_RAWNAND_WP_B             0x00000096
 48                 >;                                 49                 >;
 49         };                                         50         };
 50                                                    51 
 51         pinctrl_gpio_led_2: gpioled2grp {          52         pinctrl_gpio_led_2: gpioled2grp {
 52                 fsl,pins = <                       53                 fsl,pins = <
 53                         MX8MM_IOMUXC_NAND_CE3_     54                         MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4       0x19
 54                 >;                                 55                 >;
 55         };                                         56         };
 56 };                                                 57 };
                                                      

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