1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 2 /* 3 * Copyright 2023 Emtop Embedded Solutions 3 * Copyright 2023 Emtop Embedded Solutions 4 */ 4 */ 5 5 6 /dts-v1/; 6 /dts-v1/; 7 7 8 #include "imx8mm-emtop-som.dtsi" 8 #include "imx8mm-emtop-som.dtsi" 9 9 10 / { 10 / { 11 model = "Emtop Embedded Solutions i.MX 11 model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1"; 12 compatible = "ees,imx8mm-emtop-baseboa 12 compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som", 13 "fsl,imx8mm"; 13 "fsl,imx8mm"; 14 }; 14 }; 15 15 16 &fec1 { 16 &fec1 { 17 pinctrl-names = "default"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&pinctrl_fec1>; 18 pinctrl-0 = <&pinctrl_fec1>; 19 phy-mode = "rgmii-id"; 19 phy-mode = "rgmii-id"; 20 phy-handle = <ðphy0>; 20 phy-handle = <ðphy0>; 21 fsl,magic-packet; 21 fsl,magic-packet; 22 status = "okay"; 22 status = "okay"; 23 23 24 mdio { 24 mdio { 25 #address-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <0>; 26 #size-cells = <0>; 27 27 28 ethphy0: ethernet-phy@4 { 28 ethphy0: ethernet-phy@4 { 29 compatible = "ethernet 29 compatible = "ethernet-phy-ieee802.3-c22"; 30 reg = <4>; 30 reg = <4>; 31 reset-gpios = <&gpio4 31 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; 32 reset-assert-us = <100 32 reset-assert-us = <10000>; 33 vddio-supply = <&vddio 33 vddio-supply = <&vddio>; 34 34 35 vddio: vddio-regulator 35 vddio: vddio-regulator { 36 regulator-min- 36 regulator-min-microvolt = <1800000>; 37 regulator-max- 37 regulator-max-microvolt = <1800000>; 38 }; 38 }; 39 }; 39 }; 40 }; 40 }; 41 }; 41 }; 42 42 43 &iomuxc { 43 &iomuxc { 44 pinctrl_fec1: fec1grp { 44 pinctrl_fec1: fec1grp { 45 fsl,pins = < 45 fsl,pins = < 46 MX8MM_IOMUXC_ENET_MDC_ 46 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 47 MX8MM_IOMUXC_ENET_MDIO 47 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 48 MX8MM_IOMUXC_ENET_TD3_ 48 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 49 MX8MM_IOMUXC_ENET_TD2_ 49 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 50 MX8MM_IOMUXC_ENET_TD1_ 50 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 51 MX8MM_IOMUXC_ENET_TD0_ 51 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 52 MX8MM_IOMUXC_ENET_RD3_ 52 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 53 MX8MM_IOMUXC_ENET_RD2_ 53 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 54 MX8MM_IOMUXC_ENET_RD1_ 54 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 55 MX8MM_IOMUXC_ENET_RD0_ 55 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 56 MX8MM_IOMUXC_ENET_TXC_ 56 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 57 MX8MM_IOMUXC_ENET_RXC_ 57 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 58 MX8MM_IOMUXC_ENET_RX_C 58 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 59 MX8MM_IOMUXC_ENET_TX_C 59 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 60 MX8MM_IOMUXC_SAI2_RXC_ 60 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 61 >; 61 >; 62 }; 62 }; 63 }; 63 };
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