1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright 2022 Gateworks Corporation 3 * Copyright 2022 Gateworks Corporation
4 * 4 *
5 * GW73xx RS232 with RTS/CTS hardware flow con 5 * GW73xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low 6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS 7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS 8 * - UART4_RX becomes CTS
9 */ 9 */
10 10
11 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/gpio.h>
12 12
13 #include "imx8mm-pinfunc.h" 13 #include "imx8mm-pinfunc.h"
14 14
15 /dts-v1/; 15 /dts-v1/;
16 /plugin/; 16 /plugin/;
17 17
18 &{/} { 18 &{/} {
19 compatible = "gw,imx8mm-gw73xx-0x"; 19 compatible = "gw,imx8mm-gw73xx-0x";
20 }; 20 };
21 21
22 &gpio4 { 22 &gpio4 {
23 rs485-en-hog { !! 23 rs485_en {
24 gpio-hog; 24 gpio-hog;
25 gpios = <0 GPIO_ACTIVE_HIGH>; 25 gpios = <0 GPIO_ACTIVE_HIGH>;
26 output-low; 26 output-low;
27 line-name = "rs485_en"; 27 line-name = "rs485_en";
28 }; 28 };
29 }; 29 };
30 30
31 &uart2 { 31 &uart2 {
32 pinctrl-names = "default"; 32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_uart2>; 33 pinctrl-0 = <&pinctrl_uart2>;
34 rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW 34 rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
35 cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW 35 cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
36 status = "okay"; 36 status = "okay";
37 }; 37 };
38 38
39 &uart4 { 39 &uart4 {
40 status = "disabled"; 40 status = "disabled";
41 }; 41 };
42 42
43 &iomuxc { 43 &iomuxc {
44 pinctrl_uart2: uart2grp { 44 pinctrl_uart2: uart2grp {
45 fsl,pins = < 45 fsl,pins = <
46 MX8MM_IOMUXC_UART2_RXD 46 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
47 MX8MM_IOMUXC_UART2_TXD 47 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
48 MX8MM_IOMUXC_UART4_TXD 48 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
49 MX8MM_IOMUXC_UART4_RXD 49 MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x140
50 >; 50 >;
51 }; 51 };
52 }; 52 };
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