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Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mn-bsh-smm-s2.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8mn-bsh-smm-s2.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/freescale/imx8mn-bsh-smm-s2.dts (Version linux-6.9.12)


  1 // SPDX-License-Identifier: GPL-2.0+                1 // SPDX-License-Identifier: GPL-2.0+
  2 /*                                                  2 /*
  3  * Copyright 2021 Collabora Ltd.                    3  * Copyright 2021 Collabora Ltd.
  4  * Copyright 2021 BSH Hausgeraete GmbH              4  * Copyright 2021 BSH Hausgeraete GmbH
  5  */                                                 5  */
  6                                                     6 
  7 /dts-v1/;                                           7 /dts-v1/;
  8                                                     8 
  9 #include "imx8mn-bsh-smm-s2-common.dtsi"            9 #include "imx8mn-bsh-smm-s2-common.dtsi"
 10                                                    10 
 11 / {                                                11 / {
 12         model = "BSH SMM S2";                      12         model = "BSH SMM S2";
 13         compatible = "bsh,imx8mn-bsh-smm-s2",      13         compatible = "bsh,imx8mn-bsh-smm-s2", "fsl,imx8mn";
 14                                                    14 
 15         memory@40000000 {                          15         memory@40000000 {
 16                 device_type = "memory";            16                 device_type = "memory";
 17                 reg = <0x0 0x40000000 0x0 0x10     17                 reg = <0x0 0x40000000 0x0 0x10000000>;
 18         };                                         18         };
 19 };                                                 19 };
 20                                                    20 
 21 &gpmi {                                            21 &gpmi {
 22         pinctrl-names = "default";                 22         pinctrl-names = "default";
 23         pinctrl-0 = <&pinctrl_gpmi_nand>;          23         pinctrl-0 = <&pinctrl_gpmi_nand>;
 24         status = "okay";                           24         status = "okay";
 25 };                                                 25 };
 26                                                    26 
 27 &iomuxc {                                          27 &iomuxc {
 28         pinctrl_gpmi_nand: gpminandgrp {           28         pinctrl_gpmi_nand: gpminandgrp {
 29                 fsl,pins = <                       29                 fsl,pins = <
 30                         MX8MN_IOMUXC_NAND_ALE_     30                         MX8MN_IOMUXC_NAND_ALE_RAWNAND_ALE               0x00000096
 31                         MX8MN_IOMUXC_NAND_CE0_     31                         MX8MN_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B           0x00000096
 32                         MX8MN_IOMUXC_NAND_CLE_     32                         MX8MN_IOMUXC_NAND_CLE_RAWNAND_CLE               0x00000096
 33                         MX8MN_IOMUXC_NAND_DATA     33                         MX8MN_IOMUXC_NAND_DATA00_RAWNAND_DATA00         0x00000096
 34                         MX8MN_IOMUXC_NAND_DATA     34                         MX8MN_IOMUXC_NAND_DATA01_RAWNAND_DATA01         0x00000096
 35                         MX8MN_IOMUXC_NAND_DATA     35                         MX8MN_IOMUXC_NAND_DATA02_RAWNAND_DATA02         0x00000096
 36                         MX8MN_IOMUXC_NAND_DATA     36                         MX8MN_IOMUXC_NAND_DATA03_RAWNAND_DATA03         0x00000096
 37                         MX8MN_IOMUXC_NAND_DATA     37                         MX8MN_IOMUXC_NAND_DATA04_RAWNAND_DATA04         0x00000096
 38                         MX8MN_IOMUXC_NAND_DATA     38                         MX8MN_IOMUXC_NAND_DATA05_RAWNAND_DATA05         0x00000096
 39                         MX8MN_IOMUXC_NAND_DATA     39                         MX8MN_IOMUXC_NAND_DATA06_RAWNAND_DATA06         0x00000096
 40                         MX8MN_IOMUXC_NAND_DATA     40                         MX8MN_IOMUXC_NAND_DATA07_RAWNAND_DATA07         0x00000096
 41                         MX8MN_IOMUXC_NAND_RE_B     41                         MX8MN_IOMUXC_NAND_RE_B_RAWNAND_RE_B             0x00000096
 42                         MX8MN_IOMUXC_NAND_READ     42                         MX8MN_IOMUXC_NAND_READY_B_RAWNAND_READY_B       0x00000056
 43                         MX8MN_IOMUXC_NAND_WE_B     43                         MX8MN_IOMUXC_NAND_WE_B_RAWNAND_WE_B             0x00000096
 44                         MX8MN_IOMUXC_NAND_WP_B     44                         MX8MN_IOMUXC_NAND_WP_B_RAWNAND_WP_B             0x00000096
 45                 >;                                 45                 >;
 46         };                                         46         };
 47 };                                                 47 };
                                                      

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