1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include "imx8mn.dtsi"
6 #include "imx8mn-evk.dtsi"
7 #include <dt-bindings/interrupt-controller/irq
8
9 / {
10 model = "NXP i.MX8MNano DDR3L EVK boar
11 compatible = "fsl,imx8mn-ddr3l-evk", "
12 };
13
14 &A53_0 {
15 cpu-supply = <&buck1>;
16 };
17
18 &A53_1 {
19 cpu-supply = <&buck1>;
20 };
21
22 &A53_2 {
23 cpu-supply = <&buck1>;
24 };
25
26 &A53_3 {
27 cpu-supply = <&buck1>;
28 };
29
30 &i2c1 {
31 pmic: pmic@25 {
32 compatible = "nxp,pca9450b";
33 reg = <0x25>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_pmic>;
36 interrupt-parent = <&gpio1>;
37 interrupts = <3 IRQ_TYPE_LEVEL
38
39 regulators {
40 buck1: BUCK1 {
41 regulator-name
42 regulator-min-
43 regulator-max-
44 regulator-boot
45 regulator-alwa
46 regulator-ramp
47 };
48
49 buck4: BUCK4 {
50 regulator-name
51 regulator-min-
52 regulator-max-
53 regulator-boot
54 regulator-alwa
55 };
56
57 buck5: BUCK5 {
58 regulator-name
59 regulator-min-
60 regulator-max-
61 regulator-boot
62 regulator-alwa
63 };
64
65 buck6: BUCK6 {
66 regulator-name
67 regulator-min-
68 regulator-max-
69 regulator-boot
70 regulator-alwa
71 };
72
73 ldo1: LDO1 {
74 regulator-name
75 regulator-min-
76 regulator-max-
77 regulator-boot
78 regulator-alwa
79 };
80
81 ldo2: LDO2 {
82 regulator-name
83 regulator-min-
84 regulator-max-
85 regulator-boot
86 regulator-alwa
87 };
88
89 ldo3: LDO3 {
90 regulator-name
91 regulator-min-
92 regulator-max-
93 regulator-boot
94 regulator-alwa
95 };
96
97 ldo4: LDO4 {
98 regulator-name
99 regulator-min-
100 regulator-max-
101 regulator-boot
102 regulator-alwa
103 };
104
105 ldo5: LDO5 {
106 regulator-name
107 regulator-min-
108 regulator-max-
109 regulator-boot
110 regulator-alwa
111 };
112 };
113 };
114 };
115
116 &i2c2 {
117 hdmi@3d {
118 avdd-supply = <&buck5>;
119 dvdd-supply = <&buck5>;
120 pvdd-supply = <&buck5>;
121 a2vdd-supply = <&buck5>;
122 v1p2-supply = <&buck5>;
123 };
124 };
125
126 &i2c3 {
127 camera@3c {
128 DOVDD-supply = <&buck5>;
129 };
130 };
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