1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright 2019 NXP 3 * Copyright 2019 NXP
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "imx8mn.dtsi" 8 #include "imx8mn.dtsi"
9 #include "imx8mn-evk.dtsi" 9 #include "imx8mn-evk.dtsi"
10 10
11 / { 11 / {
12 model = "NXP i.MX8MNano DDR4 EVK board 12 model = "NXP i.MX8MNano DDR4 EVK board";
13 compatible = "fsl,imx8mn-ddr4-evk", "f 13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
14 }; 14 };
15 15
16 &A53_0 { 16 &A53_0 {
17 cpu-supply = <&buck2_reg>; 17 cpu-supply = <&buck2_reg>;
18 }; 18 };
19 19
20 &A53_1 { 20 &A53_1 {
21 cpu-supply = <&buck2_reg>; 21 cpu-supply = <&buck2_reg>;
22 }; 22 };
23 23
24 &A53_2 { 24 &A53_2 {
25 cpu-supply = <&buck2_reg>; 25 cpu-supply = <&buck2_reg>;
26 }; 26 };
27 27
28 &A53_3 { 28 &A53_3 {
29 cpu-supply = <&buck2_reg>; 29 cpu-supply = <&buck2_reg>;
30 }; 30 };
31 31
32 &ddrc { 32 &ddrc {
33 operating-points-v2 = <&ddrc_opp_table 33 operating-points-v2 = <&ddrc_opp_table>;
34 34
35 ddrc_opp_table: opp-table { 35 ddrc_opp_table: opp-table {
36 compatible = "operating-points 36 compatible = "operating-points-v2";
37 37
38 opp-25000000 { !! 38 opp-25M {
39 opp-hz = /bits/ 64 <25 39 opp-hz = /bits/ 64 <25000000>;
40 }; 40 };
41 41
42 opp-100000000 { !! 42 opp-100M {
43 opp-hz = /bits/ 64 <10 43 opp-hz = /bits/ 64 <100000000>;
44 }; 44 };
45 45
46 opp-600000000 { !! 46 opp-600M {
47 opp-hz = /bits/ 64 <60 47 opp-hz = /bits/ 64 <600000000>;
48 }; 48 };
49 }; 49 };
50 }; 50 };
51 51
52 &i2c1 { 52 &i2c1 {
53 pmic@4b { 53 pmic@4b {
54 compatible = "rohm,bd71847"; 54 compatible = "rohm,bd71847";
55 reg = <0x4b>; 55 reg = <0x4b>;
56 pinctrl-names = "default"; 56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_pmic>; 57 pinctrl-0 = <&pinctrl_pmic>;
58 interrupt-parent = <&gpio1>; 58 interrupt-parent = <&gpio1>;
59 interrupts = <3 IRQ_TYPE_LEVEL 59 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
60 rohm,reset-snvs-powered; 60 rohm,reset-snvs-powered;
61 61
62 #clock-cells = <0>; <<
63 clocks = <&osc_32k>; <<
64 clock-output-names = "clk-32k- <<
65 <<
66 regulators { 62 regulators {
67 buck1_reg: BUCK1 { 63 buck1_reg: BUCK1 {
68 regulator-name 64 regulator-name = "buck1";
69 regulator-min- 65 regulator-min-microvolt = <700000>;
70 regulator-max- 66 regulator-max-microvolt = <1300000>;
71 regulator-boot 67 regulator-boot-on;
72 regulator-alwa 68 regulator-always-on;
73 regulator-ramp 69 regulator-ramp-delay = <1250>;
74 }; 70 };
75 71
76 buck2_reg: BUCK2 { 72 buck2_reg: BUCK2 {
77 regulator-name 73 regulator-name = "buck2";
78 regulator-min- 74 regulator-min-microvolt = <700000>;
79 regulator-max- 75 regulator-max-microvolt = <1300000>;
80 regulator-boot 76 regulator-boot-on;
81 regulator-alwa 77 regulator-always-on;
82 regulator-ramp 78 regulator-ramp-delay = <1250>;
83 }; 79 };
84 80
85 buck3_reg: BUCK3 { 81 buck3_reg: BUCK3 {
86 // BUCK5 in da 82 // BUCK5 in datasheet
87 regulator-name 83 regulator-name = "buck3";
88 regulator-min- 84 regulator-min-microvolt = <700000>;
89 regulator-max- 85 regulator-max-microvolt = <1350000>;
90 }; 86 };
91 87
92 buck4_reg: BUCK4 { 88 buck4_reg: BUCK4 {
93 // BUCK6 in da 89 // BUCK6 in datasheet
94 regulator-name 90 regulator-name = "buck4";
95 regulator-min- 91 regulator-min-microvolt = <3000000>;
96 regulator-max- 92 regulator-max-microvolt = <3300000>;
97 regulator-boot 93 regulator-boot-on;
98 regulator-alwa 94 regulator-always-on;
99 }; 95 };
100 96
101 buck5_reg: BUCK5 { 97 buck5_reg: BUCK5 {
102 // BUCK7 in da 98 // BUCK7 in datasheet
103 regulator-name 99 regulator-name = "buck5";
104 regulator-min- 100 regulator-min-microvolt = <1605000>;
105 regulator-max- 101 regulator-max-microvolt = <1995000>;
106 regulator-boot 102 regulator-boot-on;
107 regulator-alwa 103 regulator-always-on;
108 }; 104 };
109 105
110 buck6_reg: BUCK6 { 106 buck6_reg: BUCK6 {
111 // BUCK8 in da 107 // BUCK8 in datasheet
112 regulator-name 108 regulator-name = "buck6";
113 regulator-min- 109 regulator-min-microvolt = <800000>;
114 regulator-max- 110 regulator-max-microvolt = <1400000>;
115 regulator-boot 111 regulator-boot-on;
116 regulator-alwa 112 regulator-always-on;
117 }; 113 };
118 114
119 ldo1_reg: LDO1 { 115 ldo1_reg: LDO1 {
120 regulator-name 116 regulator-name = "ldo1";
121 regulator-min- 117 regulator-min-microvolt = <1600000>;
122 regulator-max- 118 regulator-max-microvolt = <3300000>;
123 regulator-boot 119 regulator-boot-on;
124 regulator-alwa 120 regulator-always-on;
125 }; 121 };
126 122
127 ldo2_reg: LDO2 { 123 ldo2_reg: LDO2 {
128 regulator-name 124 regulator-name = "ldo2";
129 regulator-min- 125 regulator-min-microvolt = <800000>;
130 regulator-max- 126 regulator-max-microvolt = <900000>;
131 regulator-boot 127 regulator-boot-on;
132 regulator-alwa 128 regulator-always-on;
133 }; 129 };
134 130
135 ldo3_reg: LDO3 { 131 ldo3_reg: LDO3 {
136 regulator-name 132 regulator-name = "ldo3";
137 regulator-min- 133 regulator-min-microvolt = <1800000>;
138 regulator-max- 134 regulator-max-microvolt = <3300000>;
139 regulator-boot 135 regulator-boot-on;
140 regulator-alwa 136 regulator-always-on;
141 }; 137 };
142 138
143 ldo4_reg: LDO4 { 139 ldo4_reg: LDO4 {
144 regulator-name 140 regulator-name = "ldo4";
145 regulator-min- 141 regulator-min-microvolt = <900000>;
146 regulator-max- 142 regulator-max-microvolt = <1800000>;
147 regulator-boot 143 regulator-boot-on;
148 regulator-alwa 144 regulator-always-on;
149 }; 145 };
150 146
151 ldo6_reg: LDO6 { 147 ldo6_reg: LDO6 {
152 regulator-name 148 regulator-name = "ldo6";
153 regulator-min- 149 regulator-min-microvolt = <900000>;
154 regulator-max- 150 regulator-max-microvolt = <1800000>;
155 regulator-boot 151 regulator-boot-on;
156 regulator-alwa 152 regulator-always-on;
157 }; 153 };
158 }; 154 };
159 }; <<
160 }; <<
161 <<
162 &i2c2 { <<
163 hdmi@3d { <<
164 avdd-supply = <&buck5_reg>; <<
165 dvdd-supply = <&buck5_reg>; <<
166 pvdd-supply = <&buck5_reg>; <<
167 a2vdd-supply = <&buck5_reg>; <<
168 v1p2-supply = <&buck5_reg>; <<
169 }; <<
170 }; <<
171 <<
172 &i2c3 { <<
173 camera@3c { <<
174 DOVDD-supply = <&buck5_reg>; <<
175 }; 155 };
176 }; 156 };
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