1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright 2023 Logic PD, Inc dba Beacon Emb 3 * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include <dt-bindings/usb/pd.h> 8 #include <dt-bindings/usb/pd.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h> 9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include "imx8mp.dtsi" 10 #include "imx8mp.dtsi"
11 #include "imx8mp-beacon-som.dtsi" 11 #include "imx8mp-beacon-som.dtsi"
12 12
13 / { 13 / {
14 model = "Beacon EmbeddedWorks i.MX8MPl 14 model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
15 compatible = "beacon,imx8mp-beacon-kit 15 compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
16 16
17 aliases { 17 aliases {
18 ethernet0 = &eqos; 18 ethernet0 = &eqos;
19 ethernet1 = &fec; 19 ethernet1 = &fec;
20 }; 20 };
21 21
22 chosen { 22 chosen {
23 stdout-path = &uart2; 23 stdout-path = &uart2;
24 }; 24 };
25 25
26 clk_xtal25: clock-xtal25 { <<
27 compatible = "fixed-clock"; <<
28 #clock-cells = <0>; <<
29 clock-frequency = <25000000>; <<
30 }; <<
31 <<
32 connector { 26 connector {
33 compatible = "usb-c-connector" 27 compatible = "usb-c-connector";
34 label = "USB-C"; 28 label = "USB-C";
35 data-role = "dual"; 29 data-role = "dual";
36 30
37 ports { 31 ports {
38 #address-cells = <1>; 32 #address-cells = <1>;
39 #size-cells = <0>; 33 #size-cells = <0>;
40 34
41 port@0 { 35 port@0 {
42 reg = <0>; 36 reg = <0>;
43 37
44 hs_ep: endpoin 38 hs_ep: endpoint {
45 remote 39 remote-endpoint = <&usb3_hs_ep>;
46 }; 40 };
47 }; 41 };
48 port@1 { 42 port@1 {
49 reg = <1>; 43 reg = <1>;
50 44
51 ss_ep: endpoin 45 ss_ep: endpoint {
52 remote 46 remote-endpoint = <&hd3ss3220_in_ep>;
53 }; 47 };
54 }; 48 };
55 }; 49 };
56 }; 50 };
57 51
58 dmic_codec: dmic-codec { <<
59 compatible = "dmic-codec"; <<
60 num-channels = <1>; <<
61 #sound-dai-cells = <0>; <<
62 }; <<
63 <<
64 gpio-keys { 52 gpio-keys {
65 compatible = "gpio-keys"; 53 compatible = "gpio-keys";
66 autorepeat; 54 autorepeat;
67 55
68 button-0 { 56 button-0 {
69 label = "btn0"; 57 label = "btn0";
70 linux,code = <BTN_0>; 58 linux,code = <BTN_0>;
71 gpios = <&pca6416_1 12 59 gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
72 wakeup-source; 60 wakeup-source;
73 }; 61 };
74 62
75 button-1 { 63 button-1 {
76 label = "btn1"; 64 label = "btn1";
77 linux,code = <BTN_1>; 65 linux,code = <BTN_1>;
78 gpios = <&pca6416_1 13 66 gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
79 wakeup-source; 67 wakeup-source;
80 }; 68 };
81 69
82 button-2 { 70 button-2 {
83 label = "btn2"; 71 label = "btn2";
84 linux,code = <BTN_2>; 72 linux,code = <BTN_2>;
85 gpios = <&pca6416_1 14 73 gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
86 wakeup-source; 74 wakeup-source;
87 }; 75 };
88 76
89 button-3 { 77 button-3 {
90 label = "btn3"; 78 label = "btn3";
91 linux,code = <BTN_3>; 79 linux,code = <BTN_3>;
92 gpios = <&pca6416_1 15 80 gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
93 wakeup-source; 81 wakeup-source;
94 }; 82 };
95 }; 83 };
96 84
97 bridge-connector { <<
98 compatible = "hdmi-connector"; <<
99 type = "a"; <<
100 <<
101 port { <<
102 hdmi_con: endpoint { <<
103 remote-endpoin <<
104 }; <<
105 }; <<
106 }; <<
107 <<
108 hdmi-connector { <<
109 compatible = "hdmi-connector"; <<
110 type = "a"; <<
111 <<
112 port { <<
113 hdmi_connector: endpoi <<
114 remote-endpoin <<
115 }; <<
116 }; <<
117 }; <<
118 <<
119 leds { 85 leds {
120 compatible = "gpio-leds"; 86 compatible = "gpio-leds";
121 pinctrl-names = "default"; 87 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_led3>; 88 pinctrl-0 = <&pinctrl_led3>;
123 89
124 led-0 { 90 led-0 {
125 label = "gen_led0"; 91 label = "gen_led0";
126 gpios = <&pca6416_1 4 92 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
127 default-state = "off"; 93 default-state = "off";
128 }; 94 };
129 95
130 led-1 { 96 led-1 {
131 label = "gen_led1"; 97 label = "gen_led1";
132 gpios = <&pca6416_1 5 98 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
133 default-state = "off"; 99 default-state = "off";
134 }; 100 };
135 101
136 led-2 { 102 led-2 {
137 label = "gen_led2"; 103 label = "gen_led2";
138 gpios = <&pca6416_1 6 104 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
139 default-state = "off"; 105 default-state = "off";
140 }; 106 };
141 107
142 led-3 { 108 led-3 {
143 label = "heartbeat"; 109 label = "heartbeat";
144 gpios = <&gpio4 28 GPI 110 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
145 linux,default-trigger 111 linux,default-trigger = "heartbeat";
146 }; 112 };
147 }; 113 };
148 114
149 reg_audio: regulator-wm8962 { !! 115 pcie0_refclk: clock-pcie {
150 compatible = "regulator-fixed" !! 116 compatible = "fixed-clock";
151 regulator-name = "3v3_aud"; !! 117 #clock-cells = <0>;
152 regulator-min-microvolt = <330 !! 118 clock-frequency = <100000000>;
153 regulator-max-microvolt = <330 <<
154 gpio = <&pca6416_1 11 GPIO_ACT <<
155 enable-active-high; <<
156 }; 119 };
157 120
158 reg_usdhc2_vmmc: regulator-usdhc2 { 121 reg_usdhc2_vmmc: regulator-usdhc2 {
159 compatible = "regulator-fixed" 122 compatible = "regulator-fixed";
160 regulator-name = "VSD_3V3"; 123 regulator-name = "VSD_3V3";
161 regulator-min-microvolt = <330 124 regulator-min-microvolt = <3300000>;
162 regulator-max-microvolt = <330 125 regulator-max-microvolt = <3300000>;
163 gpio = <&gpio2 19 GPIO_ACTIVE_ 126 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
164 enable-active-high; 127 enable-active-high;
165 startup-delay-us = <100>; 128 startup-delay-us = <100>;
166 off-on-delay-us = <20000>; 129 off-on-delay-us = <20000>;
167 }; 130 };
168 131
169 reg_usb1_host_vbus: regulator-usb1-vbu 132 reg_usb1_host_vbus: regulator-usb1-vbus {
170 compatible = "regulator-fixed" 133 compatible = "regulator-fixed";
171 regulator-name = "usb1_host_vb 134 regulator-name = "usb1_host_vbus";
172 regulator-max-microvolt = <500 135 regulator-max-microvolt = <5000000>;
173 regulator-min-microvolt = <500 136 regulator-min-microvolt = <5000000>;
174 gpio = <&pca6416_1 0 GPIO_ACTI 137 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
175 enable-active-high; 138 enable-active-high;
176 }; 139 };
177 <<
178 sound-adv7535 { <<
179 compatible = "simple-audio-car <<
180 simple-audio-card,name = "soun <<
181 simple-audio-card,format = "i2 <<
182 <<
183 simple-audio-card,cpu { <<
184 sound-dai = <&sai5>; <<
185 system-clock-direction <<
186 }; <<
187 <<
188 simple-audio-card,codec { <<
189 sound-dai = <&adv_brid <<
190 }; <<
191 }; <<
192 <<
193 sound-dmic { <<
194 compatible = "simple-audio-car <<
195 simple-audio-card,name = "soun <<
196 simple-audio-card,format = "i2 <<
197 simple-audio-card,bitclock-mas <<
198 simple-audio-card,frame-master <<
199 <<
200 dailink_master: simple-audio-c <<
201 sound-dai = <&micfil>; <<
202 }; <<
203 <<
204 simple-audio-card,codec { <<
205 sound-dai = <&dmic_cod <<
206 }; <<
207 }; <<
208 <<
209 sound-wm8962 { <<
210 compatible = "simple-audio-car <<
211 simple-audio-card,name = "wm89 <<
212 simple-audio-card,format = "i2 <<
213 simple-audio-card,widgets = "H <<
214 "M <<
215 "S <<
216 simple-audio-card,routing = "H <<
217 "H <<
218 "S <<
219 "S <<
220 "H <<
221 "I <<
222 <<
223 simple-audio-card,cpu { <<
224 sound-dai = <&sai3>; <<
225 frame-master; <<
226 bitclock-master; <<
227 }; <<
228 <<
229 simple-audio-card,codec { <<
230 sound-dai = <&wm8962>; <<
231 }; <<
232 }; <<
233 }; <<
234 <<
235 &audio_blk_ctrl { <<
236 assigned-clocks = <&clk IMX8MP_AUDIO_P <<
237 assigned-clock-rates = <393216000>, <1 <<
238 }; 140 };
239 141
240 &ecspi2 { 142 &ecspi2 {
241 pinctrl-names = "default"; 143 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_ecspi2>; 144 pinctrl-0 = <&pinctrl_ecspi2>;
243 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW> 145 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
244 status = "okay"; 146 status = "okay";
245 147
246 tpm: tpm@0 { 148 tpm: tpm@0 {
247 compatible = "infineon,slb9670 !! 149 compatible = "infineon,slb9670";
248 reg = <0>; 150 reg = <0>;
249 pinctrl-names = "default"; 151 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_tpm>; 152 pinctrl-0 = <&pinctrl_tpm>;
251 reset-gpios = <&gpio4 0 GPIO_A 153 reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
252 spi-max-frequency = <18500000> 154 spi-max-frequency = <18500000>;
253 }; 155 };
254 }; 156 };
255 157
256 &fec { 158 &fec {
257 pinctrl-names = "default"; 159 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_fec>; 160 pinctrl-0 = <&pinctrl_fec>;
259 phy-mode = "rgmii-id"; 161 phy-mode = "rgmii-id";
260 phy-handle = <ðphy1>; 162 phy-handle = <ðphy1>;
261 fsl,magic-packet; 163 fsl,magic-packet;
262 status = "okay"; 164 status = "okay";
263 165
264 mdio { 166 mdio {
265 #address-cells = <1>; 167 #address-cells = <1>;
266 #size-cells = <0>; 168 #size-cells = <0>;
267 169
268 ethphy1: ethernet-phy@3 { 170 ethphy1: ethernet-phy@3 {
269 compatible = "ethernet 171 compatible = "ethernet-phy-id0022.1640",
270 "ethernet 172 "ethernet-phy-ieee802.3-c22";
271 reg = <3>; 173 reg = <3>;
272 reset-gpios = <&gpio4 174 reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
273 reset-assert-us = <100 175 reset-assert-us = <10000>;
274 reset-deassert-us = <1 176 reset-deassert-us = <150000>;
275 interrupt-parent = <&g 177 interrupt-parent = <&gpio4>;
276 interrupts = <2 IRQ_TY 178 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
277 }; 179 };
278 }; 180 };
279 }; 181 };
280 182
281 &flexcan1 { 183 &flexcan1 {
282 pinctrl-names = "default"; 184 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_flexcan1>; 185 pinctrl-0 = <&pinctrl_flexcan1>;
284 status = "okay"; 186 status = "okay";
285 }; 187 };
286 188
287 &gpio2 { 189 &gpio2 {
288 usb-mux-hog { 190 usb-mux-hog {
289 gpio-hog; 191 gpio-hog;
290 gpios = <20 0>; 192 gpios = <20 0>;
291 output-low; 193 output-low;
292 line-name = "USB-C Mux En"; 194 line-name = "USB-C Mux En";
293 }; 195 };
294 }; 196 };
295 197
296 &hdmi_tx { <<
297 pinctrl-names = "default"; <<
298 pinctrl-0 = <&pinctrl_hdmi>; <<
299 status = "okay"; <<
300 <<
301 ports { <<
302 port@1 { <<
303 reg = <1>; <<
304 <<
305 hdmi_to_connector:endp <<
306 remote-endpoin <<
307 }; <<
308 }; <<
309 }; <<
310 }; <<
311 <<
312 &hdmi_tx_phy { <<
313 status = "okay"; <<
314 }; <<
315 <<
316 &i2c2 { 198 &i2c2 {
317 clock-frequency = <384000>; 199 clock-frequency = <384000>;
318 pinctrl-names = "default"; 200 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_i2c2>; 201 pinctrl-0 = <&pinctrl_i2c2>;
320 status = "okay"; 202 status = "okay";
321 203
322 pca6416_3: gpio@20 { 204 pca6416_3: gpio@20 {
323 compatible = "nxp,pcal6416"; 205 compatible = "nxp,pcal6416";
324 reg = <0x20>; 206 reg = <0x20>;
325 gpio-controller; 207 gpio-controller;
326 #gpio-cells = <2>; 208 #gpio-cells = <2>;
327 interrupt-parent = <&gpio4>; 209 interrupt-parent = <&gpio4>;
328 interrupts = <27 IRQ_TYPE_EDGE 210 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
329 interrupt-controller; 211 interrupt-controller;
330 #interrupt-cells = <2>; 212 #interrupt-cells = <2>;
331 }; 213 };
332 <<
333 adv_bridge: hdmi@3d { <<
334 compatible = "adi,adv7535"; <<
335 reg = <0x3d>; <<
336 reg-names = "main"; <<
337 interrupt-parent = <&gpio4>; <<
338 interrupts = <27 IRQ_TYPE_EDGE <<
339 adi,dsi-lanes = <4>; <<
340 #sound-dai-cells = <0>; <<
341 avdd-supply = <&buck5>; <<
342 dvdd-supply = <&buck5>; <<
343 pvdd-supply = <&buck5>; <<
344 a2vdd-supply = <&buck5>; <<
345 v1p2-supply = <&buck5>; <<
346 v3p3-supply = <&buck4>; <<
347 <<
348 ports { <<
349 #address-cells = <1>; <<
350 #size-cells = <0>; <<
351 <<
352 port@0 { <<
353 reg = <0>; <<
354 <<
355 adv7535_in: en <<
356 remote <<
357 }; <<
358 }; <<
359 <<
360 port@1 { <<
361 reg = <1>; <<
362 <<
363 adv7535_out: e <<
364 remote <<
365 }; <<
366 }; <<
367 }; <<
368 }; <<
369 <<
370 pcieclk: clock-generator@68 { <<
371 compatible = "renesas,9fgv0241 <<
372 reg = <0x68>; <<
373 clocks = <&clk_xtal25>; <<
374 #clock-cells = <1>; <<
375 }; <<
376 }; <<
377 <<
378 &hdmi_pvi { <<
379 status = "okay"; <<
380 }; 214 };
381 215
382 &i2c3 { 216 &i2c3 {
383 /* Connected to USB Hub */ 217 /* Connected to USB Hub */
384 usb-typec@52 { 218 usb-typec@52 {
385 compatible = "nxp,ptn5110", "t !! 219 compatible = "nxp,ptn5110";
386 reg = <0x52>; 220 reg = <0x52>;
387 pinctrl-names = "default"; 221 pinctrl-names = "default";
388 pinctrl-0 = <&pinctrl_typec>; 222 pinctrl-0 = <&pinctrl_typec>;
389 interrupt-parent = <&gpio4>; 223 interrupt-parent = <&gpio4>;
390 interrupts = <1 IRQ_TYPE_LEVEL 224 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
391 225
392 connector { 226 connector {
393 compatible = "usb-c-co 227 compatible = "usb-c-connector";
394 label = "USB-C"; 228 label = "USB-C";
395 power-role = "source"; 229 power-role = "source";
396 data-role = "host"; 230 data-role = "host";
397 source-pdos = <PDO_FIX 231 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
398 }; 232 };
399 }; 233 };
400 }; 234 };
401 235
402 &i2c4 { 236 &i2c4 {
403 pinctrl-names = "default"; 237 pinctrl-names = "default";
404 pinctrl-0 = <&pinctrl_i2c4>; 238 pinctrl-0 = <&pinctrl_i2c4>;
405 clock-frequency = <384000>; 239 clock-frequency = <384000>;
406 status = "okay"; 240 status = "okay";
407 241
408 wm8962: audio-codec@1a { <<
409 compatible = "wlf,wm8962"; <<
410 reg = <0x1a>; <<
411 pinctrl-names = "default"; <<
412 pinctrl-0 = <&pinctrl_wm8962>; <<
413 clocks = <&clk IMX8MP_CLK_IPP_ <<
414 assigned-clocks = <&clk IMX8MP <<
415 assigned-clock-parents = <&clk <<
416 assigned-clock-rates = <225760 <<
417 DCVDD-supply = <®_audio>; <<
418 DBVDD-supply = <®_audio>; <<
419 AVDD-supply = <®_audio>; <<
420 CPVDD-supply = <®_audio>; <<
421 MICVDD-supply = <®_audio>; <<
422 PLLVDD-supply = <®_audio>; <<
423 SPKVDD1-supply = <®_audio>; <<
424 SPKVDD2-supply = <®_audio>; <<
425 gpio-cfg = < <<
426 0x0000 /* 0:Default */ <<
427 0x0000 /* 1:Default */ <<
428 0x0000 /* 2:FN_DMICCLK <<
429 0x0000 /* 3:Default */ <<
430 0x0000 /* 4:FN_DMICCDA <<
431 0x0000 /* 5:Default */ <<
432 >; <<
433 #sound-dai-cells = <0>; <<
434 }; <<
435 <<
436 pca6416: gpio@20 { 242 pca6416: gpio@20 {
437 compatible = "nxp,pcal6416"; 243 compatible = "nxp,pcal6416";
438 reg = <0x20>; 244 reg = <0x20>;
439 pinctrl-names = "default"; 245 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_pcal6414 246 pinctrl-0 = <&pinctrl_pcal6414>;
441 gpio-controller; 247 gpio-controller;
442 #gpio-cells = <2>; 248 #gpio-cells = <2>;
443 interrupt-parent = <&gpio4>; 249 interrupt-parent = <&gpio4>;
444 interrupts = <27 IRQ_TYPE_EDGE 250 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
445 interrupt-controller; 251 interrupt-controller;
446 #interrupt-cells = <2>; 252 #interrupt-cells = <2>;
447 }; 253 };
448 254
449 pca6416_1: gpio@21 { 255 pca6416_1: gpio@21 {
450 compatible = "nxp,pcal6416"; 256 compatible = "nxp,pcal6416";
451 reg = <0x21>; 257 reg = <0x21>;
452 gpio-controller; 258 gpio-controller;
453 #gpio-cells = <2>; 259 #gpio-cells = <2>;
454 interrupt-parent = <&gpio4>; 260 interrupt-parent = <&gpio4>;
455 interrupts = <27 IRQ_TYPE_EDGE 261 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
456 interrupt-controller; 262 interrupt-controller;
457 #interrupt-cells = <2>; 263 #interrupt-cells = <2>;
458 264
459 usb-hub-hog { 265 usb-hub-hog {
460 gpio-hog; 266 gpio-hog;
461 gpios = <7 0>; 267 gpios = <7 0>;
462 output-low; 268 output-low;
463 line-name = "USB Hub E 269 line-name = "USB Hub Enable";
464 }; 270 };
465 }; 271 };
466 272
467 usb-typec@47 { 273 usb-typec@47 {
468 compatible = "ti,hd3ss3220"; 274 compatible = "ti,hd3ss3220";
469 reg = <0x47>; 275 reg = <0x47>;
470 pinctrl-names = "default"; 276 pinctrl-names = "default";
471 pinctrl-0 = <&pinctrl_hd3ss322 277 pinctrl-0 = <&pinctrl_hd3ss3220>;
472 interrupt-parent = <&gpio4>; 278 interrupt-parent = <&gpio4>;
473 interrupts = <19 IRQ_TYPE_LEVE 279 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
474 280
475 ports { 281 ports {
476 #address-cells = <1>; 282 #address-cells = <1>;
477 #size-cells = <0>; 283 #size-cells = <0>;
478 284
479 port@0 { 285 port@0 {
480 reg = <0>; 286 reg = <0>;
481 287
482 hd3ss3220_in_e 288 hd3ss3220_in_ep: endpoint {
483 remote 289 remote-endpoint = <&ss_ep>;
484 }; 290 };
485 }; 291 };
486 292
487 port@1 { 293 port@1 {
488 reg = <1>; 294 reg = <1>;
489 295
490 hd3ss3220_out_ 296 hd3ss3220_out_ep: endpoint {
491 remote 297 remote-endpoint = <&usb3_role_switch>;
492 }; 298 };
493 }; 299 };
494 }; 300 };
495 }; 301 };
496 }; 302 };
497 303
498 &lcdif1 { <<
499 status = "okay"; <<
500 }; <<
501 <<
502 &lcdif3 { <<
503 status = "okay"; <<
504 }; <<
505 <<
506 &micfil { <<
507 pinctrl-names = "default"; <<
508 pinctrl-0 = <&pinctrl_pdm>; <<
509 assigned-clocks = <&clk IMX8MP_CLK_PDM <<
510 assigned-clock-parents = <&clk IMX8MP_ <<
511 assigned-clock-rates = <49152000>; <<
512 status = "okay"; <<
513 }; <<
514 <<
515 &mipi_dsi { <<
516 samsung,esc-clock-frequency = <1000000 <<
517 status = "okay"; <<
518 <<
519 ports { <<
520 port@1 { <<
521 reg = <1>; <<
522 <<
523 dsi_out: endpoint { <<
524 remote-endpoin <<
525 }; <<
526 }; <<
527 }; <<
528 }; <<
529 <<
530 &pcie { 304 &pcie {
531 pinctrl-names = "default"; 305 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_pcie>; 306 pinctrl-0 = <&pinctrl_pcie>;
533 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LO 307 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
534 status = "okay"; 308 status = "okay";
535 }; 309 };
536 310
537 &pcie_phy { 311 &pcie_phy {
538 fsl,clkreq-unsupported; <<
539 fsl,refclk-pad-mode = <IMX8_PCIE_REFCL 312 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
540 clocks = <&pcieclk 1>; !! 313 clocks = <&pcie0_refclk>;
541 clock-names = "ref"; 314 clock-names = "ref";
542 status = "okay"; 315 status = "okay";
543 }; 316 };
544 317
545 &sai3 { <<
546 pinctrl-names = "default"; <<
547 pinctrl-0 = <&pinctrl_sai3>; <<
548 assigned-clocks = <&clk IMX8MP_CLK_SAI <<
549 assigned-clock-parents = <&clk IMX8MP_ <<
550 assigned-clock-rates = <12288000>; <<
551 fsl,sai-mclk-direction-output; <<
552 status = "okay"; <<
553 }; <<
554 <<
555 &sai5 { <<
556 pinctrl-names = "default"; <<
557 pinctrl-0 = <&pinctrl_sai5>; <<
558 assigned-clocks = <&clk IMX8MP_CLK_SAI <<
559 assigned-clock-parents = <&clk IMX8MP_ <<
560 assigned-clock-rates = <12288000>; <<
561 fsl,sai-mclk-direction-output; <<
562 status = "okay"; <<
563 }; <<
564 <<
565 &snvs_pwrkey { 318 &snvs_pwrkey {
566 status = "okay"; 319 status = "okay";
567 }; 320 };
568 321
569 &uart2 { 322 &uart2 {
570 pinctrl-names = "default"; 323 pinctrl-names = "default";
571 pinctrl-0 = <&pinctrl_uart2>; 324 pinctrl-0 = <&pinctrl_uart2>;
572 status = "okay"; 325 status = "okay";
573 }; 326 };
574 327
575 &uart3 { 328 &uart3 {
576 pinctrl-names = "default"; 329 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_uart3>; 330 pinctrl-0 = <&pinctrl_uart3>;
578 assigned-clocks = <&clk IMX8MP_CLK_UAR 331 assigned-clocks = <&clk IMX8MP_CLK_UART3>;
579 assigned-clock-parents = <&clk IMX8MP_ 332 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
580 uart-has-rtscts; 333 uart-has-rtscts;
581 status = "okay"; 334 status = "okay";
582 }; 335 };
583 336
584 &usb3_0 { 337 &usb3_0 {
585 status = "okay"; 338 status = "okay";
586 }; 339 };
587 340
588 &usb_dwc3_0 { 341 &usb_dwc3_0 {
589 dr_mode = "otg"; 342 dr_mode = "otg";
590 hnp-disable; 343 hnp-disable;
591 srp-disable; 344 srp-disable;
592 adp-disable; 345 adp-disable;
593 usb-role-switch; 346 usb-role-switch;
594 status = "okay"; 347 status = "okay";
595 348
596 ports { 349 ports {
597 #address-cells = <1>; 350 #address-cells = <1>;
598 #size-cells = <0>; 351 #size-cells = <0>;
599 352
600 port@0 { 353 port@0 {
601 reg = <0>; 354 reg = <0>;
602 usb3_hs_ep: endpoint { 355 usb3_hs_ep: endpoint {
603 remote-endpoin 356 remote-endpoint = <&hs_ep>;
604 }; 357 };
605 }; 358 };
606 port@1 { 359 port@1 {
607 reg = <1>; 360 reg = <1>;
608 usb3_role_switch: endp 361 usb3_role_switch: endpoint {
609 remote-endpoin 362 remote-endpoint = <&hd3ss3220_out_ep>;
610 }; 363 };
611 }; 364 };
612 }; 365 };
613 }; 366 };
614 367
615 &usb3_phy0 { 368 &usb3_phy0 {
616 vbus-supply = <®_usb1_host_vbus>; 369 vbus-supply = <®_usb1_host_vbus>;
617 status = "okay"; 370 status = "okay";
618 }; 371 };
619 372
620 &usb3_1 { 373 &usb3_1 {
621 status = "okay"; 374 status = "okay";
622 }; 375 };
623 376
624 &usb_dwc3_1 { 377 &usb_dwc3_1 {
625 dr_mode = "host"; 378 dr_mode = "host";
626 status = "okay"; 379 status = "okay";
627 }; 380 };
628 381
629 &usb3_phy1 { 382 &usb3_phy1 {
630 status = "okay"; 383 status = "okay";
631 }; 384 };
632 385
633 &usdhc2 { 386 &usdhc2 {
634 pinctrl-names = "default", "state_100m 387 pinctrl-names = "default", "state_100mhz", "state_200mhz";
635 pinctrl-0 = <&pinctrl_usdhc2>, <&pinct 388 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
636 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, 389 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
637 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, 390 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
638 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW> 391 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
639 vmmc-supply = <®_usdhc2_vmmc>; 392 vmmc-supply = <®_usdhc2_vmmc>;
640 bus-width = <4>; 393 bus-width = <4>;
641 status = "okay"; 394 status = "okay";
642 }; 395 };
643 396
644 &iomuxc { 397 &iomuxc {
645 pinctrl_ecspi2: ecspi2grp { 398 pinctrl_ecspi2: ecspi2grp {
646 fsl,pins = < 399 fsl,pins = <
647 MX8MP_IOMUXC_ECSPI2_SC 400 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
648 MX8MP_IOMUXC_ECSPI2_MO 401 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
649 MX8MP_IOMUXC_ECSPI2_MI 402 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
650 MX8MP_IOMUXC_ECSPI2_SS 403 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
651 >; 404 >;
652 }; 405 };
653 406
654 pinctrl_fec: fecgrp { 407 pinctrl_fec: fecgrp {
655 fsl,pins = < 408 fsl,pins = <
656 MX8MP_IOMUXC_SAI1_RXD2 409 MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
657 MX8MP_IOMUXC_SAI1_RXD3 410 MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
658 MX8MP_IOMUXC_SAI1_RXD4 411 MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
659 MX8MP_IOMUXC_SAI1_RXD5 412 MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
660 MX8MP_IOMUXC_SAI1_RXD6 413 MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
661 MX8MP_IOMUXC_SAI1_RXD7 414 MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
662 MX8MP_IOMUXC_SAI1_TXC_ 415 MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
663 MX8MP_IOMUXC_SAI1_TXFS 416 MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
664 MX8MP_IOMUXC_SAI1_TXD0 417 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
665 MX8MP_IOMUXC_SAI1_TXD1 418 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
666 MX8MP_IOMUXC_SAI1_TXD2 419 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
667 MX8MP_IOMUXC_SAI1_TXD3 420 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
668 MX8MP_IOMUXC_SAI1_TXD4 421 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
669 MX8MP_IOMUXC_SAI1_TXD5 422 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
670 MX8MP_IOMUXC_SAI1_RXD0 423 MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
671 MX8MP_IOMUXC_SAI1_TXD6 424 MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
672 >; 425 >;
673 }; 426 };
674 427
675 pinctrl_flexcan1: flexcan1grp { 428 pinctrl_flexcan1: flexcan1grp {
676 fsl,pins = < 429 fsl,pins = <
677 MX8MP_IOMUXC_SPDIF_RX_ 430 MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
678 MX8MP_IOMUXC_SPDIF_TX_ 431 MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
679 >; 432 >;
680 }; 433 };
681 434
682 pinctrl_hd3ss3220: hd3ss3220grp { 435 pinctrl_hd3ss3220: hd3ss3220grp {
683 fsl,pins = < 436 fsl,pins = <
684 MX8MP_IOMUXC_SAI1_TXD7 437 MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
685 >; 438 >;
686 }; 439 };
687 440
688 pinctrl_hdmi: hdmigrp { <<
689 fsl,pins = < <<
690 MX8MP_IOMUXC_HDMI_DDC_ <<
691 MX8MP_IOMUXC_HDMI_DDC_ <<
692 MX8MP_IOMUXC_HDMI_HPD_ <<
693 MX8MP_IOMUXC_HDMI_CEC_ <<
694 >; <<
695 }; <<
696 <<
697 pinctrl_i2c2: i2c2grp { 441 pinctrl_i2c2: i2c2grp {
698 fsl,pins = < 442 fsl,pins = <
699 MX8MP_IOMUXC_I2C2_SCL_ 443 MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
700 MX8MP_IOMUXC_I2C2_SDA_ 444 MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
701 >; 445 >;
702 }; 446 };
703 447
704 pinctrl_i2c4: i2c4grp { 448 pinctrl_i2c4: i2c4grp {
705 fsl,pins = < 449 fsl,pins = <
706 MX8MP_IOMUXC_I2C4_SCL_ 450 MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
707 MX8MP_IOMUXC_I2C4_SDA_ 451 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
708 >; 452 >;
709 }; 453 };
710 454
711 pinctrl_led3: led3grp { 455 pinctrl_led3: led3grp {
712 fsl,pins = < 456 fsl,pins = <
713 MX8MP_IOMUXC_SAI3_RXFS 457 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
714 >; 458 >;
715 }; 459 };
716 460
717 pinctrl_pcal6414: pcal6414-gpiogrp { 461 pinctrl_pcal6414: pcal6414-gpiogrp {
718 fsl,pins = < 462 fsl,pins = <
719 MX8MP_IOMUXC_SAI2_MCLK 463 MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
720 >; 464 >;
721 }; 465 };
722 466
723 pinctrl_pcie: pciegrp { 467 pinctrl_pcie: pciegrp {
724 fsl,pins = < 468 fsl,pins = <
725 MX8MP_IOMUXC_GPIO1_IO0 469 MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
726 MX8MP_IOMUXC_SAI2_RXFS 470 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
727 >; 471 >;
728 }; 472 };
729 473
730 pinctrl_pdm: pdmgrp { <<
731 fsl,pins = < <<
732 MX8MP_IOMUXC_SAI5_RXC_ <<
733 MX8MP_IOMUXC_SAI5_RXD0 <<
734 >; <<
735 }; <<
736 <<
737 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc 474 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
738 fsl,pins = < 475 fsl,pins = <
739 MX8MP_IOMUXC_SD2_RESET 476 MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
740 >; 477 >;
741 }; 478 };
742 479
743 pinctrl_sai3: sai3grp { <<
744 fsl,pins = < <<
745 MX8MP_IOMUXC_SAI3_TXFS <<
746 MX8MP_IOMUXC_SAI3_TXC_ <<
747 MX8MP_IOMUXC_SAI3_RXD_ <<
748 MX8MP_IOMUXC_SAI3_TXD_ <<
749 MX8MP_IOMUXC_SAI3_MCLK <<
750 >; <<
751 }; <<
752 <<
753 pinctrl_sai5: sai5grp { <<
754 fsl,pins = < <<
755 MX8MP_IOMUXC_SAI5_RXD3 <<
756 MX8MP_IOMUXC_SAI5_RXD2 <<
757 MX8MP_IOMUXC_SAI5_RXD1 <<
758 >; <<
759 }; <<
760 <<
761 pinctrl_tpm: tpmgrp { 480 pinctrl_tpm: tpmgrp {
762 fsl,pins = < 481 fsl,pins = <
763 MX8MP_IOMUXC_SAI1_RXFS 482 MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
764 MX8MP_IOMUXC_SAI3_RXC_ 483 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
765 >; 484 >;
766 }; 485 };
767 486
768 pinctrl_typec: typec1grp { 487 pinctrl_typec: typec1grp {
769 fsl,pins = < 488 fsl,pins = <
770 MX8MP_IOMUXC_SAI1_RXC_ 489 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
771 >; 490 >;
772 }; 491 };
773 492
774 pinctrl_uart2: uart2grp { 493 pinctrl_uart2: uart2grp {
775 fsl,pins = < 494 fsl,pins = <
776 MX8MP_IOMUXC_UART2_RXD 495 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
777 MX8MP_IOMUXC_UART2_TXD 496 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
778 >; 497 >;
779 }; 498 };
780 499
781 pinctrl_uart3: uart3grp { 500 pinctrl_uart3: uart3grp {
782 fsl,pins = < 501 fsl,pins = <
783 MX8MP_IOMUXC_ECSPI1_SC 502 MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
784 MX8MP_IOMUXC_ECSPI1_MO 503 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
785 MX8MP_IOMUXC_ECSPI1_SS 504 MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
786 MX8MP_IOMUXC_ECSPI1_MI 505 MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
787 >; 506 >;
788 }; 507 };
789 508
790 pinctrl_usdhc2: usdhc2grp { 509 pinctrl_usdhc2: usdhc2grp {
791 fsl,pins = < 510 fsl,pins = <
792 MX8MP_IOMUXC_SD2_CLK__ 511 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
793 MX8MP_IOMUXC_SD2_CMD__ 512 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
794 MX8MP_IOMUXC_SD2_DATA0 513 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
795 MX8MP_IOMUXC_SD2_DATA1 514 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
796 MX8MP_IOMUXC_SD2_DATA2 515 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
797 MX8MP_IOMUXC_SD2_DATA3 516 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
798 MX8MP_IOMUXC_GPIO1_IO0 517 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
799 >; 518 >;
800 }; 519 };
801 520
802 pinctrl_usdhc2_100mhz: usdhc2-100mhzgr 521 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
803 fsl,pins = < 522 fsl,pins = <
804 MX8MP_IOMUXC_SD2_CLK__ 523 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
805 MX8MP_IOMUXC_SD2_CMD__ 524 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
806 MX8MP_IOMUXC_SD2_DATA0 525 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
807 MX8MP_IOMUXC_SD2_DATA1 526 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
808 MX8MP_IOMUXC_SD2_DATA2 527 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
809 MX8MP_IOMUXC_SD2_DATA3 528 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
810 MX8MP_IOMUXC_GPIO1_IO0 529 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
811 >; 530 >;
812 }; 531 };
813 532
814 pinctrl_usdhc2_200mhz: usdhc2-200mhzgr 533 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
815 fsl,pins = < 534 fsl,pins = <
816 MX8MP_IOMUXC_SD2_CLK__ 535 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
817 MX8MP_IOMUXC_SD2_CMD__ 536 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
818 MX8MP_IOMUXC_SD2_DATA0 537 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
819 MX8MP_IOMUXC_SD2_DATA1 538 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
820 MX8MP_IOMUXC_SD2_DATA2 539 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
821 MX8MP_IOMUXC_SD2_DATA3 540 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
822 MX8MP_IOMUXC_GPIO1_IO0 541 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
823 >; 542 >;
824 }; 543 };
825 544
826 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 545 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
827 fsl,pins = < 546 fsl,pins = <
828 MX8MP_IOMUXC_SD2_CD_B_ 547 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
829 >; <<
830 }; <<
831 <<
832 pinctrl_wm8962: wm8962grp { <<
833 fsl,pins = < <<
834 MX8MP_IOMUXC_GPIO1_IO1 <<
835 >; 548 >;
836 }; 549 };
837 }; 550 };
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