1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright 2019 NXP 3 * Copyright 2019 NXP
4 * Copyright (C) 2023 Pengutronix, Marco Felsc< 4 * Copyright (C) 2023 Pengutronix, Marco Felsch <kernel@pengutronix.de>
5 */ 5 */
6 6
7 #include "imx8mp.dtsi" 7 #include "imx8mp.dtsi"
8 8
9 #include <dt-bindings/leds/common.h> <<
10 <<
11 / { 9 / {
12 model = "Polyhex i.MX8MPlus Debix SOM 10 model = "Polyhex i.MX8MPlus Debix SOM A";
13 compatible = "polyhex,imx8mp-debix-som 11 compatible = "polyhex,imx8mp-debix-som-a", "fsl,imx8mp";
14 12
15 reg_usdhc2_vmmc: regulator-usdhc2 { 13 reg_usdhc2_vmmc: regulator-usdhc2 {
16 compatible = "regulator-fixed" 14 compatible = "regulator-fixed";
17 pinctrl-names = "default"; 15 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_usdh 16 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
19 regulator-name = "VSD_3V3"; 17 regulator-name = "VSD_3V3";
20 regulator-min-microvolt = <330 18 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <330 19 regulator-max-microvolt = <3300000>;
22 gpio = <&gpio2 19 GPIO_ACTIVE_ 20 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
23 enable-active-high; 21 enable-active-high;
24 }; 22 };
25 <<
26 gpio-leds { <<
27 compatible = "gpio-leds"; <<
28 pinctrl-names = "default"; <<
29 pinctrl-0 = <&pinctrl_gpio_led <<
30 <<
31 led-0 { <<
32 gpios = <&gpio3 16 GPI <<
33 default-state = "on"; <<
34 linux,default-trigger <<
35 function = LED_FUNCTIO <<
36 color = <LED_COLOR_ID_ <<
37 }; <<
38 }; <<
39 }; 23 };
40 24
41 &A53_0 { 25 &A53_0 {
42 cpu-supply = <&buck2>; 26 cpu-supply = <&buck2>;
43 }; 27 };
44 28
45 &A53_1 { 29 &A53_1 {
46 cpu-supply = <&buck2>; 30 cpu-supply = <&buck2>;
47 }; 31 };
48 32
49 &A53_2 { 33 &A53_2 {
50 cpu-supply = <&buck2>; 34 cpu-supply = <&buck2>;
51 }; 35 };
52 36
53 &A53_3 { 37 &A53_3 {
54 cpu-supply = <&buck2>; 38 cpu-supply = <&buck2>;
55 }; 39 };
56 40
57 &i2c1 { 41 &i2c1 {
58 clock-frequency = <400000>; 42 clock-frequency = <400000>;
59 pinctrl-names = "default"; 43 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_i2c1>; 44 pinctrl-0 = <&pinctrl_i2c1>;
61 status = "okay"; 45 status = "okay";
62 46
63 pmic@25 { 47 pmic@25 {
64 compatible = "nxp,pca9450c"; 48 compatible = "nxp,pca9450c";
65 reg = <0x25>; 49 reg = <0x25>;
66 pinctrl-names = "default"; 50 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_pmic>; 51 pinctrl-0 = <&pinctrl_pmic>;
68 interrupt-parent = <&gpio1>; 52 interrupt-parent = <&gpio1>;
69 interrupts = <3 IRQ_TYPE_LEVEL 53 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
70 54
71 regulators { 55 regulators {
72 buck1: BUCK1 { 56 buck1: BUCK1 {
73 regulator-name 57 regulator-name = "BUCK1";
74 regulator-min- 58 regulator-min-microvolt = <600000>;
75 regulator-max- 59 regulator-max-microvolt = <2187500>;
76 regulator-boot 60 regulator-boot-on;
77 regulator-alwa 61 regulator-always-on;
78 regulator-ramp 62 regulator-ramp-delay = <3125>;
79 }; 63 };
80 64
81 buck2: BUCK2 { 65 buck2: BUCK2 {
82 regulator-name 66 regulator-name = "BUCK2";
83 regulator-min- 67 regulator-min-microvolt = <600000>;
84 regulator-max- 68 regulator-max-microvolt = <2187500>;
85 regulator-boot 69 regulator-boot-on;
86 regulator-alwa 70 regulator-always-on;
87 regulator-ramp 71 regulator-ramp-delay = <3125>;
88 nxp,dvs-run-vo 72 nxp,dvs-run-voltage = <950000>;
89 nxp,dvs-standb 73 nxp,dvs-standby-voltage = <850000>;
90 }; 74 };
91 75
92 buck4: BUCK4 { 76 buck4: BUCK4 {
93 regulator-name 77 regulator-name = "BUCK4";
94 regulator-min- 78 regulator-min-microvolt = <600000>;
95 regulator-max- 79 regulator-max-microvolt = <3400000>;
96 regulator-boot 80 regulator-boot-on;
97 regulator-alwa 81 regulator-always-on;
98 }; 82 };
99 83
100 buck5: BUCK5 { 84 buck5: BUCK5 {
101 regulator-name 85 regulator-name = "BUCK5";
102 regulator-min- 86 regulator-min-microvolt = <600000>;
103 regulator-max- 87 regulator-max-microvolt = <3400000>;
104 regulator-boot 88 regulator-boot-on;
105 regulator-alwa 89 regulator-always-on;
106 }; 90 };
107 91
108 buck6: BUCK6 { 92 buck6: BUCK6 {
109 regulator-name 93 regulator-name = "BUCK6";
110 regulator-min- 94 regulator-min-microvolt = <600000>;
111 regulator-max- 95 regulator-max-microvolt = <3400000>;
112 regulator-boot 96 regulator-boot-on;
113 regulator-alwa 97 regulator-always-on;
114 }; 98 };
115 99
116 ldo1: LDO1 { 100 ldo1: LDO1 {
117 regulator-name 101 regulator-name = "LDO1";
118 regulator-min- 102 regulator-min-microvolt = <1600000>;
119 regulator-max- 103 regulator-max-microvolt = <3300000>;
120 regulator-boot 104 regulator-boot-on;
121 regulator-alwa 105 regulator-always-on;
122 }; 106 };
123 107
124 ldo2: LDO2 { 108 ldo2: LDO2 {
125 regulator-name 109 regulator-name = "LDO2";
126 regulator-min- 110 regulator-min-microvolt = <800000>;
127 regulator-max- 111 regulator-max-microvolt = <1150000>;
128 regulator-boot 112 regulator-boot-on;
129 regulator-alwa 113 regulator-always-on;
130 }; 114 };
131 115
132 ldo3: LDO3 { 116 ldo3: LDO3 {
133 regulator-name 117 regulator-name = "LDO3";
134 regulator-min- 118 regulator-min-microvolt = <800000>;
135 regulator-max- 119 regulator-max-microvolt = <3300000>;
136 regulator-boot 120 regulator-boot-on;
137 regulator-alwa 121 regulator-always-on;
138 }; 122 };
139 123
140 ldo4: LDO4 { 124 ldo4: LDO4 {
141 regulator-name 125 regulator-name = "LDO4";
142 regulator-min- 126 regulator-min-microvolt = <800000>;
143 regulator-max- 127 regulator-max-microvolt = <3300000>;
144 regulator-boot 128 regulator-boot-on;
145 regulator-alwa 129 regulator-always-on;
146 }; 130 };
147 131
148 ldo5: LDO5 { 132 ldo5: LDO5 {
149 regulator-name 133 regulator-name = "LDO5";
150 regulator-min- 134 regulator-min-microvolt = <1800000>;
151 regulator-max- 135 regulator-max-microvolt = <3300000>;
152 regulator-boot 136 regulator-boot-on;
153 regulator-alwa 137 regulator-always-on;
154 }; 138 };
155 }; 139 };
156 }; 140 };
157 }; 141 };
158 142
159 &i2c4 { 143 &i2c4 {
160 clock-frequency = <400000>; 144 clock-frequency = <400000>;
161 pinctrl-names = "default"; 145 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_i2c4>; 146 pinctrl-0 = <&pinctrl_i2c4>;
163 status = "okay"; 147 status = "okay";
164 148
165 adc@48 { 149 adc@48 {
166 compatible = "ti,ads1115"; 150 compatible = "ti,ads1115";
167 reg = <0x48>; 151 reg = <0x48>;
168 #address-cells = <1>; 152 #address-cells = <1>;
169 #size-cells = <0>; 153 #size-cells = <0>;
170 154
171 channel@4 { 155 channel@4 {
172 reg = <4>; 156 reg = <4>;
173 ti,gain = <1>; 157 ti,gain = <1>;
174 ti,datarate = <7>; 158 ti,datarate = <7>;
175 }; 159 };
176 160
177 channel@5 { 161 channel@5 {
178 reg = <5>; 162 reg = <5>;
179 ti,gain = <1>; 163 ti,gain = <1>;
180 ti,datarate = <7>; 164 ti,datarate = <7>;
181 }; 165 };
182 166
183 channel@6 { 167 channel@6 {
184 reg = <6>; 168 reg = <6>;
185 ti,gain = <1>; 169 ti,gain = <1>;
186 ti,datarate = <7>; 170 ti,datarate = <7>;
187 }; 171 };
188 172
189 channel@7 { 173 channel@7 {
190 reg = <7>; 174 reg = <7>;
191 ti,gain = <1>; 175 ti,gain = <1>;
192 ti,datarate = <7>; 176 ti,datarate = <7>;
193 }; 177 };
194 }; 178 };
195 }; 179 };
196 180
197 &snvs_pwrkey { 181 &snvs_pwrkey {
198 status = "okay"; 182 status = "okay";
199 }; 183 };
200 184
201 /* eMMC */ 185 /* eMMC */
202 &usdhc3 { 186 &usdhc3 {
203 pinctrl-names = "default", "state_100m 187 pinctrl-names = "default", "state_100mhz", "state_200mhz";
204 pinctrl-0 = <&pinctrl_usdhc3>; 188 pinctrl-0 = <&pinctrl_usdhc3>;
205 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 189 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
206 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 190 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
207 assigned-clocks = <&clk IMX8MP_CLK_USD 191 assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
208 assigned-clock-rates = <400000000>; 192 assigned-clock-rates = <400000000>;
209 bus-width = <8>; 193 bus-width = <8>;
210 non-removable; 194 non-removable;
211 status = "okay"; 195 status = "okay";
212 }; 196 };
213 197
214 &wdog1 { 198 &wdog1 {
215 pinctrl-names = "default"; 199 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_wdog>; 200 pinctrl-0 = <&pinctrl_wdog>;
217 fsl,ext-reset-output; 201 fsl,ext-reset-output;
218 status = "okay"; 202 status = "okay";
219 }; 203 };
220 204
221 &iomuxc { 205 &iomuxc {
222 pinctrl_gpio_led: gpioledgrp { <<
223 fsl,pins = < <<
224 MX8MP_IOMUXC_NAND_READ <<
225 >; <<
226 }; <<
227 <<
228 pinctrl_i2c1: i2c1grp { 206 pinctrl_i2c1: i2c1grp {
229 fsl,pins = < 207 fsl,pins = <
230 MX8MP_IOMUXC_I2C1_SCL_ 208 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
231 MX8MP_IOMUXC_I2C1_SDA_ 209 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
232 >; 210 >;
233 }; 211 };
234 212
235 pinctrl_i2c4: i2c4grp { 213 pinctrl_i2c4: i2c4grp {
236 fsl,pins = < 214 fsl,pins = <
237 MX8MP_IOMUXC_I2C4_SCL_ 215 MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c3
238 MX8MP_IOMUXC_I2C4_SDA_ 216 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c3
239 >; 217 >;
240 }; 218 };
241 219
242 pinctrl_pmic: pmicgrp { 220 pinctrl_pmic: pmicgrp {
243 fsl,pins = < 221 fsl,pins = <
244 MX8MP_IOMUXC_GPIO1_IO0 222 MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x41
245 >; 223 >;
246 }; 224 };
247 225
248 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc 226 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
249 fsl,pins = < 227 fsl,pins = <
250 MX8MP_IOMUXC_SD2_RESET 228 MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41
251 >; 229 >;
252 }; 230 };
253 231
254 pinctrl_usdhc3: usdhc3grp { 232 pinctrl_usdhc3: usdhc3grp {
255 fsl,pins = < 233 fsl,pins = <
256 MX8MP_IOMUXC_NAND_WE_B 234 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
257 MX8MP_IOMUXC_NAND_WP_B 235 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
258 MX8MP_IOMUXC_NAND_DATA 236 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
259 MX8MP_IOMUXC_NAND_DATA 237 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
260 MX8MP_IOMUXC_NAND_DATA 238 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
261 MX8MP_IOMUXC_NAND_DATA 239 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
262 MX8MP_IOMUXC_NAND_RE_B 240 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
263 MX8MP_IOMUXC_NAND_CE2_ 241 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
264 MX8MP_IOMUXC_NAND_CE3_ 242 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
265 MX8MP_IOMUXC_NAND_CLE_ 243 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
266 MX8MP_IOMUXC_NAND_CE1_ 244 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
267 >; 245 >;
268 }; 246 };
269 247
270 pinctrl_usdhc3_100mhz: usdhc3-100mhzgr 248 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
271 fsl,pins = < 249 fsl,pins = <
272 MX8MP_IOMUXC_NAND_WE_B 250 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
273 MX8MP_IOMUXC_NAND_WP_B 251 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
274 MX8MP_IOMUXC_NAND_DATA 252 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
275 MX8MP_IOMUXC_NAND_DATA 253 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
276 MX8MP_IOMUXC_NAND_DATA 254 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
277 MX8MP_IOMUXC_NAND_DATA 255 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
278 MX8MP_IOMUXC_NAND_RE_B 256 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
279 MX8MP_IOMUXC_NAND_CE2_ 257 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
280 MX8MP_IOMUXC_NAND_CE3_ 258 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
281 MX8MP_IOMUXC_NAND_CLE_ 259 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
282 MX8MP_IOMUXC_NAND_CE1_ 260 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
283 >; 261 >;
284 }; 262 };
285 263
286 pinctrl_usdhc3_200mhz: usdhc3-200mhzgr 264 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
287 fsl,pins = < 265 fsl,pins = <
288 MX8MP_IOMUXC_NAND_WE_B 266 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
289 MX8MP_IOMUXC_NAND_WP_B 267 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
290 MX8MP_IOMUXC_NAND_DATA 268 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
291 MX8MP_IOMUXC_NAND_DATA 269 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
292 MX8MP_IOMUXC_NAND_DATA 270 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
293 MX8MP_IOMUXC_NAND_DATA 271 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
294 MX8MP_IOMUXC_NAND_RE_B 272 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
295 MX8MP_IOMUXC_NAND_CE2_ 273 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
296 MX8MP_IOMUXC_NAND_CE3_ 274 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
297 MX8MP_IOMUXC_NAND_CLE_ 275 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
298 MX8MP_IOMUXC_NAND_CE1_ 276 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
299 >; 277 >;
300 }; 278 };
301 279
302 pinctrl_wdog: wdoggrp { 280 pinctrl_wdog: wdoggrp {
303 fsl,pins = < 281 fsl,pins = <
304 MX8MP_IOMUXC_GPIO1_IO0 282 MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6
305 >; 283 >;
306 }; 284 };
307 }; 285 };
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