1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (C) 2022 Avnet Embedded GmbH 3 * Copyright (C) 2022 Avnet Embedded GmbH
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "imx8mp-msc-sm2s-14N0600E.dtsi" 8 #include "imx8mp-msc-sm2s-14N0600E.dtsi"
9 #include <dt-bindings/clock/imx8mp-clock.h> 9 #include <dt-bindings/clock/imx8mp-clock.h>
10 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/gpio/gpio.h>
11 11
12 / { 12 / {
13 model = "MSC SM2-MB-EP1 Carrier Board 13 model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM";
14 compatible = "avnet,sm2s-imx8mp-14N060 14 compatible = "avnet,sm2s-imx8mp-14N0600E-ep1",
15 "avnet,sm2s-imx8mp-14N060 15 "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp",
16 "fsl,imx8mp"; 16 "fsl,imx8mp";
17 <<
18 reg_vcc_3v3_audio: 3v3-audio-regulator <<
19 compatible = "regulator-fixed" <<
20 regulator-name = "VCC_3V3_AUD" <<
21 regulator-min-microvolt = <330 <<
22 regulator-max-microvolt = <330 <<
23 }; <<
24 <<
25 reg_vcc_1v8_audio: 1v8-audio-regulator <<
26 compatible = "regulator-fixed" <<
27 regulator-name = "VCC_1V8_AUD" <<
28 regulator-min-microvolt = <180 <<
29 regulator-max-microvolt = <180 <<
30 }; <<
31 <<
32 sound { <<
33 compatible = "simple-audio-car <<
34 simple-audio-card,name = "sgtl <<
35 simple-audio-card,format = "i2 <<
36 simple-audio-card,frame-master <<
37 simple-audio-card,bitclock-mas <<
38 <<
39 simple-audio-card,cpu { <<
40 sound-dai = <&sai2>; <<
41 }; <<
42 <<
43 codec_dai: simple-audio-card,c <<
44 sound-dai = <&sgtl5000 <<
45 }; <<
46 }; <<
47 }; <<
48 <<
49 &hdmi_pvi { <<
50 status = "okay"; <<
51 }; <<
52 <<
53 &hdmi_tx { <<
54 pinctrl-names = "default"; <<
55 pinctrl-0 = <&pinctrl_hdmi>; <<
56 status = "okay"; <<
57 }; <<
58 <<
59 &hdmi_tx_phy { <<
60 status = "okay"; <<
61 }; <<
62 <<
63 &lcdif3 { <<
64 status = "okay"; <<
65 }; <<
66 <<
67 &i2c1 { <<
68 sgtl5000: audio-codec@a { <<
69 compatible = "fsl,sgtl5000"; <<
70 reg = <0x0a>; <<
71 <<
72 assigned-clocks = <&clk IMX8MP <<
73 assigned-clock-parents = <&clk <<
74 assigned-clock-rates = <240000 <<
75 clocks = <&clk IMX8MP_CLK_CLKO <<
76 #sound-dai-cells = <0>; <<
77 <<
78 VDDA-supply = <®_vcc_3v3_au <<
79 VDDD-supply = <®_vcc_1v8_au <<
80 VDDIO-supply = <®_vcc_1v8_a <<
81 }; <<
82 }; <<
83 <<
84 /* I2S-0 = sai2 */ <<
85 &sai2 { <<
86 pinctrl-names = "default"; <<
87 pinctrl-0 = <&pinctrl_sai2>; <<
88 <<
89 assigned-clocks = <&clk IMX8MP_CLK_SAI <<
90 assigned-clock-parents = <&clk IMX8MP_ <<
91 assigned-clock-rates = <12288000>; <<
92 <<
93 fsl,sai-mclk-direction-output; <<
94 status = "okay"; <<
95 }; 17 };
96 18
97 &flexcan1 { 19 &flexcan1 {
98 status = "okay"; 20 status = "okay";
99 }; 21 };
100 22
101 &flexcan2 { 23 &flexcan2 {
102 status = "okay"; 24 status = "okay";
103 }; 25 };
104 26
105 &usdhc2 { 27 &usdhc2 {
106 no-1-8-v; 28 no-1-8-v;
107 }; 29 };
108 30
109 &iomuxc { 31 &iomuxc {
110 pinctrl-names = "default"; 32 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_smarc_gpio>; 33 pinctrl-0 = <&pinctrl_smarc_gpio>;
112 <<
113 pinctrl_hdmi: hdmigrp { <<
114 fsl,pins = < <<
115 MX8MP_IOMUXC_HDMI_DDC_ <<
116 MX8MP_IOMUXC_HDMI_DDC_ <<
117 MX8MP_IOMUXC_HDMI_CEC_ <<
118 MX8MP_IOMUXC_HDMI_HPD_ <<
119 >; <<
120 }; <<
121 <<
122 pinctrl_sai2: sai2grp { <<
123 fsl,pins = < <<
124 MX8MP_IOMUXC_SAI2_TXFS <<
125 MX8MP_IOMUXC_SAI2_TXC_ <<
126 MX8MP_IOMUXC_SAI2_RXD0 <<
127 MX8MP_IOMUXC_SAI2_TXD0 <<
128 >; <<
129 }; <<
130 34
131 pinctrl_smarc_gpio: smarcgpiosgrp { 35 pinctrl_smarc_gpio: smarcgpiosgrp {
132 fsl,pins = 36 fsl,pins =
133 <MX8MP_IOMUXC_GPIO1_IO 37 <MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x19>, /* GPIO0 */
134 <MX8MP_IOMUXC_SAI1_RXC 38 <MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x19>, /* GPIO1 */
135 <MX8MP_IOMUXC_SAI1_RXD 39 <MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x19>, /* GPIO2 */
136 <MX8MP_IOMUXC_SAI1_RXD 40 <MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x19>, /* GPIO3 */
137 <MX8MP_IOMUXC_SAI3_RXC 41 <MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x19>, /* GPIO4 */
138 <MX8MP_IOMUXC_SAI3_MCL 42 <MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x19>, /* GPIO5 */
139 <MX8MP_IOMUXC_SAI1_TXD 43 <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x19>, /* GPIO6 */
140 <MX8MP_IOMUXC_GPIO1_IO 44 <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x19>, /* GPIO7 */
141 <MX8MP_IOMUXC_SAI1_MCL 45 <MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x19>, /* GPIO8 */
142 <MX8MP_IOMUXC_SAI2_RXF 46 <MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x19>, /* GPIO9 */
143 <MX8MP_IOMUXC_SAI2_RXC 47 <MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x19>, /* GPIO10 */
144 <MX8MP_IOMUXC_SAI3_RXF 48 <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x19>, /* GPIO11 */
145 <MX8MP_IOMUXC_SAI1_TXD 49 <MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x19>, /* GPIO12 */
146 <MX8MP_IOMUXC_SAI1_RXF 50 <MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19>; /* GPIO13 */
147 }; 51 };
148 }; 52 };
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