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Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mp-msc-sm2s-ep1.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8mp-msc-sm2s-ep1.dts (Architecture i386) and /scripts/dtc/include-prefixes/arm64/freescale/imx8mp-msc-sm2s-ep1.dts (Architecture ppc)


  1 // SPDX-License-Identifier: GPL-2.0                 1 // SPDX-License-Identifier: GPL-2.0
  2 /*                                                  2 /*
  3  * Copyright (C) 2022 Avnet Embedded GmbH           3  * Copyright (C) 2022 Avnet Embedded GmbH
  4  */                                                 4  */
  5                                                     5 
  6 /dts-v1/;                                           6 /dts-v1/;
  7                                                     7 
  8 #include "imx8mp-msc-sm2s-14N0600E.dtsi"            8 #include "imx8mp-msc-sm2s-14N0600E.dtsi"
  9 #include <dt-bindings/clock/imx8mp-clock.h>         9 #include <dt-bindings/clock/imx8mp-clock.h>
 10 #include <dt-bindings/gpio/gpio.h>                 10 #include <dt-bindings/gpio/gpio.h>
 11                                                    11 
 12 / {                                                12 / {
 13         model = "MSC SM2-MB-EP1 Carrier Board      13         model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM";
 14         compatible = "avnet,sm2s-imx8mp-14N060     14         compatible = "avnet,sm2s-imx8mp-14N0600E-ep1",
 15                      "avnet,sm2s-imx8mp-14N060     15                      "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp",
 16                      "fsl,imx8mp";                 16                      "fsl,imx8mp";
 17                                                    17 
 18         reg_vcc_3v3_audio: 3v3-audio-regulator     18         reg_vcc_3v3_audio: 3v3-audio-regulator {
 19                 compatible = "regulator-fixed"     19                 compatible = "regulator-fixed";
 20                 regulator-name = "VCC_3V3_AUD"     20                 regulator-name = "VCC_3V3_AUD";
 21                 regulator-min-microvolt = <330     21                 regulator-min-microvolt = <3300000>;
 22                 regulator-max-microvolt = <330     22                 regulator-max-microvolt = <3300000>;
 23         };                                         23         };
 24                                                    24 
 25         reg_vcc_1v8_audio: 1v8-audio-regulator     25         reg_vcc_1v8_audio: 1v8-audio-regulator {
 26                 compatible = "regulator-fixed"     26                 compatible = "regulator-fixed";
 27                 regulator-name = "VCC_1V8_AUD"     27                 regulator-name = "VCC_1V8_AUD";
 28                 regulator-min-microvolt = <180     28                 regulator-min-microvolt = <1800000>;
 29                 regulator-max-microvolt = <180     29                 regulator-max-microvolt = <1800000>;
 30         };                                         30         };
 31                                                    31 
 32         sound {                                    32         sound {
 33                 compatible = "simple-audio-car     33                 compatible = "simple-audio-card";
 34                 simple-audio-card,name = "sgtl     34                 simple-audio-card,name = "sgtl5000-audio";
 35                 simple-audio-card,format = "i2     35                 simple-audio-card,format = "i2s";
 36                 simple-audio-card,frame-master     36                 simple-audio-card,frame-master = <&codec_dai>;
 37                 simple-audio-card,bitclock-mas     37                 simple-audio-card,bitclock-master = <&codec_dai>;
 38                                                    38 
 39                 simple-audio-card,cpu {            39                 simple-audio-card,cpu {
 40                         sound-dai = <&sai2>;       40                         sound-dai = <&sai2>;
 41                 };                                 41                 };
 42                                                    42 
 43                 codec_dai: simple-audio-card,c     43                 codec_dai: simple-audio-card,codec {
 44                         sound-dai = <&sgtl5000     44                         sound-dai = <&sgtl5000>;
 45                 };                                 45                 };
 46         };                                         46         };
 47 };                                                 47 };
 48                                                    48 
 49 &hdmi_pvi {                                        49 &hdmi_pvi {
 50         status = "okay";                           50         status = "okay";
 51 };                                                 51 };
 52                                                    52 
 53 &hdmi_tx {                                         53 &hdmi_tx {
 54         pinctrl-names = "default";                 54         pinctrl-names = "default";
 55         pinctrl-0 = <&pinctrl_hdmi>;               55         pinctrl-0 = <&pinctrl_hdmi>;
 56         status = "okay";                           56         status = "okay";
 57 };                                                 57 };
 58                                                    58 
 59 &hdmi_tx_phy {                                     59 &hdmi_tx_phy {
 60         status = "okay";                           60         status = "okay";
 61 };                                                 61 };
 62                                                    62 
 63 &lcdif3 {                                          63 &lcdif3 {
 64         status = "okay";                           64         status = "okay";
 65 };                                                 65 };
 66                                                    66 
 67 &i2c1 {                                            67 &i2c1 {
 68         sgtl5000: audio-codec@a {                  68         sgtl5000: audio-codec@a {
 69                 compatible = "fsl,sgtl5000";       69                 compatible = "fsl,sgtl5000";
 70                 reg = <0x0a>;                      70                 reg = <0x0a>;
 71                                                    71 
 72                 assigned-clocks = <&clk IMX8MP     72                 assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>;
 73                 assigned-clock-parents = <&clk     73                 assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
 74                 assigned-clock-rates = <240000     74                 assigned-clock-rates = <24000000>;
 75                 clocks = <&clk IMX8MP_CLK_CLKO     75                 clocks = <&clk IMX8MP_CLK_CLKOUT1>;
 76                 #sound-dai-cells = <0>;            76                 #sound-dai-cells = <0>;
 77                                                    77 
 78                 VDDA-supply = <&reg_vcc_3v3_au     78                 VDDA-supply = <&reg_vcc_3v3_audio>;
 79                 VDDD-supply = <&reg_vcc_1v8_au     79                 VDDD-supply = <&reg_vcc_1v8_audio>;
 80                 VDDIO-supply = <&reg_vcc_1v8_a     80                 VDDIO-supply = <&reg_vcc_1v8_audio>;
 81         };                                         81         };
 82 };                                                 82 };
 83                                                    83 
 84 /* I2S-0 = sai2 */                                 84 /* I2S-0 = sai2 */
 85 &sai2 {                                            85 &sai2 {
 86         pinctrl-names = "default";                 86         pinctrl-names = "default";
 87         pinctrl-0 = <&pinctrl_sai2>;               87         pinctrl-0 = <&pinctrl_sai2>;
 88                                                    88 
 89         assigned-clocks = <&clk IMX8MP_CLK_SAI     89         assigned-clocks = <&clk IMX8MP_CLK_SAI2>;
 90         assigned-clock-parents = <&clk IMX8MP_     90         assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
 91         assigned-clock-rates = <12288000>;         91         assigned-clock-rates = <12288000>;
 92                                                    92 
 93         fsl,sai-mclk-direction-output;             93         fsl,sai-mclk-direction-output;
 94         status = "okay";                           94         status = "okay";
 95 };                                                 95 };
 96                                                    96 
 97 &flexcan1 {                                        97 &flexcan1 {
 98         status = "okay";                           98         status = "okay";
 99 };                                                 99 };
100                                                   100 
101 &flexcan2 {                                       101 &flexcan2 {
102         status = "okay";                          102         status = "okay";
103 };                                                103 };
104                                                   104 
105 &usdhc2 {                                         105 &usdhc2 {
106         no-1-8-v;                                 106         no-1-8-v;
107 };                                                107 };
108                                                   108 
109 &iomuxc {                                         109 &iomuxc {
110         pinctrl-names = "default";                110         pinctrl-names = "default";
111         pinctrl-0 = <&pinctrl_smarc_gpio>;        111         pinctrl-0 = <&pinctrl_smarc_gpio>;
112                                                   112 
113         pinctrl_hdmi: hdmigrp {                   113         pinctrl_hdmi: hdmigrp {
114                 fsl,pins = <                      114                 fsl,pins = <
115                         MX8MP_IOMUXC_HDMI_DDC_    115                         MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL     0x1c2
116                         MX8MP_IOMUXC_HDMI_DDC_    116                         MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA     0x1c2
117                         MX8MP_IOMUXC_HDMI_CEC_    117                         MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC         0x10
118                         MX8MP_IOMUXC_HDMI_HPD_    118                         MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD         0x10
119                 >;                                119                 >;
120         };                                        120         };
121                                                   121 
122         pinctrl_sai2: sai2grp {                   122         pinctrl_sai2: sai2grp {
123                 fsl,pins = <                      123                 fsl,pins = <
124                         MX8MP_IOMUXC_SAI2_TXFS    124                         MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC   0xd6
125                         MX8MP_IOMUXC_SAI2_TXC_    125                         MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK    0xd6
126                         MX8MP_IOMUXC_SAI2_RXD0    126                         MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6
127                         MX8MP_IOMUXC_SAI2_TXD0    127                         MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
128                 >;                                128                 >;
129         };                                        129         };
130                                                   130 
131         pinctrl_smarc_gpio: smarcgpiosgrp {       131         pinctrl_smarc_gpio: smarcgpiosgrp {
132                 fsl,pins =                        132                 fsl,pins =
133                         <MX8MP_IOMUXC_GPIO1_IO    133                         <MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11    0x19>, /* GPIO0 */
134                         <MX8MP_IOMUXC_SAI1_RXC    134                         <MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01      0x19>, /* GPIO1 */
135                         <MX8MP_IOMUXC_SAI1_RXD    135                         <MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02     0x19>, /* GPIO2 */
136                         <MX8MP_IOMUXC_SAI1_RXD    136                         <MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03     0x19>, /* GPIO3 */
137                         <MX8MP_IOMUXC_SAI3_RXC    137                         <MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29      0x19>, /* GPIO4 */
138                         <MX8MP_IOMUXC_SAI3_MCL    138                         <MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02     0x19>, /* GPIO5 */
139                         <MX8MP_IOMUXC_SAI1_TXD    139                         <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18     0x19>, /* GPIO6 */
140                         <MX8MP_IOMUXC_GPIO1_IO    140                         <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10    0x19>, /* GPIO7 */
141                         <MX8MP_IOMUXC_SAI1_MCL    141                         <MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20     0x19>, /* GPIO8 */
142                         <MX8MP_IOMUXC_SAI2_RXF    142                         <MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21     0x19>, /* GPIO9 */
143                         <MX8MP_IOMUXC_SAI2_RXC    143                         <MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22      0x19>, /* GPIO10 */
144                         <MX8MP_IOMUXC_SAI3_RXF    144                         <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28     0x19>, /* GPIO11 */
145                         <MX8MP_IOMUXC_SAI1_TXD    145                         <MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19     0x19>, /* GPIO12 */
146                         <MX8MP_IOMUXC_SAI1_RXF    146                         <MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00     0x19>; /* GPIO13 */
147         };                                        147         };
148 };                                                148 };
                                                      

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