1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright 2023 Gateworks Corporation 3 * Copyright 2023 Gateworks Corporation
4 */ 4 */
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h> 8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 9
10 / { 10 / {
11 connector { <<
12 compatible = "gpio-usb-b-conne <<
13 pinctrl-names = "default"; <<
14 pinctrl-0 = <&pinctrl_usbcon1> <<
15 type = "micro"; <<
16 label = "Type-C"; <<
17 id-gpios = <&gpio3 21 GPIO_ACT <<
18 <<
19 port { <<
20 usb_dr_connector: endp <<
21 remote-endpoin <<
22 }; <<
23 }; <<
24 }; <<
25 <<
26 led-controller { 11 led-controller {
27 compatible = "gpio-leds"; 12 compatible = "gpio-leds";
28 pinctrl-names = "default"; 13 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_gpio_led 14 pinctrl-0 = <&pinctrl_gpio_leds>;
30 15
31 led-0 { 16 led-0 {
32 function = LED_FUNCTIO 17 function = LED_FUNCTION_STATUS;
33 color = <LED_COLOR_ID_ 18 color = <LED_COLOR_ID_GREEN>;
34 gpios = <&gpio4 1 GPIO 19 gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
35 default-state = "on"; 20 default-state = "on";
36 linux,default-trigger 21 linux,default-trigger = "heartbeat";
37 }; 22 };
38 23
39 led-1 { 24 led-1 {
40 function = LED_FUNCTIO 25 function = LED_FUNCTION_STATUS;
41 color = <LED_COLOR_ID_ 26 color = <LED_COLOR_ID_RED>;
42 gpios = <&gpio4 5 GPIO 27 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
43 default-state = "off"; 28 default-state = "off";
44 }; 29 };
45 }; 30 };
46 31
47 pcie0_refclk: clock-pcie0 { 32 pcie0_refclk: clock-pcie0 {
48 compatible = "fixed-clock"; 33 compatible = "fixed-clock";
49 #clock-cells = <0>; 34 #clock-cells = <0>;
50 clock-frequency = <100000000>; 35 clock-frequency = <100000000>;
51 }; 36 };
52 37
53 pps { 38 pps {
54 compatible = "pps-gpio"; 39 compatible = "pps-gpio";
55 pinctrl-names = "default"; 40 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_pps>; 41 pinctrl-0 = <&pinctrl_pps>;
57 gpios = <&gpio4 3 GPIO_ACTIVE_ 42 gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
58 status = "okay"; 43 status = "okay";
59 }; 44 };
60 }; 45 };
61 46
62 /* off-board header */ 47 /* off-board header */
63 &ecspi2 { 48 &ecspi2 {
64 pinctrl-names = "default"; 49 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_spi2>; 50 pinctrl-0 = <&pinctrl_spi2>;
66 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW> !! 51 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
67 <&gpio1 10 GPIO_ACTIVE_LOW> <<
68 status = "okay"; 52 status = "okay";
69 <<
70 tpm@1 { <<
71 compatible = "atmel,attpm20p", <<
72 reg = <0x1>; <<
73 spi-max-frequency = <36000000> <<
74 }; <<
75 }; 53 };
76 54
77 &gpio4 { 55 &gpio4 {
78 gpio-line-names = 56 gpio-line-names =
79 "", "", "", "", 57 "", "", "", "",
80 "", "", "", "", 58 "", "", "", "",
81 "dio1", "", "", "dio0", 59 "dio1", "", "", "dio0",
82 "", "", "pci_usb_sel", "", 60 "", "", "pci_usb_sel", "",
83 "", "", "", "", 61 "", "", "", "",
84 "", "", "", "", 62 "", "", "", "",
85 "dio3", "", "dio2", "", 63 "dio3", "", "dio2", "",
86 "pci_wdis#", "", "", ""; 64 "pci_wdis#", "", "", "";
87 }; 65 };
88 66
89 &i2c2 { 67 &i2c2 {
90 clock-frequency = <400000>; 68 clock-frequency = <400000>;
91 pinctrl-names = "default"; 69 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_i2c2>; 70 pinctrl-0 = <&pinctrl_i2c2>;
93 status = "okay"; 71 status = "okay";
94 72
95 accelerometer@19 { 73 accelerometer@19 {
96 compatible = "st,lis2de12"; 74 compatible = "st,lis2de12";
97 reg = <0x19>; 75 reg = <0x19>;
98 pinctrl-names = "default"; 76 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_accel>; 77 pinctrl-0 = <&pinctrl_accel>;
100 st,drdy-int-pin = <1>; 78 st,drdy-int-pin = <1>;
101 interrupt-parent = <&gpio4>; 79 interrupt-parent = <&gpio4>;
102 interrupts = <21 IRQ_TYPE_LEVE 80 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
>> 81 interrupt-names = "INT1";
103 }; 82 };
104 }; 83 };
105 84
106 &pcie_phy { 85 &pcie_phy {
107 fsl,refclk-pad-mode = <IMX8_PCIE_REFCL 86 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
108 fsl,clkreq-unsupported; 87 fsl,clkreq-unsupported;
109 clocks = <&pcie0_refclk>; 88 clocks = <&pcie0_refclk>;
110 clock-names = "ref"; 89 clock-names = "ref";
111 status = "okay"; 90 status = "okay";
112 }; 91 };
113 92
114 &pcie { 93 &pcie {
115 pinctrl-names = "default"; 94 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_pcie0>; 95 pinctrl-0 = <&pinctrl_pcie0>;
117 reset-gpio = <&gpio4 29 GPIO_ACTIVE_LO 96 reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
118 status = "okay"; 97 status = "okay";
119 }; 98 };
120 99
121 /* GPS */ 100 /* GPS */
122 &uart1 { 101 &uart1 {
123 pinctrl-names = "default"; 102 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_uart1>; 103 pinctrl-0 = <&pinctrl_uart1>;
125 status = "okay"; 104 status = "okay";
126 }; 105 };
127 106
128 /* off-board header */ 107 /* off-board header */
129 &uart3 { 108 &uart3 {
130 pinctrl-names = "default"; 109 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_uart3>; 110 pinctrl-0 = <&pinctrl_uart3>;
132 status = "okay"; 111 status = "okay";
133 }; 112 };
134 113
135 /* USB1 Type-C front panel */ 114 /* USB1 Type-C front panel */
136 &usb3_0 { 115 &usb3_0 {
137 pinctrl-names = "default"; 116 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_usb1>; 117 pinctrl-0 = <&pinctrl_usb1>;
139 fsl,over-current-active-low; 118 fsl,over-current-active-low;
140 status = "okay"; 119 status = "okay";
141 }; 120 };
142 121
143 &usb3_phy0 { 122 &usb3_phy0 {
144 status = "okay"; 123 status = "okay";
145 }; 124 };
146 125
147 &usb_dwc3_0 { 126 &usb_dwc3_0 {
148 /* dual role is implemented but not a 127 /* dual role is implemented but not a full featured OTG */
149 adp-disable; 128 adp-disable;
150 hnp-disable; 129 hnp-disable;
151 srp-disable; 130 srp-disable;
152 dr_mode = "otg"; 131 dr_mode = "otg";
153 usb-role-switch; 132 usb-role-switch;
154 role-switch-default-mode = "peripheral 133 role-switch-default-mode = "peripheral";
155 status = "okay"; 134 status = "okay";
156 135
157 port { !! 136 connector {
158 usb3_dwc: endpoint { !! 137 compatible = "gpio-usb-b-connector", "usb-b-connector";
159 remote-endpoint = <&us !! 138 pinctrl-names = "default";
160 }; !! 139 pinctrl-0 = <&pinctrl_usbcon1>;
>> 140 type = "micro";
>> 141 label = "Type-C";
>> 142 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
161 }; 143 };
162 }; 144 };
163 145
164 /* USB2 - MiniPCIe socket */ 146 /* USB2 - MiniPCIe socket */
165 &usb3_1 { 147 &usb3_1 {
166 fsl,permanently-attached; 148 fsl,permanently-attached;
167 fsl,disable-port-power-control; 149 fsl,disable-port-power-control;
168 status = "okay"; 150 status = "okay";
169 }; 151 };
170 152
171 &usb3_phy1 { 153 &usb3_phy1 {
172 status = "okay"; 154 status = "okay";
173 }; 155 };
174 156
175 &usb_dwc3_1 { 157 &usb_dwc3_1 {
176 dr_mode = "host"; 158 dr_mode = "host";
177 status = "okay"; 159 status = "okay";
178 }; 160 };
179 161
180 &iomuxc { 162 &iomuxc {
181 pinctrl-names = "default"; 163 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_hog>; 164 pinctrl-0 = <&pinctrl_hog>;
183 165
184 pinctrl_hog: hoggrp { 166 pinctrl_hog: hoggrp {
185 fsl,pins = < 167 fsl,pins = <
186 MX8MP_IOMUXC_SAI1_RXD6 168 MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
187 MX8MP_IOMUXC_SAI1_TXC_ 169 MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
188 MX8MP_IOMUXC_SAI1_TXD2 170 MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
189 MX8MP_IOMUXC_SAI2_TXD0 171 MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000146 /* DIO2 */
190 MX8MP_IOMUXC_SAI2_TXFS 172 MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40000146 /* DIO3 */
191 MX8MP_IOMUXC_SAI3_RXFS 173 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
192 >; 174 >;
193 }; 175 };
194 176
195 pinctrl_accel: accelgrp { 177 pinctrl_accel: accelgrp {
196 fsl,pins = < 178 fsl,pins = <
197 MX8MP_IOMUXC_SAI2_RXFS 179 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
198 >; 180 >;
199 }; 181 };
200 182
201 pinctrl_gpio_leds: gpioledgrp { 183 pinctrl_gpio_leds: gpioledgrp {
202 fsl,pins = < 184 fsl,pins = <
203 MX8MP_IOMUXC_SAI1_RXC_ 185 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
204 MX8MP_IOMUXC_SAI1_RXD3 186 MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
205 >; 187 >;
206 }; 188 };
207 189
208 pinctrl_pcie0: pcie0grp { 190 pinctrl_pcie0: pcie0grp {
209 fsl,pins = < 191 fsl,pins = <
210 MX8MP_IOMUXC_SAI3_RXC_ 192 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
211 >; 193 >;
212 }; 194 };
213 195
214 pinctrl_pps: ppsgrp { 196 pinctrl_pps: ppsgrp {
215 fsl,pins = < 197 fsl,pins = <
216 MX8MP_IOMUXC_SAI1_RXD1 198 MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
217 >; 199 >;
218 }; 200 };
219 201
220 pinctrl_usb1: usb1grp { 202 pinctrl_usb1: usb1grp {
221 fsl,pins = < 203 fsl,pins = <
222 MX8MP_IOMUXC_GPIO1_IO1 204 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
223 >; 205 >;
224 }; 206 };
225 207
226 pinctrl_usbcon1: usbcon1grp { 208 pinctrl_usbcon1: usbcon1grp {
227 fsl,pins = < 209 fsl,pins = <
228 MX8MP_IOMUXC_SAI5_RXD0 210 MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
229 >; 211 >;
230 }; 212 };
231 213
232 pinctrl_spi2: spi2grp { 214 pinctrl_spi2: spi2grp {
233 fsl,pins = < 215 fsl,pins = <
234 MX8MP_IOMUXC_ECSPI2_SC 216 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
235 MX8MP_IOMUXC_ECSPI2_MO 217 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
236 MX8MP_IOMUXC_ECSPI2_MI 218 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
237 MX8MP_IOMUXC_ECSPI2_SS 219 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
238 MX8MP_IOMUXC_GPIO1_IO1 <<
239 >; 220 >;
240 }; 221 };
241 222
242 pinctrl_uart1: uart1grp { 223 pinctrl_uart1: uart1grp {
243 fsl,pins = < 224 fsl,pins = <
244 MX8MP_IOMUXC_UART1_RXD 225 MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
245 MX8MP_IOMUXC_UART1_TXD 226 MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
246 >; 227 >;
247 }; 228 };
248 229
249 pinctrl_uart3: uart3grp { 230 pinctrl_uart3: uart3grp {
250 fsl,pins = < 231 fsl,pins = <
251 MX8MP_IOMUXC_UART3_RXD 232 MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
252 MX8MP_IOMUXC_UART3_TXD 233 MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
253 >; 234 >;
254 }; 235 };
255 }; 236 };
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