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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mp-verdin.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8mp-verdin.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/freescale/imx8mp-verdin.dtsi (Version linux-6.10.14)


  1 // SPDX-License-Identifier: GPL-2.0-or-later O      1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2 /*                                                  2 /*
  3  * Copyright 2022 Toradex                           3  * Copyright 2022 Toradex
  4  */                                                 4  */
  5                                                     5 
  6 #include <dt-bindings/phy/phy-imx8-pcie.h>          6 #include <dt-bindings/phy/phy-imx8-pcie.h>
  7 #include <dt-bindings/pwm/pwm.h>                    7 #include <dt-bindings/pwm/pwm.h>
  8 #include "imx8mp.dtsi"                              8 #include "imx8mp.dtsi"
  9                                                     9 
 10 / {                                                10 / {
 11         chosen {                                   11         chosen {
 12                 stdout-path = &uart3;              12                 stdout-path = &uart3;
 13         };                                         13         };
 14                                                    14 
 15         aliases {                                  15         aliases {
 16                 /* Ethernet aliases to ensure      16                 /* Ethernet aliases to ensure correct MAC addresses */
 17                 ethernet0 = &eqos;                 17                 ethernet0 = &eqos;
 18                 ethernet1 = &fec;                  18                 ethernet1 = &fec;
 19                 rtc0 = &rtc_i2c;                   19                 rtc0 = &rtc_i2c;
 20                 rtc1 = &snvs_rtc;                  20                 rtc1 = &snvs_rtc;
 21         };                                         21         };
 22                                                    22 
 23         backlight: backlight {                     23         backlight: backlight {
 24                 compatible = "pwm-backlight";      24                 compatible = "pwm-backlight";
 25                 brightness-levels = <0 45 63 8     25                 brightness-levels = <0 45 63 88 119 158 203 255>;
 26                 default-brightness-level = <4>     26                 default-brightness-level = <4>;
 27                 /* Verdin I2S_2_D_OUT (DSI_1_B     27                 /* Verdin I2S_2_D_OUT (DSI_1_BKL_EN/DSI_1_BKL_EN_LVDS, SODIMM 46) */
 28                 enable-gpios = <&gpio5 1 GPIO_     28                 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 29                 pinctrl-names = "default";         29                 pinctrl-names = "default";
 30                 pinctrl-0 = <&pinctrl_i2s_2_d_     30                 pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
 31                 power-supply = <&reg_3p3v>;        31                 power-supply = <&reg_3p3v>;
 32                 /* Verdin PWM_3_DSI/PWM_3_DSI_     32                 /* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */
 33                 pwms = <&pwm3 0 6666667 PWM_PO     33                 pwms = <&pwm3 0 6666667 PWM_POLARITY_INVERTED>;
 34                 status = "disabled";               34                 status = "disabled";
 35         };                                         35         };
 36                                                    36 
 37         backlight_mezzanine: backlight-mezzani     37         backlight_mezzanine: backlight-mezzanine {
 38                 compatible = "pwm-backlight";      38                 compatible = "pwm-backlight";
 39                 brightness-levels = <0 45 63 8     39                 brightness-levels = <0 45 63 88 119 158 203 255>;
 40                 default-brightness-level = <4>     40                 default-brightness-level = <4>;
 41                 /* Verdin GPIO 4 (SODIMM 212)      41                 /* Verdin GPIO 4 (SODIMM 212) */
 42                 enable-gpios = <&gpio1 6 GPIO_     42                 enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
 43                 /* Verdin PWM_2 (SODIMM 16) */     43                 /* Verdin PWM_2 (SODIMM 16) */
 44                 pwms = <&pwm2 0 6666667 PWM_PO     44                 pwms = <&pwm2 0 6666667 PWM_POLARITY_INVERTED>;
 45                 status = "disabled";               45                 status = "disabled";
 46         };                                         46         };
 47                                                    47 
 48         connector {                                48         connector {
 49                 compatible = "gpio-usb-b-conne     49                 compatible = "gpio-usb-b-connector", "usb-b-connector";
 50                 id-gpios = <&gpio2 10 GPIO_ACT     50                 id-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
 51                 label = "Type-C";                  51                 label = "Type-C";
 52                 pinctrl-names = "default";         52                 pinctrl-names = "default";
 53                 pinctrl-0 = <&pinctrl_usb_1_id     53                 pinctrl-0 = <&pinctrl_usb_1_id>;
 54                 self-powered;                      54                 self-powered;
 55                 type = "micro";                    55                 type = "micro";
 56                 vbus-supply = <&reg_usb1_vbus>     56                 vbus-supply = <&reg_usb1_vbus>;
 57                                                    57 
 58                 port {                             58                 port {
 59                         usb_dr_connector: endp     59                         usb_dr_connector: endpoint {
 60                                 remote-endpoin     60                                 remote-endpoint = <&usb3_dwc>;
 61                         };                         61                         };
 62                 };                                 62                 };
 63         };                                         63         };
 64                                                    64 
 65         gpio-keys {                                65         gpio-keys {
 66                 compatible = "gpio-keys";          66                 compatible = "gpio-keys";
 67                 pinctrl-names = "default";         67                 pinctrl-names = "default";
 68                 pinctrl-0 = <&pinctrl_gpio_key     68                 pinctrl-0 = <&pinctrl_gpio_keys>;
 69                                                    69 
 70                 key-wakeup {                       70                 key-wakeup {
 71                         debounce-interval = <1     71                         debounce-interval = <10>;
 72                         /* Verdin CTRL_WAKE1_M     72                         /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */
 73                         gpios = <&gpio4 0 GPIO     73                         gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
 74                         label = "Wake-Up";         74                         label = "Wake-Up";
 75                         linux,code = <KEY_WAKE     75                         linux,code = <KEY_WAKEUP>;
 76                         wakeup-source;             76                         wakeup-source;
 77                 };                                 77                 };
 78         };                                         78         };
 79                                                    79 
 80         sound_hdmi: sound-hdmi {               << 
 81                 compatible = "fsl,imx-audio-hd << 
 82                 model = "audio-hdmi";          << 
 83                 audio-cpu = <&aud2htx>;        << 
 84                 hdmi-out;                      << 
 85                 status = "disabled";           << 
 86         };                                     << 
 87                                                << 
 88         /* Carrier Board Supplies */               80         /* Carrier Board Supplies */
 89         reg_1p8v: regulator-1p8v {                 81         reg_1p8v: regulator-1p8v {
 90                 compatible = "regulator-fixed"     82                 compatible = "regulator-fixed";
 91                 regulator-max-microvolt = <180     83                 regulator-max-microvolt = <1800000>;
 92                 regulator-min-microvolt = <180     84                 regulator-min-microvolt = <1800000>;
 93                 regulator-name = "+V1.8_SW";       85                 regulator-name = "+V1.8_SW";
 94         };                                         86         };
 95                                                    87 
 96         reg_3p3v: regulator-3p3v {                 88         reg_3p3v: regulator-3p3v {
 97                 compatible = "regulator-fixed"     89                 compatible = "regulator-fixed";
 98                 regulator-max-microvolt = <330     90                 regulator-max-microvolt = <3300000>;
 99                 regulator-min-microvolt = <330     91                 regulator-min-microvolt = <3300000>;
100                 regulator-name = "+V3.3_SW";       92                 regulator-name = "+V3.3_SW";
101         };                                         93         };
102                                                    94 
103         reg_5p0v: regulator-5p0v {                 95         reg_5p0v: regulator-5p0v {
104                 compatible = "regulator-fixed"     96                 compatible = "regulator-fixed";
105                 regulator-max-microvolt = <500     97                 regulator-max-microvolt = <5000000>;
106                 regulator-min-microvolt = <500     98                 regulator-min-microvolt = <5000000>;
107                 regulator-name = "+V5_SW";         99                 regulator-name = "+V5_SW";
108         };                                        100         };
109                                                   101 
110         /* Non PMIC On-module Supplies */         102         /* Non PMIC On-module Supplies */
111         reg_module_eth1phy: regulator-module-e    103         reg_module_eth1phy: regulator-module-eth1phy {
112                 compatible = "regulator-fixed"    104                 compatible = "regulator-fixed";
113                 enable-active-high;               105                 enable-active-high;
114                 gpio = <&gpio2 20 GPIO_ACTIVE_    106                 gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
115                 off-on-delay-us = <500000>;       107                 off-on-delay-us = <500000>;
116                 pinctrl-names = "default";        108                 pinctrl-names = "default";
117                 pinctrl-0 = <&pinctrl_reg_eth>    109                 pinctrl-0 = <&pinctrl_reg_eth>;
118                 regulator-always-on;              110                 regulator-always-on;
119                 regulator-boot-on;                111                 regulator-boot-on;
120                 regulator-max-microvolt = <330    112                 regulator-max-microvolt = <3300000>;
121                 regulator-min-microvolt = <330    113                 regulator-min-microvolt = <3300000>;
122                 regulator-name = "On-module +V    114                 regulator-name = "On-module +V3.3_ETH";
123                 startup-delay-us = <200000>;      115                 startup-delay-us = <200000>;
124                 vin-supply = <&reg_vdd_3v3>;      116                 vin-supply = <&reg_vdd_3v3>;
125         };                                        117         };
126                                                   118 
127         /*                                        119         /*
128          * By default we enable CTRL_SLEEP_MOC    120          * By default we enable CTRL_SLEEP_MOCI#, this is required to have
129          * peripherals on the carrier board po    121          * peripherals on the carrier board powered.
130          * If more granularity or power saving    122          * If more granularity or power saving is required this can be disabled
131          * in the carrier board device tree fi    123          * in the carrier board device tree files.
132          */                                       124          */
133         reg_force_sleep_moci: regulator-force-    125         reg_force_sleep_moci: regulator-force-sleep-moci {
134                 compatible = "regulator-fixed"    126                 compatible = "regulator-fixed";
135                 enable-active-high;               127                 enable-active-high;
136                 /* Verdin CTRL_SLEEP_MOCI# (SO    128                 /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
137                 gpio = <&gpio4 29 GPIO_ACTIVE_    129                 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
138                 regulator-always-on;              130                 regulator-always-on;
139                 regulator-boot-on;                131                 regulator-boot-on;
140                 regulator-name = "CTRL_SLEEP_M    132                 regulator-name = "CTRL_SLEEP_MOCI#";
141         };                                        133         };
142                                                   134 
143         reg_usb1_vbus: regulator-usb1-vbus {      135         reg_usb1_vbus: regulator-usb1-vbus {
144                 compatible = "regulator-fixed"    136                 compatible = "regulator-fixed";
145                 enable-active-high;               137                 enable-active-high;
146                 /* Verdin USB_1_EN (SODIMM 155    138                 /* Verdin USB_1_EN (SODIMM 155) */
147                 gpio = <&gpio1 12 GPIO_ACTIVE_    139                 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
148                 pinctrl-names = "default";        140                 pinctrl-names = "default";
149                 pinctrl-0 = <&pinctrl_usb1_vbu    141                 pinctrl-0 = <&pinctrl_usb1_vbus>;
150                 regulator-max-microvolt = <500    142                 regulator-max-microvolt = <5000000>;
151                 regulator-min-microvolt = <500    143                 regulator-min-microvolt = <5000000>;
152                 regulator-name = "USB_1_EN";      144                 regulator-name = "USB_1_EN";
153         };                                        145         };
154                                                   146 
155         reg_usb2_vbus: regulator-usb2-vbus {      147         reg_usb2_vbus: regulator-usb2-vbus {
156                 compatible = "regulator-fixed"    148                 compatible = "regulator-fixed";
157                 enable-active-high;               149                 enable-active-high;
158                 /* Verdin USB_2_EN (SODIMM 185    150                 /* Verdin USB_2_EN (SODIMM 185) */
159                 gpio = <&gpio1 14 GPIO_ACTIVE_    151                 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
160                 pinctrl-names = "default";        152                 pinctrl-names = "default";
161                 pinctrl-0 = <&pinctrl_usb2_vbu    153                 pinctrl-0 = <&pinctrl_usb2_vbus>;
162                 regulator-max-microvolt = <500    154                 regulator-max-microvolt = <5000000>;
163                 regulator-min-microvolt = <500    155                 regulator-min-microvolt = <5000000>;
164                 regulator-name = "USB_2_EN";      156                 regulator-name = "USB_2_EN";
165         };                                        157         };
166                                                   158 
167         reg_usdhc2_vmmc: regulator-usdhc2 {       159         reg_usdhc2_vmmc: regulator-usdhc2 {
168                 compatible = "regulator-fixed"    160                 compatible = "regulator-fixed";
169                 enable-active-high;               161                 enable-active-high;
170                 /* Verdin SD_1_PWR_EN (SODIMM     162                 /* Verdin SD_1_PWR_EN (SODIMM 76) */
171                 gpio = <&gpio4 22 GPIO_ACTIVE_    163                 gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
172                 off-on-delay-us = <100000>;       164                 off-on-delay-us = <100000>;
173                 pinctrl-names = "default";        165                 pinctrl-names = "default";
174                 pinctrl-0 = <&pinctrl_usdhc2_p    166                 pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
175                 regulator-max-microvolt = <330    167                 regulator-max-microvolt = <3300000>;
176                 regulator-min-microvolt = <330    168                 regulator-min-microvolt = <3300000>;
177                 regulator-name = "+V3.3_SD";      169                 regulator-name = "+V3.3_SD";
178                 startup-delay-us = <2000>;        170                 startup-delay-us = <2000>;
179         };                                        171         };
180                                                   172 
181         reserved-memory {                         173         reserved-memory {
182                 #address-cells = <2>;             174                 #address-cells = <2>;
183                 #size-cells = <2>;                175                 #size-cells = <2>;
184                 ranges;                           176                 ranges;
185                                                   177 
186                 /* Use the kernel configuratio    178                 /* Use the kernel configuration settings instead */
187                 /delete-node/ linux,cma;          179                 /delete-node/ linux,cma;
188         };                                        180         };
189 };                                                181 };
190                                                   182 
191 &A53_0 {                                          183 &A53_0 {
192         cpu-supply = <&reg_vdd_arm>;              184         cpu-supply = <&reg_vdd_arm>;
193 };                                                185 };
194                                                   186 
195 &A53_1 {                                          187 &A53_1 {
196         cpu-supply = <&reg_vdd_arm>;              188         cpu-supply = <&reg_vdd_arm>;
197 };                                                189 };
198                                                   190 
199 &A53_2 {                                          191 &A53_2 {
200         cpu-supply = <&reg_vdd_arm>;              192         cpu-supply = <&reg_vdd_arm>;
201 };                                                193 };
202                                                   194 
203 &A53_3 {                                          195 &A53_3 {
204         cpu-supply = <&reg_vdd_arm>;              196         cpu-supply = <&reg_vdd_arm>;
205 };                                                197 };
206                                                   198 
207 &cpu_alert0 {                                     199 &cpu_alert0 {
208         temperature = <95000>;                    200         temperature = <95000>;
209 };                                                201 };
210                                                   202 
211 &cpu_crit0 {                                      203 &cpu_crit0 {
212         temperature = <105000>;                   204         temperature = <105000>;
213 };                                                205 };
214                                                   206 
215 /* Verdin SPI_1 */                                207 /* Verdin SPI_1 */
216 &ecspi1 {                                         208 &ecspi1 {
217         #address-cells = <1>;                     209         #address-cells = <1>;
218         #size-cells = <0>;                        210         #size-cells = <0>;
219         cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;    211         cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
220         pinctrl-names = "default";                212         pinctrl-names = "default";
221         pinctrl-0 = <&pinctrl_ecspi1>;            213         pinctrl-0 = <&pinctrl_ecspi1>;
222 };                                                214 };
223                                                   215 
224 /* Verdin ETH_1 (On-module PHY) */                216 /* Verdin ETH_1 (On-module PHY) */
225 &eqos {                                           217 &eqos {
226         phy-handle = <&ethphy0>;                  218         phy-handle = <&ethphy0>;
227         phy-mode = "rgmii-id";                    219         phy-mode = "rgmii-id";
228         pinctrl-names = "default";                220         pinctrl-names = "default";
229         pinctrl-0 = <&pinctrl_eqos>;              221         pinctrl-0 = <&pinctrl_eqos>;
230         snps,force_thresh_dma_mode;               222         snps,force_thresh_dma_mode;
231         snps,mtl-rx-config = <&mtl_rx_setup>;     223         snps,mtl-rx-config = <&mtl_rx_setup>;
232         snps,mtl-tx-config = <&mtl_tx_setup>;     224         snps,mtl-tx-config = <&mtl_tx_setup>;
233                                                   225 
234         mdio {                                    226         mdio {
235                 compatible = "snps,dwmac-mdio"    227                 compatible = "snps,dwmac-mdio";
236                 #address-cells = <1>;             228                 #address-cells = <1>;
237                 #size-cells = <0>;                229                 #size-cells = <0>;
238                                                   230 
239                 ethphy0: ethernet-phy@7 {         231                 ethphy0: ethernet-phy@7 {
240                         compatible = "ethernet    232                         compatible = "ethernet-phy-ieee802.3-c22";
241                         eee-broken-100tx;         233                         eee-broken-100tx;
242                         eee-broken-1000t;         234                         eee-broken-1000t;
243                         interrupt-parent = <&g    235                         interrupt-parent = <&gpio1>;
244                         interrupts = <10 IRQ_T    236                         interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
245                         micrel,led-mode = <0>;    237                         micrel,led-mode = <0>;
246                         reg = <7>;                238                         reg = <7>;
247                 };                                239                 };
248         };                                        240         };
249                                                   241 
250         mtl_rx_setup: rx-queues-config {          242         mtl_rx_setup: rx-queues-config {
251                 snps,rx-queues-to-use = <5>;      243                 snps,rx-queues-to-use = <5>;
                                                   >> 244                 snps,rx-sched-sp;
252                                                   245 
253                 queue0 {                          246                 queue0 {
254                         snps,dcb-algorithm;       247                         snps,dcb-algorithm;
255                         snps,priority = <0x1>;    248                         snps,priority = <0x1>;
256                         snps,map-to-dma-channe    249                         snps,map-to-dma-channel = <0>;
257                 };                                250                 };
258                                                   251 
259                 queue1 {                          252                 queue1 {
260                         snps,dcb-algorithm;       253                         snps,dcb-algorithm;
261                         snps,priority = <0x2>;    254                         snps,priority = <0x2>;
262                         snps,map-to-dma-channe    255                         snps,map-to-dma-channel = <1>;
263                 };                                256                 };
264                                                   257 
265                 queue2 {                          258                 queue2 {
266                         snps,dcb-algorithm;       259                         snps,dcb-algorithm;
267                         snps,priority = <0x4>;    260                         snps,priority = <0x4>;
268                         snps,map-to-dma-channe    261                         snps,map-to-dma-channel = <2>;
269                 };                                262                 };
270                                                   263 
271                 queue3 {                          264                 queue3 {
272                         snps,dcb-algorithm;       265                         snps,dcb-algorithm;
273                         snps,priority = <0x8>;    266                         snps,priority = <0x8>;
274                         snps,map-to-dma-channe    267                         snps,map-to-dma-channel = <3>;
275                 };                                268                 };
276                                                   269 
277                 queue4 {                          270                 queue4 {
278                         snps,dcb-algorithm;       271                         snps,dcb-algorithm;
279                         snps,priority = <0xf0>    272                         snps,priority = <0xf0>;
280                         snps,map-to-dma-channe    273                         snps,map-to-dma-channel = <4>;
281                 };                                274                 };
282         };                                        275         };
283                                                   276 
284         mtl_tx_setup: tx-queues-config {          277         mtl_tx_setup: tx-queues-config {
285                 snps,tx-queues-to-use = <5>;      278                 snps,tx-queues-to-use = <5>;
                                                   >> 279                 snps,tx-sched-sp;
286                                                   280 
287                 queue0 {                          281                 queue0 {
288                         snps,dcb-algorithm;       282                         snps,dcb-algorithm;
289                         snps,priority = <0x1>;    283                         snps,priority = <0x1>;
290                 };                                284                 };
291                                                   285 
292                 queue1 {                          286                 queue1 {
293                         snps,dcb-algorithm;       287                         snps,dcb-algorithm;
294                         snps,priority = <0x2>;    288                         snps,priority = <0x2>;
295                 };                                289                 };
296                                                   290 
297                 queue2 {                          291                 queue2 {
298                         snps,dcb-algorithm;       292                         snps,dcb-algorithm;
299                         snps,priority = <0x4>;    293                         snps,priority = <0x4>;
300                 };                                294                 };
301                                                   295 
302                 queue3 {                          296                 queue3 {
303                         snps,dcb-algorithm;       297                         snps,dcb-algorithm;
304                         snps,priority = <0x8>;    298                         snps,priority = <0x8>;
305                 };                                299                 };
306                                                   300 
307                 queue4 {                          301                 queue4 {
308                         snps,dcb-algorithm;       302                         snps,dcb-algorithm;
309                         snps,priority = <0xf0>    303                         snps,priority = <0xf0>;
310                 };                                304                 };
311         };                                        305         };
312 };                                                306 };
313                                                   307 
314 /* Verdin ETH_2_RGMII */                          308 /* Verdin ETH_2_RGMII */
315 &fec {                                            309 &fec {
316         fsl,magic-packet;                         310         fsl,magic-packet;
317         phy-handle = <&ethphy1>;                  311         phy-handle = <&ethphy1>;
318         phy-mode = "rgmii-id";                    312         phy-mode = "rgmii-id";
319         pinctrl-names = "default", "sleep";       313         pinctrl-names = "default", "sleep";
320         pinctrl-0 = <&pinctrl_fec>;               314         pinctrl-0 = <&pinctrl_fec>;
321         pinctrl-1 = <&pinctrl_fec_sleep>;         315         pinctrl-1 = <&pinctrl_fec_sleep>;
322                                                   316 
323         mdio {                                    317         mdio {
324                 #address-cells = <1>;             318                 #address-cells = <1>;
325                 #size-cells = <0>;                319                 #size-cells = <0>;
326                                                   320 
327                 ethphy1: ethernet-phy@7 {         321                 ethphy1: ethernet-phy@7 {
328                         compatible = "ethernet    322                         compatible = "ethernet-phy-ieee802.3-c22";
329                         interrupt-parent = <&g    323                         interrupt-parent = <&gpio4>;
330                         interrupts = <18 IRQ_T    324                         interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
331                         micrel,led-mode = <0>;    325                         micrel,led-mode = <0>;
332                         reg = <7>;                326                         reg = <7>;
333                 };                                327                 };
334         };                                        328         };
335 };                                                329 };
336                                                   330 
337 /* Verdin CAN_1 */                                331 /* Verdin CAN_1 */
338 &flexcan1 {                                       332 &flexcan1 {
339         pinctrl-names = "default";                333         pinctrl-names = "default";
340         pinctrl-0 = <&pinctrl_flexcan1>;          334         pinctrl-0 = <&pinctrl_flexcan1>;
341         status = "disabled";                      335         status = "disabled";
342 };                                                336 };
343                                                   337 
344 /* Verdin CAN_2 */                                338 /* Verdin CAN_2 */
345 &flexcan2 {                                       339 &flexcan2 {
346         pinctrl-names = "default";                340         pinctrl-names = "default";
347         pinctrl-0 = <&pinctrl_flexcan2>;          341         pinctrl-0 = <&pinctrl_flexcan2>;
348         status = "disabled";                      342         status = "disabled";
349 };                                                343 };
350                                                   344 
351 /* Verdin QSPI_1 */                               345 /* Verdin QSPI_1 */
352 &flexspi {                                        346 &flexspi {
353         pinctrl-names = "default";                347         pinctrl-names = "default";
354         pinctrl-0 = <&pinctrl_flexspi0>;          348         pinctrl-0 = <&pinctrl_flexspi0>;
355 };                                                349 };
356                                                   350 
357 &gpio1 {                                          351 &gpio1 {
358         gpio-line-names = "SODIMM_206",           352         gpio-line-names = "SODIMM_206",
359                           "SODIMM_208",           353                           "SODIMM_208",
360                           "",                     354                           "",
361                           "",                     355                           "",
362                           "",                     356                           "",
363                           "SODIMM_210",           357                           "SODIMM_210",
364                           "SODIMM_212",           358                           "SODIMM_212",
365                           "SODIMM_216",           359                           "SODIMM_216",
366                           "SODIMM_218",           360                           "SODIMM_218",
367                           "",                     361                           "",
368                           "",                     362                           "",
369                           "SODIMM_16",            363                           "SODIMM_16",
370                           "SODIMM_155",           364                           "SODIMM_155",
371                           "SODIMM_157",           365                           "SODIMM_157",
372                           "SODIMM_185",           366                           "SODIMM_185",
373                           "SODIMM_91";            367                           "SODIMM_91";
374 };                                                368 };
375                                                   369 
376 &gpio2 {                                          370 &gpio2 {
377         gpio-line-names = "",                     371         gpio-line-names = "",
378                           "",                     372                           "",
379                           "",                     373                           "",
380                           "",                     374                           "",
381                           "",                     375                           "",
382                           "",                     376                           "",
383                           "SODIMM_143",           377                           "SODIMM_143",
384                           "SODIMM_141",           378                           "SODIMM_141",
385                           "",                     379                           "",
386                           "",                     380                           "",
387                           "SODIMM_161",           381                           "SODIMM_161",
388                           "",                     382                           "",
389                           "SODIMM_84",            383                           "SODIMM_84",
390                           "SODIMM_78",            384                           "SODIMM_78",
391                           "SODIMM_74",            385                           "SODIMM_74",
392                           "SODIMM_80",            386                           "SODIMM_80",
393                           "SODIMM_82",            387                           "SODIMM_82",
394                           "SODIMM_70",            388                           "SODIMM_70",
395                           "SODIMM_72";            389                           "SODIMM_72";
396 };                                                390 };
397                                                   391 
398 &gpio3 {                                          392 &gpio3 {
399         gpio-line-names = "SODIMM_52",            393         gpio-line-names = "SODIMM_52",
400                           "SODIMM_54",            394                           "SODIMM_54",
401                           "",                     395                           "",
402                           "",                     396                           "",
403                           "",                     397                           "",
404                           "",                     398                           "",
405                           "SODIMM_56",            399                           "SODIMM_56",
406                           "SODIMM_58",            400                           "SODIMM_58",
407                           "SODIMM_60",            401                           "SODIMM_60",
408                           "SODIMM_62",            402                           "SODIMM_62",
409                           "",                     403                           "",
410                           "",                     404                           "",
411                           "",                     405                           "",
412                           "",                     406                           "",
413                           "SODIMM_66",            407                           "SODIMM_66",
414                           "",                     408                           "",
415                           "SODIMM_64",            409                           "SODIMM_64",
416                           "",                     410                           "",
417                           "",                     411                           "",
418                           "SODIMM_34",            412                           "SODIMM_34",
419                           "SODIMM_19",            413                           "SODIMM_19",
420                           "",                     414                           "",
421                           "SODIMM_32",            415                           "SODIMM_32",
422                           "",                     416                           "",
423                           "",                     417                           "",
424                           "SODIMM_30",            418                           "SODIMM_30",
425                           "SODIMM_59",            419                           "SODIMM_59",
426                           "SODIMM_57",            420                           "SODIMM_57",
427                           "SODIMM_63",            421                           "SODIMM_63",
428                           "SODIMM_61";            422                           "SODIMM_61";
429 };                                                423 };
430                                                   424 
431 &gpio4 {                                          425 &gpio4 {
432         gpio-line-names = "SODIMM_252",           426         gpio-line-names = "SODIMM_252",
433                           "SODIMM_222",           427                           "SODIMM_222",
434                           "SODIMM_36",            428                           "SODIMM_36",
435                           "SODIMM_220",           429                           "SODIMM_220",
436                           "SODIMM_193",           430                           "SODIMM_193",
437                           "SODIMM_191",           431                           "SODIMM_191",
438                           "SODIMM_201",           432                           "SODIMM_201",
439                           "SODIMM_203",           433                           "SODIMM_203",
440                           "SODIMM_205",           434                           "SODIMM_205",
441                           "SODIMM_207",           435                           "SODIMM_207",
442                           "SODIMM_199",           436                           "SODIMM_199",
443                           "SODIMM_197",           437                           "SODIMM_197",
444                           "SODIMM_221",           438                           "SODIMM_221",
445                           "SODIMM_219",           439                           "SODIMM_219",
446                           "SODIMM_217",           440                           "SODIMM_217",
447                           "SODIMM_215",           441                           "SODIMM_215",
448                           "SODIMM_211",           442                           "SODIMM_211",
449                           "SODIMM_213",           443                           "SODIMM_213",
450                           "SODIMM_189",           444                           "SODIMM_189",
451                           "SODIMM_244",           445                           "SODIMM_244",
452                           "SODIMM_38",            446                           "SODIMM_38",
453                           "",                     447                           "",
454                           "SODIMM_76",            448                           "SODIMM_76",
455                           "SODIMM_135",           449                           "SODIMM_135",
456                           "SODIMM_133",           450                           "SODIMM_133",
457                           "SODIMM_17",            451                           "SODIMM_17",
458                           "SODIMM_24",            452                           "SODIMM_24",
459                           "SODIMM_26",            453                           "SODIMM_26",
460                           "SODIMM_21",            454                           "SODIMM_21",
461                           "SODIMM_256",           455                           "SODIMM_256",
462                           "SODIMM_48",            456                           "SODIMM_48",
463                           "SODIMM_44";            457                           "SODIMM_44";
464 };                                                458 };
465                                                   459 
466 /* Verdin HDMI_1 */                            << 
467 &hdmi_tx {                                     << 
468         ddc-i2c-bus = <&i2c5>;                 << 
469         pinctrl-names = "default";             << 
470         pinctrl-0 = <&pinctrl_hdmi>;           << 
471 };                                             << 
472                                                << 
473 /* On-module I2C */                               460 /* On-module I2C */
474 &i2c1 {                                           461 &i2c1 {
475         clock-frequency = <400000>;               462         clock-frequency = <400000>;
476         pinctrl-names = "default", "gpio";        463         pinctrl-names = "default", "gpio";
477         pinctrl-0 = <&pinctrl_i2c1>;              464         pinctrl-0 = <&pinctrl_i2c1>;
478         pinctrl-1 = <&pinctrl_i2c1_gpio>;         465         pinctrl-1 = <&pinctrl_i2c1_gpio>;
479         scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HI    466         scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
480         sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HI    467         sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
481         status = "okay";                          468         status = "okay";
482                                                   469 
483         pca9450: pmic@25 {                        470         pca9450: pmic@25 {
484                 compatible = "nxp,pca9450c";      471                 compatible = "nxp,pca9450c";
485                 interrupt-parent = <&gpio1>;      472                 interrupt-parent = <&gpio1>;
486                 /* PMIC PCA9450 PMIC_nINT GPIO    473                 /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
487                 interrupts = <3 IRQ_TYPE_LEVEL    474                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
488                 pinctrl-names = "default";        475                 pinctrl-names = "default";
489                 pinctrl-0 = <&pinctrl_pmic>;      476                 pinctrl-0 = <&pinctrl_pmic>;
490                 reg = <0x25>;                     477                 reg = <0x25>;
491                                                   478 
492                 /*                                479                 /*
493                  * The bootloader is expected     480                  * The bootloader is expected to switch on LDO4 for the on-module +V3.3_ADC and the
494                  * I2C level shifter for the T    481                  * I2C level shifter for the TLA2024 ADC behind this PMIC.
495                  */                               482                  */
496                                                   483 
497                 regulators {                      484                 regulators {
498                         BUCK1 {                   485                         BUCK1 {
499                                 regulator-alwa    486                                 regulator-always-on;
500                                 regulator-boot    487                                 regulator-boot-on;
501                                 regulator-max-    488                                 regulator-max-microvolt = <1000000>;
502                                 regulator-min-    489                                 regulator-min-microvolt = <720000>;
503                                 regulator-name    490                                 regulator-name = "On-module +VDD_SOC (BUCK1)";
504                                 regulator-ramp    491                                 regulator-ramp-delay = <3125>;
505                         };                        492                         };
506                                                   493 
507                         reg_vdd_arm: BUCK2 {      494                         reg_vdd_arm: BUCK2 {
508                                 nxp,dvs-run-vo    495                                 nxp,dvs-run-voltage = <950000>;
509                                 nxp,dvs-standb    496                                 nxp,dvs-standby-voltage = <850000>;
510                                 regulator-alwa    497                                 regulator-always-on;
511                                 regulator-boot    498                                 regulator-boot-on;
512                                 regulator-max-    499                                 regulator-max-microvolt = <1025000>;
513                                 regulator-min-    500                                 regulator-min-microvolt = <720000>;
514                                 regulator-name    501                                 regulator-name = "On-module +VDD_ARM (BUCK2)";
515                                 regulator-ramp    502                                 regulator-ramp-delay = <3125>;
516                         };                        503                         };
517                                                   504 
518                         reg_vdd_3v3: BUCK4 {      505                         reg_vdd_3v3: BUCK4 {
519                                 regulator-alwa    506                                 regulator-always-on;
520                                 regulator-boot    507                                 regulator-boot-on;
521                                 regulator-max-    508                                 regulator-max-microvolt = <3300000>;
522                                 regulator-min-    509                                 regulator-min-microvolt = <3300000>;
523                                 regulator-name    510                                 regulator-name = "On-module +V3.3 (BUCK4)";
524                         };                        511                         };
525                                                   512 
526                         reg_vdd_1v8: BUCK5 {      513                         reg_vdd_1v8: BUCK5 {
527                                 regulator-alwa    514                                 regulator-always-on;
528                                 regulator-boot    515                                 regulator-boot-on;
529                                 regulator-max-    516                                 regulator-max-microvolt = <1800000>;
530                                 regulator-min-    517                                 regulator-min-microvolt = <1800000>;
531                                 regulator-name    518                                 regulator-name = "PWR_1V8_MOCI (BUCK5)";
532                         };                        519                         };
533                                                   520 
534                         BUCK6 {                   521                         BUCK6 {
535                                 regulator-alwa    522                                 regulator-always-on;
536                                 regulator-boot    523                                 regulator-boot-on;
537                                 regulator-max-    524                                 regulator-max-microvolt = <1155000>;
538                                 regulator-min-    525                                 regulator-min-microvolt = <1045000>;
539                                 regulator-name    526                                 regulator-name = "On-module +VDD_DDR (BUCK6)";
540                         };                        527                         };
541                                                   528 
542                         LDO1 {                    529                         LDO1 {
543                                 regulator-alwa    530                                 regulator-always-on;
544                                 regulator-boot    531                                 regulator-boot-on;
545                                 regulator-max-    532                                 regulator-max-microvolt = <1950000>;
546                                 regulator-min-    533                                 regulator-min-microvolt = <1650000>;
547                                 regulator-name    534                                 regulator-name = "On-module +V1.8_SNVS (LDO1)";
548                         };                        535                         };
549                                                   536 
550                         LDO2 {                    537                         LDO2 {
551                                 regulator-alwa    538                                 regulator-always-on;
552                                 regulator-boot    539                                 regulator-boot-on;
553                                 regulator-max-    540                                 regulator-max-microvolt = <1150000>;
554                                 regulator-min-    541                                 regulator-min-microvolt = <800000>;
555                                 regulator-name    542                                 regulator-name = "On-module +V0.8_SNVS (LDO2)";
556                         };                        543                         };
557                                                   544 
558                         LDO3 {                    545                         LDO3 {
559                                 regulator-alwa    546                                 regulator-always-on;
560                                 regulator-boot    547                                 regulator-boot-on;
561                                 regulator-max-    548                                 regulator-max-microvolt = <1800000>;
562                                 regulator-min-    549                                 regulator-min-microvolt = <1800000>;
563                                 regulator-name    550                                 regulator-name = "On-module +V1.8A (LDO3)";
564                         };                        551                         };
565                                                   552 
566                         LDO4 {                    553                         LDO4 {
567                                 regulator-alwa    554                                 regulator-always-on;
568                                 regulator-boot    555                                 regulator-boot-on;
569                                 regulator-max-    556                                 regulator-max-microvolt = <3300000>;
570                                 regulator-min-    557                                 regulator-min-microvolt = <3300000>;
571                                 regulator-name    558                                 regulator-name = "On-module +V3.3_ADC (LDO4)";
572                         };                        559                         };
573                                                   560 
574                         reg_vdd_sdio: LDO5 {      561                         reg_vdd_sdio: LDO5 {
575                                 regulator-max-    562                                 regulator-max-microvolt = <3300000>;
576                                 regulator-min-    563                                 regulator-min-microvolt = <1800000>;
577                                 regulator-name    564                                 regulator-name = "On-module +V3.3_1.8_SD (LDO5)";
578                         };                        565                         };
579                 };                                566                 };
580         };                                        567         };
581                                                   568 
582         rtc_i2c: rtc@32 {                         569         rtc_i2c: rtc@32 {
583                 compatible = "epson,rx8130";      570                 compatible = "epson,rx8130";
584                 reg = <0x32>;                     571                 reg = <0x32>;
585         };                                        572         };
586                                                   573 
587         /* On-module temperature sensor */        574         /* On-module temperature sensor */
588         hwmon_temp_module: sensor@48 {            575         hwmon_temp_module: sensor@48 {
589                 compatible = "ti,tmp1075";        576                 compatible = "ti,tmp1075";
590                 reg = <0x48>;                     577                 reg = <0x48>;
591                 vs-supply = <&reg_vdd_1v8>;       578                 vs-supply = <&reg_vdd_1v8>;
592         };                                        579         };
593                                                   580 
594         adc@49 {                                  581         adc@49 {
595                 compatible = "ti,ads1015";        582                 compatible = "ti,ads1015";
596                 reg = <0x49>;                     583                 reg = <0x49>;
597                 #address-cells = <1>;             584                 #address-cells = <1>;
598                 #size-cells = <0>;                585                 #size-cells = <0>;
599                                                   586 
600                 /* Verdin I2C_1 (ADC_4 - ADC_3    587                 /* Verdin I2C_1 (ADC_4 - ADC_3) */
601                 channel@0 {                       588                 channel@0 {
602                         reg = <0>;                589                         reg = <0>;
603                         ti,datarate = <4>;        590                         ti,datarate = <4>;
604                         ti,gain = <2>;            591                         ti,gain = <2>;
605                 };                                592                 };
606                                                   593 
607                 /* Verdin I2C_1 (ADC_4 - ADC_1    594                 /* Verdin I2C_1 (ADC_4 - ADC_1) */
608                 channel@1 {                       595                 channel@1 {
609                         reg = <1>;                596                         reg = <1>;
610                         ti,datarate = <4>;        597                         ti,datarate = <4>;
611                         ti,gain = <2>;            598                         ti,gain = <2>;
612                 };                                599                 };
613                                                   600 
614                 /* Verdin I2C_1 (ADC_3 - ADC_1    601                 /* Verdin I2C_1 (ADC_3 - ADC_1) */
615                 channel@2 {                       602                 channel@2 {
616                         reg = <2>;                603                         reg = <2>;
617                         ti,datarate = <4>;        604                         ti,datarate = <4>;
618                         ti,gain = <2>;            605                         ti,gain = <2>;
619                 };                                606                 };
620                                                   607 
621                 /* Verdin I2C_1 (ADC_2 - ADC_1    608                 /* Verdin I2C_1 (ADC_2 - ADC_1) */
622                 channel@3 {                       609                 channel@3 {
623                         reg = <3>;                610                         reg = <3>;
624                         ti,datarate = <4>;        611                         ti,datarate = <4>;
625                         ti,gain = <2>;            612                         ti,gain = <2>;
626                 };                                613                 };
627                                                   614 
628                 /* Verdin I2C_1 ADC_4 */          615                 /* Verdin I2C_1 ADC_4 */
629                 channel@4 {                       616                 channel@4 {
630                         reg = <4>;                617                         reg = <4>;
631                         ti,datarate = <4>;        618                         ti,datarate = <4>;
632                         ti,gain = <2>;            619                         ti,gain = <2>;
633                 };                                620                 };
634                                                   621 
635                 /* Verdin I2C_1 ADC_3 */          622                 /* Verdin I2C_1 ADC_3 */
636                 channel@5 {                       623                 channel@5 {
637                         reg = <5>;                624                         reg = <5>;
638                         ti,datarate = <4>;        625                         ti,datarate = <4>;
639                         ti,gain = <2>;            626                         ti,gain = <2>;
640                 };                                627                 };
641                                                   628 
642                 /* Verdin I2C_1 ADC_2 */          629                 /* Verdin I2C_1 ADC_2 */
643                 channel@6 {                       630                 channel@6 {
644                         reg = <6>;                631                         reg = <6>;
645                         ti,datarate = <4>;        632                         ti,datarate = <4>;
646                         ti,gain = <2>;            633                         ti,gain = <2>;
647                 };                                634                 };
648                                                   635 
649                 /* Verdin I2C_1 ADC_1 */          636                 /* Verdin I2C_1 ADC_1 */
650                 channel@7 {                       637                 channel@7 {
651                         reg = <7>;                638                         reg = <7>;
652                         ti,datarate = <4>;        639                         ti,datarate = <4>;
653                         ti,gain = <2>;            640                         ti,gain = <2>;
654                 };                                641                 };
655         };                                        642         };
656                                                   643 
657         eeprom@50 {                               644         eeprom@50 {
658                 compatible = "st,24c02";          645                 compatible = "st,24c02";
659                 pagesize = <16>;                  646                 pagesize = <16>;
660                 reg = <0x50>;                     647                 reg = <0x50>;
661         };                                        648         };
662 };                                                649 };
663                                                   650 
664 /* Verdin I2C_2_DSI */                            651 /* Verdin I2C_2_DSI */
665 &i2c2 {                                           652 &i2c2 {
666         clock-frequency = <400000>;            !! 653         /* Lower frequency to avoid DDC/EDID issues with certain displays/screens. */
                                                   >> 654         clock-frequency = <10000>;
667         pinctrl-names = "default", "gpio";        655         pinctrl-names = "default", "gpio";
668         pinctrl-0 = <&pinctrl_i2c2>;              656         pinctrl-0 = <&pinctrl_i2c2>;
669         pinctrl-1 = <&pinctrl_i2c2_gpio>;         657         pinctrl-1 = <&pinctrl_i2c2_gpio>;
670         scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HI    658         scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
671         sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HI    659         sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
672                                                   660 
673         atmel_mxt_ts_mezzanine: touch-mezzanin    661         atmel_mxt_ts_mezzanine: touch-mezzanine@4a {
674                 compatible = "atmel,maxtouch";    662                 compatible = "atmel,maxtouch";
675                 /* Verdin GPIO_3 (SODIMM 210)     663                 /* Verdin GPIO_3 (SODIMM 210) */
676                 interrupt-parent = <&gpio1>;      664                 interrupt-parent = <&gpio1>;
677                 interrupts = <5 IRQ_TYPE_EDGE_    665                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
678                 reg = <0x4a>;                     666                 reg = <0x4a>;
679                 /* Verdin GPIO_2 (SODIMM 208)     667                 /* Verdin GPIO_2 (SODIMM 208) */
680                 reset-gpios = <&gpio1 1 GPIO_A    668                 reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
681                 status = "disabled";              669                 status = "disabled";
682         };                                        670         };
683 };                                                671 };
684                                                   672 
685 /* Verdin I2C_4_CSI */                            673 /* Verdin I2C_4_CSI */
686 &i2c3 {                                           674 &i2c3 {
687         clock-frequency = <400000>;               675         clock-frequency = <400000>;
688         pinctrl-names = "default", "gpio";        676         pinctrl-names = "default", "gpio";
689         pinctrl-0 = <&pinctrl_i2c3>;              677         pinctrl-0 = <&pinctrl_i2c3>;
690         pinctrl-1 = <&pinctrl_i2c3_gpio>;         678         pinctrl-1 = <&pinctrl_i2c3_gpio>;
691         scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HI    679         scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
692         sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HI    680         sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
693 };                                                681 };
694                                                   682 
695 /* Verdin I2C_1 */                                683 /* Verdin I2C_1 */
696 &i2c4 {                                           684 &i2c4 {
697         clock-frequency = <400000>;               685         clock-frequency = <400000>;
698         pinctrl-names = "default", "gpio";        686         pinctrl-names = "default", "gpio";
699         pinctrl-0 = <&pinctrl_i2c4>;              687         pinctrl-0 = <&pinctrl_i2c4>;
700         pinctrl-1 = <&pinctrl_i2c4_gpio>;         688         pinctrl-1 = <&pinctrl_i2c4_gpio>;
701         scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HI    689         scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
702         sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HI    690         sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
703                                                   691 
704         gpio_expander_21: gpio-expander@21 {      692         gpio_expander_21: gpio-expander@21 {
705                 compatible = "nxp,pcal6416";      693                 compatible = "nxp,pcal6416";
706                 #gpio-cells = <2>;                694                 #gpio-cells = <2>;
707                 gpio-controller;                  695                 gpio-controller;
708                 reg = <0x21>;                     696                 reg = <0x21>;
709                 vcc-supply = <&reg_3p3v>;         697                 vcc-supply = <&reg_3p3v>;
710                 status = "disabled";              698                 status = "disabled";
711         };                                        699         };
712                                                   700 
713         lvds_ti_sn65dsi84: bridge@2c {            701         lvds_ti_sn65dsi84: bridge@2c {
714                 compatible = "ti,sn65dsi84";      702                 compatible = "ti,sn65dsi84";
715                 /* Verdin GPIO_9_DSI (SN65DSI8    703                 /* Verdin GPIO_9_DSI (SN65DSI84 IRQ, SODIMM 17, unused) */
716                 /* Verdin GPIO_10_DSI (SODIMM     704                 /* Verdin GPIO_10_DSI (SODIMM 21) */
717                 enable-gpios = <&gpio4 28 GPIO    705                 enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
718                 pinctrl-names = "default";        706                 pinctrl-names = "default";
719                 pinctrl-0 = <&pinctrl_gpio_10_    707                 pinctrl-0 = <&pinctrl_gpio_10_dsi>;
720                 reg = <0x2c>;                     708                 reg = <0x2c>;
721                 status = "disabled";              709                 status = "disabled";
722         };                                        710         };
723                                                   711 
724         /* Current measurement into module VCC    712         /* Current measurement into module VCC */
725         hwmon: hwmon@40 {                         713         hwmon: hwmon@40 {
726                 compatible = "ti,ina219";         714                 compatible = "ti,ina219";
727                 reg = <0x40>;                     715                 reg = <0x40>;
728                 shunt-resistor = <10000>;         716                 shunt-resistor = <10000>;
729                 status = "disabled";              717                 status = "disabled";
730         };                                        718         };
731                                                   719 
732         hdmi_lontium_lt8912: hdmi@48 {            720         hdmi_lontium_lt8912: hdmi@48 {
733                 compatible = "lontium,lt8912b"    721                 compatible = "lontium,lt8912b";
734                 pinctrl-names = "default";        722                 pinctrl-names = "default";
735                 pinctrl-0 = <&pinctrl_gpio_10_    723                 pinctrl-0 = <&pinctrl_gpio_10_dsi>, <&pinctrl_pwm_3_dsi_hpd_gpio>;
736                 reg = <0x48>;                     724                 reg = <0x48>;
737                 /* Verdin GPIO_9_DSI (LT8912 I    725                 /* Verdin GPIO_9_DSI (LT8912 INT, SODIMM 17, unused) */
738                 /* Verdin GPIO_10_DSI (SODIMM     726                 /* Verdin GPIO_10_DSI (SODIMM 21) */
739                 reset-gpios = <&gpio4 28 GPIO_    727                 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
740                 status = "disabled";              728                 status = "disabled";
741         };                                        729         };
742                                                   730 
743         atmel_mxt_ts: touch@4a {                  731         atmel_mxt_ts: touch@4a {
744                 compatible = "atmel,maxtouch";    732                 compatible = "atmel,maxtouch";
745                 /*                                733                 /*
746                  * Verdin GPIO_9_DSI              734                  * Verdin GPIO_9_DSI
747                  * (TOUCH_INT#, SODIMM 17, als    735                  * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI84 IRQ albeit currently unused)
748                  */                               736                  */
749                 interrupt-parent = <&gpio4>;      737                 interrupt-parent = <&gpio4>;
750                 interrupts = <25 IRQ_TYPE_EDGE    738                 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
751                 pinctrl-names = "default";        739                 pinctrl-names = "default";
752                 pinctrl-0 = <&pinctrl_gpio_9_d    740                 pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
753                 reg = <0x4a>;                     741                 reg = <0x4a>;
754                 /* Verdin I2S_2_BCLK (TOUCH_RE    742                 /* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
755                 reset-gpios = <&gpio5 0 GPIO_A    743                 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
756                 status = "disabled";              744                 status = "disabled";
757         };                                        745         };
758                                                   746 
759         /* Temperature sensor on carrier board    747         /* Temperature sensor on carrier board */
760         hwmon_temp: sensor@4f {                   748         hwmon_temp: sensor@4f {
761                 compatible = "ti,tmp75c";         749                 compatible = "ti,tmp75c";
762                 reg = <0x4f>;                     750                 reg = <0x4f>;
763                 status = "disabled";              751                 status = "disabled";
764         };                                        752         };
765                                                   753 
766         /* EEPROM on display adapter (MIPI DSI    754         /* EEPROM on display adapter (MIPI DSI Display Adapter) */
767         eeprom_display_adapter: eeprom@50 {       755         eeprom_display_adapter: eeprom@50 {
768                 compatible = "st,24c02";          756                 compatible = "st,24c02";
769                 pagesize = <16>;                  757                 pagesize = <16>;
770                 reg = <0x50>;                     758                 reg = <0x50>;
771                 status = "disabled";              759                 status = "disabled";
772         };                                        760         };
773                                                   761 
774         /* EEPROM on carrier board */             762         /* EEPROM on carrier board */
775         eeprom_carrier_board: eeprom@57 {         763         eeprom_carrier_board: eeprom@57 {
776                 compatible = "st,24c02";          764                 compatible = "st,24c02";
777                 pagesize = <16>;                  765                 pagesize = <16>;
778                 reg = <0x57>;                     766                 reg = <0x57>;
779                 status = "disabled";              767                 status = "disabled";
780         };                                        768         };
781 };                                                769 };
782                                                   770 
783 /* Verdin I2C_3_HDMI */                           771 /* Verdin I2C_3_HDMI */
784 &i2c5 {                                           772 &i2c5 {
785         clock-frequency = <100000>;               773         clock-frequency = <100000>;
786         pinctrl-names = "default", "gpio";        774         pinctrl-names = "default", "gpio";
787         pinctrl-0 = <&pinctrl_i2c5>;              775         pinctrl-0 = <&pinctrl_i2c5>;
788         pinctrl-1 = <&pinctrl_i2c5_gpio>;         776         pinctrl-1 = <&pinctrl_i2c5_gpio>;
789         scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HI    777         scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
790         sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HI    778         sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
791 };                                                779 };
792                                                   780 
793 /* Verdin PCIE_1 */                               781 /* Verdin PCIE_1 */
794 &pcie {                                           782 &pcie {
795         pinctrl-names = "default";                783         pinctrl-names = "default";
796         pinctrl-0 = <&pinctrl_pcie>;              784         pinctrl-0 = <&pinctrl_pcie>;
797         /* PCIE_1_RESET# (SODIMM 244) */          785         /* PCIE_1_RESET# (SODIMM 244) */
798         reset-gpio = <&gpio4 19 GPIO_ACTIVE_LO    786         reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
799 };                                                787 };
800                                                   788 
801 &pcie_phy {                                       789 &pcie_phy {
802         clocks = <&hsio_blk_ctrl>;                790         clocks = <&hsio_blk_ctrl>;
803         clock-names = "ref";                      791         clock-names = "ref";
804         fsl,clkreq-unsupported;                   792         fsl,clkreq-unsupported;
805         fsl,refclk-pad-mode = <IMX8_PCIE_REFCL    793         fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
806 };                                                794 };
807                                                   795 
808 /* Verdin PWM_1 */                                796 /* Verdin PWM_1 */
809 &pwm1 {                                           797 &pwm1 {
810         pinctrl-names = "default";                798         pinctrl-names = "default";
811         pinctrl-0 = <&pinctrl_pwm_1>;             799         pinctrl-0 = <&pinctrl_pwm_1>;
812         #pwm-cells = <3>;                         800         #pwm-cells = <3>;
813 };                                                801 };
814                                                   802 
815 /* Verdin PWM_2 */                                803 /* Verdin PWM_2 */
816 &pwm2 {                                           804 &pwm2 {
817         pinctrl-names = "default";                805         pinctrl-names = "default";
818         pinctrl-0 = <&pinctrl_pwm_2>;             806         pinctrl-0 = <&pinctrl_pwm_2>;
819         #pwm-cells = <3>;                         807         #pwm-cells = <3>;
820 };                                                808 };
821                                                   809 
822 /* Verdin PWM_3_DSI */                            810 /* Verdin PWM_3_DSI */
823 &pwm3 {                                           811 &pwm3 {
824         pinctrl-names = "default";                812         pinctrl-names = "default";
825         pinctrl-0 = <&pinctrl_pwm_3>;             813         pinctrl-0 = <&pinctrl_pwm_3>;
826         #pwm-cells = <3>;                         814         #pwm-cells = <3>;
827 };                                                815 };
828                                                   816 
829 /* TODO: Verdin I2S_1 */                          817 /* TODO: Verdin I2S_1 */
830                                                   818 
831 /* TODO: Verdin I2S_2 */                          819 /* TODO: Verdin I2S_2 */
832                                                   820 
833 &snvs_pwrkey {                                    821 &snvs_pwrkey {
834         status = "okay";                          822         status = "okay";
835 };                                                823 };
836                                                   824 
837 /* Verdin UART_1 */                               825 /* Verdin UART_1 */
838 &uart1 {                                          826 &uart1 {
839         pinctrl-names = "default";                827         pinctrl-names = "default";
840         pinctrl-0 = <&pinctrl_uart1>;             828         pinctrl-0 = <&pinctrl_uart1>;
841         uart-has-rtscts;                          829         uart-has-rtscts;
842 };                                                830 };
843                                                   831 
844 /* Verdin UART_2 */                               832 /* Verdin UART_2 */
845 &uart2 {                                          833 &uart2 {
846         pinctrl-names = "default";                834         pinctrl-names = "default";
847         pinctrl-0 = <&pinctrl_uart2>;             835         pinctrl-0 = <&pinctrl_uart2>;
848         uart-has-rtscts;                          836         uart-has-rtscts;
849 };                                                837 };
850                                                   838 
851 /* Verdin UART_3, used as the Linux Console */    839 /* Verdin UART_3, used as the Linux Console */
852 &uart3 {                                          840 &uart3 {
853         pinctrl-names = "default";                841         pinctrl-names = "default";
854         pinctrl-0 = <&pinctrl_uart3>;             842         pinctrl-0 = <&pinctrl_uart3>;
855 };                                                843 };
856                                                   844 
857 /* Verdin UART_4, used for Bluetooth on Wi-Fi/    845 /* Verdin UART_4, used for Bluetooth on Wi-Fi/Bluetooth SKUs */
858 &uart4 {                                          846 &uart4 {
859         pinctrl-names = "default";                847         pinctrl-names = "default";
860         pinctrl-0 = <&pinctrl_uart4>;             848         pinctrl-0 = <&pinctrl_uart4>;
861 };                                                849 };
862                                                   850 
863 /* Verdin USB_1 */                                851 /* Verdin USB_1 */
864 &usb3_0 {                                         852 &usb3_0 {
865         fsl,disable-port-power-control;           853         fsl,disable-port-power-control;
866         fsl,over-current-active-low;              854         fsl,over-current-active-low;
867         pinctrl-names = "default";                855         pinctrl-names = "default";
868         pinctrl-0 = <&pinctrl_usb_1_oc_n>;        856         pinctrl-0 = <&pinctrl_usb_1_oc_n>;
869 };                                                857 };
870                                                   858 
871 &usb_dwc3_0 {                                     859 &usb_dwc3_0 {
872         /* dual role only, not full featured O    860         /* dual role only, not full featured OTG */
873         adp-disable;                              861         adp-disable;
874         dr_mode = "otg";                          862         dr_mode = "otg";
875         hnp-disable;                              863         hnp-disable;
876         maximum-speed = "high-speed";             864         maximum-speed = "high-speed";
877         role-switch-default-mode = "peripheral    865         role-switch-default-mode = "peripheral";
878         srp-disable;                              866         srp-disable;
879         usb-role-switch;                          867         usb-role-switch;
880                                                   868 
881         port {                                    869         port {
882                 usb3_dwc: endpoint {              870                 usb3_dwc: endpoint {
883                         remote-endpoint = <&us    871                         remote-endpoint = <&usb_dr_connector>;
884                 };                                872                 };
885         };                                        873         };
886 };                                                874 };
887                                                   875 
888 /* Verdin USB_2 */                                876 /* Verdin USB_2 */
889 &usb3_1 {                                         877 &usb3_1 {
890         fsl,disable-port-power-control;           878         fsl,disable-port-power-control;
891 };                                                879 };
892                                                   880 
893 &usb3_phy1 {                                      881 &usb3_phy1 {
894         vbus-supply = <&reg_usb2_vbus>;           882         vbus-supply = <&reg_usb2_vbus>;
895 };                                                883 };
896                                                   884 
897 &usb_dwc3_1 {                                     885 &usb_dwc3_1 {
898         dr_mode = "host";                         886         dr_mode = "host";
899 };                                                887 };
900                                                   888 
901 /* Verdin SD_1 */                                 889 /* Verdin SD_1 */
902 &usdhc2 {                                         890 &usdhc2 {
903         assigned-clocks = <&clk IMX8MP_CLK_USD    891         assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
904         assigned-clock-rates = <400000000>;       892         assigned-clock-rates = <400000000>;
905         bus-width = <4>;                          893         bus-width = <4>;
906         cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>    894         cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
907         disable-wp;                               895         disable-wp;
908         pinctrl-names = "default", "state_100m    896         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
909         pinctrl-0 = <&pinctrl_usdhc2>, <&pinct    897         pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>;
910         pinctrl-1 = <&pinctrl_usdhc2_100mhz>,     898         pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>;
911         pinctrl-2 = <&pinctrl_usdhc2_200mhz>,     899         pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
912         pinctrl-3 = <&pinctrl_usdhc2_sleep>, <    900         pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd_sleep>;
913         vmmc-supply = <&reg_usdhc2_vmmc>;         901         vmmc-supply = <&reg_usdhc2_vmmc>;
914         vqmmc-supply = <&reg_vdd_sdio>;           902         vqmmc-supply = <&reg_vdd_sdio>;
915 };                                                903 };
916                                                   904 
917 /* On-module eMMC */                              905 /* On-module eMMC */
918 &usdhc3 {                                         906 &usdhc3 {
919         assigned-clocks = <&clk IMX8MP_CLK_USD    907         assigned-clocks = <&clk IMX8MP_CLK_USDHC3_ROOT>;
920         assigned-clock-rates = <400000000>;       908         assigned-clock-rates = <400000000>;
921         bus-width = <8>;                          909         bus-width = <8>;
922         non-removable;                            910         non-removable;
923         pinctrl-names = "default", "state_100m    911         pinctrl-names = "default", "state_100mhz", "state_200mhz";
924         pinctrl-0 = <&pinctrl_usdhc3>;            912         pinctrl-0 = <&pinctrl_usdhc3>;
925         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;     913         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
926         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;     914         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
927         status = "okay";                          915         status = "okay";
928 };                                                916 };
929                                                   917 
930 &wdog1 {                                          918 &wdog1 {
931         fsl,ext-reset-output;                     919         fsl,ext-reset-output;
932         pinctrl-names = "default";                920         pinctrl-names = "default";
933         pinctrl-0 = <&pinctrl_wdog>;              921         pinctrl-0 = <&pinctrl_wdog>;
934         status = "okay";                          922         status = "okay";
935 };                                                923 };
936                                                   924 
937 &iomuxc {                                         925 &iomuxc {
938         pinctrl_bt_uart: btuartgrp {              926         pinctrl_bt_uart: btuartgrp {
939                 fsl,pins =                        927                 fsl,pins =
940                         <MX8MP_IOMUXC_ECSPI2_M    928                         <MX8MP_IOMUXC_ECSPI2_MISO__UART4_DCE_CTS        0x1c4>,
941                         <MX8MP_IOMUXC_ECSPI2_M    929                         <MX8MP_IOMUXC_ECSPI2_MOSI__UART4_DCE_TX         0x1c4>,
942                         <MX8MP_IOMUXC_ECSPI2_S    930                         <MX8MP_IOMUXC_ECSPI2_SCLK__UART4_DCE_RX         0x1c4>,
943                         <MX8MP_IOMUXC_ECSPI2_S    931                         <MX8MP_IOMUXC_ECSPI2_SS0__UART4_DCE_RTS         0x1c4>;
944         };                                        932         };
945                                                   933 
946         pinctrl_ctrl_sleep_moci: ctrlsleepmoci    934         pinctrl_ctrl_sleep_moci: ctrlsleepmocigrp {
947                 fsl,pins =                        935                 fsl,pins =
948                         <MX8MP_IOMUXC_SAI3_RXC    936                         <MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29              0x1c4>; /* SODIMM 256 */
949         };                                        937         };
950                                                   938 
951         pinctrl_ecspi1: ecspi1grp {               939         pinctrl_ecspi1: ecspi1grp {
952                 fsl,pins =                        940                 fsl,pins =
953                         <MX8MP_IOMUXC_ECSPI1_M    941                         <MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO          0x1c4>, /* SODIMM 198 */
954                         <MX8MP_IOMUXC_ECSPI1_M    942                         <MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI          0x4>,   /* SODIMM 200 */
955                         <MX8MP_IOMUXC_ECSPI1_S    943                         <MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK          0x4>,   /* SODIMM 196 */
956                         <MX8MP_IOMUXC_ECSPI1_S    944                         <MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09            0x1c4>; /* SODIMM 202 */
957         };                                        945         };
958                                                   946 
959         /* Connection On Board PHY */             947         /* Connection On Board PHY */
960         pinctrl_eqos: eqosgrp {                   948         pinctrl_eqos: eqosgrp {
961                 fsl,pins =                        949                 fsl,pins =
962                         <MX8MP_IOMUXC_ENET_MDC    950                         <MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC                            0x3>,
963                         <MX8MP_IOMUXC_ENET_MDI    951                         <MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO                          0x3>,
964                         <MX8MP_IOMUXC_ENET_RD0    952                         <MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0                      0x91>,
965                         <MX8MP_IOMUXC_ENET_RD1    953                         <MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1                      0x91>,
966                         <MX8MP_IOMUXC_ENET_RD2    954                         <MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2                      0x91>,
967                         <MX8MP_IOMUXC_ENET_RD3    955                         <MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3                      0x91>,
968                         <MX8MP_IOMUXC_ENET_RXC    956                         <MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK      0x91>,
969                         <MX8MP_IOMUXC_ENET_RX_    957                         <MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL                0x91>,
970                         <MX8MP_IOMUXC_ENET_TD0    958                         <MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0                      0x1f>,
971                         <MX8MP_IOMUXC_ENET_TD1    959                         <MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1                      0x1f>,
972                         <MX8MP_IOMUXC_ENET_TD2    960                         <MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2                      0x1f>,
973                         <MX8MP_IOMUXC_ENET_TD3    961                         <MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3                      0x1f>,
974                         <MX8MP_IOMUXC_ENET_TX_    962                         <MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL                0x1f>,
975                         <MX8MP_IOMUXC_ENET_TXC    963                         <MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK      0x1f>;
976         };                                        964         };
977                                                   965 
978         /* ETH_INT# shared with TPM_INT# (usua    966         /* ETH_INT# shared with TPM_INT# (usually N/A) */
979         pinctrl_eth_tpm_int: ethtpmintgrp {       967         pinctrl_eth_tpm_int: ethtpmintgrp {
980                 fsl,pins =                        968                 fsl,pins =
981                         <MX8MP_IOMUXC_GPIO1_IO    969                         <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10            0x1c4>;
982         };                                        970         };
983                                                   971 
984         /* Connection Carrier Board PHY ETH_2     972         /* Connection Carrier Board PHY ETH_2 */
985         pinctrl_fec: fecgrp {                     973         pinctrl_fec: fecgrp {
986                 fsl,pins =                        974                 fsl,pins =
987                         <MX8MP_IOMUXC_SAI1_RXD    975                         <MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC              0x3>,   /* SODIMM 193 */
988                         <MX8MP_IOMUXC_SAI1_RXD    976                         <MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO             0x3>,   /* SODIMM 191 */
989                         <MX8MP_IOMUXC_SAI1_RXD    977                         <MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0        0x91>,  /* SODIMM 201 */
990                         <MX8MP_IOMUXC_SAI1_RXD    978                         <MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1        0x91>,  /* SODIMM 203 */
991                         <MX8MP_IOMUXC_SAI1_RXD    979                         <MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2        0x91>,  /* SODIMM 205 */
992                         <MX8MP_IOMUXC_SAI1_RXD    980                         <MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3        0x91>,  /* SODIMM 207 */
993                         <MX8MP_IOMUXC_SAI1_TXC    981                         <MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC         0x91>,  /* SODIMM 197 */
994                         <MX8MP_IOMUXC_SAI1_TXF    982                         <MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL     0x91>,  /* SODIMM 199 */
995                         <MX8MP_IOMUXC_SAI1_TXD    983                         <MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0        0x1f>,  /* SODIMM 221 */
996                         <MX8MP_IOMUXC_SAI1_TXD    984                         <MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1        0x1f>,  /* SODIMM 219 */
997                         <MX8MP_IOMUXC_SAI1_TXD    985                         <MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2        0x1f>,  /* SODIMM 217 */
998                         <MX8MP_IOMUXC_SAI1_TXD    986                         <MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3        0x1f>,  /* SODIMM 215 */
999                         <MX8MP_IOMUXC_SAI1_TXD    987                         <MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL     0x1f>,  /* SODIMM 211 */
1000                         <MX8MP_IOMUXC_SAI1_TX    988                         <MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC        0x1f>,  /* SODIMM 213 */
1001                         <MX8MP_IOMUXC_SAI1_TX    989                         <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18             0x1c4>; /* SODIMM 189 */
1002         };                                       990         };
1003                                                  991 
1004         pinctrl_fec_sleep: fecsleepgrp {         992         pinctrl_fec_sleep: fecsleepgrp {
1005                 fsl,pins =                       993                 fsl,pins =
1006                         <MX8MP_IOMUXC_SAI1_RX    994                         <MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC              0x3>,   /* SODIMM 193 */
1007                         <MX8MP_IOMUXC_SAI1_RX    995                         <MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO             0x3>,   /* SODIMM 191 */
1008                         <MX8MP_IOMUXC_SAI1_RX    996                         <MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0        0x91>,  /* SODIMM 201 */
1009                         <MX8MP_IOMUXC_SAI1_RX    997                         <MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1        0x91>,  /* SODIMM 203 */
1010                         <MX8MP_IOMUXC_SAI1_RX    998                         <MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2        0x91>,  /* SODIMM 205 */
1011                         <MX8MP_IOMUXC_SAI1_RX    999                         <MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3        0x91>,  /* SODIMM 207 */
1012                         <MX8MP_IOMUXC_SAI1_TX    1000                         <MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC         0x91>,  /* SODIMM 197 */
1013                         <MX8MP_IOMUXC_SAI1_TX    1001                         <MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL     0x91>,  /* SODIMM 199 */
1014                         <MX8MP_IOMUXC_SAI1_TX    1002                         <MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12             0x1f>,  /* SODIMM 221 */
1015                         <MX8MP_IOMUXC_SAI1_TX    1003                         <MX8MP_IOMUXC_SAI1_TXD1__GPIO4_IO13             0x1f>,  /* SODIMM 219 */
1016                         <MX8MP_IOMUXC_SAI1_TX    1004                         <MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14             0x1f>,  /* SODIMM 217 */
1017                         <MX8MP_IOMUXC_SAI1_TX    1005                         <MX8MP_IOMUXC_SAI1_TXD3__GPIO4_IO15             0x1f>,  /* SODIMM 215 */
1018                         <MX8MP_IOMUXC_SAI1_TX    1006                         <MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16             0x1f>,  /* SODIMM 211 */
1019                         <MX8MP_IOMUXC_SAI1_TX    1007                         <MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17             0x1f>,  /* SODIMM 213 */
1020                         <MX8MP_IOMUXC_SAI1_TX    1008                         <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18             0x184>; /* SODIMM 189 */
1021         };                                       1009         };
1022                                                  1010 
1023         pinctrl_flexcan1: flexcan1grp {          1011         pinctrl_flexcan1: flexcan1grp {
1024                 fsl,pins =                       1012                 fsl,pins =
1025                         <MX8MP_IOMUXC_SPDIF_R    1013                         <MX8MP_IOMUXC_SPDIF_RX__CAN1_RX                 0x154>, /* SODIMM 22 */
1026                         <MX8MP_IOMUXC_SPDIF_T    1014                         <MX8MP_IOMUXC_SPDIF_TX__CAN1_TX                 0x154>; /* SODIMM 20 */
1027         };                                       1015         };
1028                                                  1016 
1029         pinctrl_flexcan2: flexcan2grp {          1017         pinctrl_flexcan2: flexcan2grp {
1030                 fsl,pins =                       1018                 fsl,pins =
1031                         <MX8MP_IOMUXC_SAI2_MC    1019                         <MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX                0x154>, /* SODIMM 26 */
1032                         <MX8MP_IOMUXC_SAI2_TX    1020                         <MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX                0x154>; /* SODIMM 24 */
1033         };                                       1021         };
1034                                                  1022 
1035         pinctrl_flexspi0: flexspi0grp {          1023         pinctrl_flexspi0: flexspi0grp {
1036                 fsl,pins =                       1024                 fsl,pins =
1037                         <MX8MP_IOMUXC_NAND_AL    1025                         <MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK          0x1c2>, /* SODIMM 52 */
1038                         <MX8MP_IOMUXC_NAND_CE    1026                         <MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B       0x82>,  /* SODIMM 54 */
1039                         <MX8MP_IOMUXC_NAND_DQ    1027                         <MX8MP_IOMUXC_NAND_DQS__FLEXSPI_A_DQS           0x82>,  /* SODIMM 66 */
1040                         <MX8MP_IOMUXC_NAND_DA    1028                         <MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00     0x82>,  /* SODIMM 56 */
1041                         <MX8MP_IOMUXC_NAND_DA    1029                         <MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01     0x82>,  /* SODIMM 58 */
1042                         <MX8MP_IOMUXC_NAND_DA    1030                         <MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02     0x82>,  /* SODIMM 60 */
1043                         <MX8MP_IOMUXC_NAND_DA    1031                         <MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03     0x82>,  /* SODIMM 62 */
1044                         <MX8MP_IOMUXC_NAND_RE    1032                         <MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16          0x82>;  /* SODIMM 64 */
1045         };                                       1033         };
1046                                                  1034 
1047         pinctrl_gpio1: gpio1grp {                1035         pinctrl_gpio1: gpio1grp {
1048                 fsl,pins =                       1036                 fsl,pins =
1049                         <MX8MP_IOMUXC_GPIO1_I    1037                         <MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00            0x184>; /* SODIMM 206 */
1050         };                                       1038         };
1051                                                  1039 
1052         pinctrl_gpio2: gpio2grp {                1040         pinctrl_gpio2: gpio2grp {
1053                 fsl,pins =                       1041                 fsl,pins =
1054                         <MX8MP_IOMUXC_GPIO1_I    1042                         <MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01            0x1c4>; /* SODIMM 208 */
1055         };                                       1043         };
1056                                                  1044 
1057         pinctrl_gpio3: gpio3grp {                1045         pinctrl_gpio3: gpio3grp {
1058                 fsl,pins =                       1046                 fsl,pins =
1059                         <MX8MP_IOMUXC_GPIO1_I    1047                         <MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05            0x184>; /* SODIMM 210 */
1060         };                                       1048         };
1061                                                  1049 
1062         pinctrl_gpio4: gpio4grp {                1050         pinctrl_gpio4: gpio4grp {
1063                 fsl,pins =                       1051                 fsl,pins =
1064                         <MX8MP_IOMUXC_GPIO1_I    1052                         <MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06            0x184>; /* SODIMM 212 */
1065         };                                       1053         };
1066                                                  1054 
1067         pinctrl_gpio5: gpio5grp {                1055         pinctrl_gpio5: gpio5grp {
1068                 fsl,pins =                       1056                 fsl,pins =
1069                         <MX8MP_IOMUXC_GPIO1_I    1057                         <MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07            0x184>; /* SODIMM 216 */
1070         };                                       1058         };
1071                                                  1059 
1072         pinctrl_gpio6: gpio6grp {                1060         pinctrl_gpio6: gpio6grp {
1073                 fsl,pins =                       1061                 fsl,pins =
1074                         <MX8MP_IOMUXC_GPIO1_I    1062                         <MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08            0x184>; /* SODIMM 218 */
1075         };                                       1063         };
1076                                                  1064 
1077         pinctrl_gpio7: gpio7grp {                1065         pinctrl_gpio7: gpio7grp {
1078                 fsl,pins =                       1066                 fsl,pins =
1079                         <MX8MP_IOMUXC_SAI1_RX    1067                         <MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03             0x184>; /* SODIMM 220 */
1080         };                                       1068         };
1081                                                  1069 
1082         pinctrl_gpio8: gpio8grp {                1070         pinctrl_gpio8: gpio8grp {
1083                 fsl,pins =                       1071                 fsl,pins =
1084                         <MX8MP_IOMUXC_SAI1_RX    1072                         <MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01              0x184>; /* SODIMM 222 */
1085         };                                       1073         };
1086                                                  1074 
1087         /* Verdin GPIO_9_DSI (pulled-up as ac    1075         /* Verdin GPIO_9_DSI (pulled-up as active-low) */
1088         pinctrl_gpio_9_dsi: gpio9dsigrp {        1076         pinctrl_gpio_9_dsi: gpio9dsigrp {
1089                 fsl,pins =                       1077                 fsl,pins =
1090                         <MX8MP_IOMUXC_SAI2_TX    1078                         <MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25              0x1c4>; /* SODIMM 17 */
1091         };                                       1079         };
1092                                                  1080 
1093         /* Verdin GPIO_10_DSI */                 1081         /* Verdin GPIO_10_DSI */
1094         pinctrl_gpio_10_dsi: gpio10dsigrp {      1082         pinctrl_gpio_10_dsi: gpio10dsigrp {
1095                 fsl,pins =                       1083                 fsl,pins =
1096                         <MX8MP_IOMUXC_SAI3_RX    1084                         <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28             0x1c4>; /* SODIMM 21 */
1097         };                                       1085         };
1098                                                  1086 
1099         /* Non-wifi MSP usage only */            1087         /* Non-wifi MSP usage only */
1100         pinctrl_gpio_hog1: gpiohog1grp {         1088         pinctrl_gpio_hog1: gpiohog1grp {
1101                 fsl,pins =                       1089                 fsl,pins =
1102                         <MX8MP_IOMUXC_ECSPI2_    1090                         <MX8MP_IOMUXC_ECSPI2_MISO__GPIO5_IO12           0x1c4>, /* SODIMM 116 */
1103                         <MX8MP_IOMUXC_ECSPI2_    1091                         <MX8MP_IOMUXC_ECSPI2_MOSI__GPIO5_IO11           0x1c4>, /* SODIMM 152 */
1104                         <MX8MP_IOMUXC_ECSPI2_    1092                         <MX8MP_IOMUXC_ECSPI2_SCLK__GPIO5_IO10           0x1c4>, /* SODIMM 164 */
1105                         <MX8MP_IOMUXC_ECSPI2_    1093                         <MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13            0x1c4>; /* SODIMM 128 */
1106         };                                       1094         };
1107                                                  1095 
1108         /* USB_2_OC# */                          1096         /* USB_2_OC# */
1109         pinctrl_gpio_hog2: gpiohog2grp {         1097         pinctrl_gpio_hog2: gpiohog2grp {
1110                 fsl,pins =                       1098                 fsl,pins =
1111                         <MX8MP_IOMUXC_SAI3_MC    1099                         <MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02             0x1c4>; /* SODIMM 187 */
1112         };                                       1100         };
1113                                                  1101 
1114         pinctrl_gpio_hog3: gpiohog3grp {         1102         pinctrl_gpio_hog3: gpiohog3grp {
1115                 fsl,pins =                       1103                 fsl,pins =
1116                         /* CSI_1_MCLK */         1104                         /* CSI_1_MCLK */
1117                         <MX8MP_IOMUXC_GPIO1_I    1105                         <MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15            0x1c4>; /* SODIMM 91 */
1118         };                                       1106         };
1119                                                  1107 
1120         /* Wifi usage only */                    1108         /* Wifi usage only */
1121         pinctrl_gpio_hog4: gpiohog4grp {         1109         pinctrl_gpio_hog4: gpiohog4grp {
1122                 fsl,pins =                       1110                 fsl,pins =
1123                         <MX8MP_IOMUXC_UART4_R    1111                         <MX8MP_IOMUXC_UART4_RXD__GPIO5_IO28             0x1c4>, /* SODIMM 151 */
1124                         <MX8MP_IOMUXC_UART4_T    1112                         <MX8MP_IOMUXC_UART4_TXD__GPIO5_IO29             0x1c4>; /* SODIMM 153 */
1125         };                                       1113         };
1126                                                  1114 
1127         pinctrl_gpio_keys: gpiokeysgrp {         1115         pinctrl_gpio_keys: gpiokeysgrp {
1128                 fsl,pins =                       1116                 fsl,pins =
1129                         <MX8MP_IOMUXC_SAI1_RX    1117                         <MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00             0x1c4>; /* SODIMM 252 */
1130         };                                       1118         };
1131                                                  1119 
1132         pinctrl_hdmi: hdmigrp {               !! 1120         pinctrl_hdmi_hog: hdmihoggrp {
1133                 fsl,pins =                       1121                 fsl,pins =
1134                         <MX8MP_IOMUXC_HDMI_CE !! 1122                         <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC        0x40000019>,    /* SODIMM 63 */
1135                         <MX8MP_IOMUXC_HDMI_HP !! 1123                         <MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD        0x40000019>;    /* SODIMM 61 */
1136         };                                       1124         };
1137                                                  1125 
1138         /* On-module I2C */                      1126         /* On-module I2C */
1139         pinctrl_i2c1: i2c1grp {                  1127         pinctrl_i2c1: i2c1grp {
1140                 fsl,pins =                       1128                 fsl,pins =
1141                         <MX8MP_IOMUXC_I2C1_SC    1129                         <MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL                0x400001c6>,    /* PMIC_I2C_SCL */
1142                         <MX8MP_IOMUXC_I2C1_SD    1130                         <MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA                0x400001c6>;    /* PMIC_I2C_SDA */
1143         };                                       1131         };
1144                                                  1132 
1145         pinctrl_i2c1_gpio: i2c1gpiogrp {         1133         pinctrl_i2c1_gpio: i2c1gpiogrp {
1146                 fsl,pins =                       1134                 fsl,pins =
1147                         <MX8MP_IOMUXC_I2C1_SC    1135                         <MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14              0x400001c6>,    /* PMIC_I2C_SCL */
1148                         <MX8MP_IOMUXC_I2C1_SD    1136                         <MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15              0x400001c6>;    /* PMIC_I2C_SDA */
1149         };                                       1137         };
1150                                                  1138 
1151         /* Verdin I2C_2_DSI */                   1139         /* Verdin I2C_2_DSI */
1152         pinctrl_i2c2: i2c2grp {                  1140         pinctrl_i2c2: i2c2grp {
1153                 fsl,pins =                       1141                 fsl,pins =
1154                         <MX8MP_IOMUXC_I2C2_SC    1142                         <MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL                0x400001c6>,    /* SODIMM 55 */
1155                         <MX8MP_IOMUXC_I2C2_SD    1143                         <MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA                0x400001c6>;    /* SODIMM 53 */
1156         };                                       1144         };
1157                                                  1145 
1158         pinctrl_i2c2_gpio: i2c2gpiogrp {         1146         pinctrl_i2c2_gpio: i2c2gpiogrp {
1159                 fsl,pins =                       1147                 fsl,pins =
1160                         <MX8MP_IOMUXC_I2C2_SC    1148                         <MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16              0x400001c6>,    /* SODIMM 55 */
1161                         <MX8MP_IOMUXC_I2C2_SD    1149                         <MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17              0x400001c6>;    /* SODIMM 53 */
1162         };                                       1150         };
1163                                                  1151 
1164         /* Verdin I2C_4_CSI */                   1152         /* Verdin I2C_4_CSI */
1165         pinctrl_i2c3: i2c3grp {                  1153         pinctrl_i2c3: i2c3grp {
1166                 fsl,pins =                       1154                 fsl,pins =
1167                         <MX8MP_IOMUXC_I2C3_SC    1155                         <MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL                0x400001c6>,    /* SODIMM 95 */
1168                         <MX8MP_IOMUXC_I2C3_SD    1156                         <MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA                0x400001c6>;    /* SODIMM 93 */
1169         };                                       1157         };
1170                                                  1158 
1171         pinctrl_i2c3_gpio: i2c3gpiogrp {         1159         pinctrl_i2c3_gpio: i2c3gpiogrp {
1172                 fsl,pins =                       1160                 fsl,pins =
1173                         <MX8MP_IOMUXC_I2C3_SC    1161                         <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18              0x400001c6>,    /* SODIMM 95 */
1174                         <MX8MP_IOMUXC_I2C3_SD    1162                         <MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19              0x400001c6>;    /* SODIMM 93 */
1175         };                                       1163         };
1176                                                  1164 
1177         /* Verdin I2C_1 */                       1165         /* Verdin I2C_1 */
1178         pinctrl_i2c4: i2c4grp {                  1166         pinctrl_i2c4: i2c4grp {
1179                 fsl,pins =                       1167                 fsl,pins =
1180                         <MX8MP_IOMUXC_I2C4_SC    1168                         <MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL                0x400001c6>,    /* SODIMM 14 */
1181                         <MX8MP_IOMUXC_I2C4_SD    1169                         <MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA                0x400001c6>;    /* SODIMM 12 */
1182         };                                       1170         };
1183                                                  1171 
1184         pinctrl_i2c4_gpio: i2c4gpiogrp {         1172         pinctrl_i2c4_gpio: i2c4gpiogrp {
1185                 fsl,pins =                       1173                 fsl,pins =
1186                         <MX8MP_IOMUXC_I2C4_SC    1174                         <MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20              0x400001c6>,    /* SODIMM 14 */
1187                         <MX8MP_IOMUXC_I2C4_SD    1175                         <MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21              0x400001c6>;    /* SODIMM 12 */
1188         };                                       1176         };
1189                                                  1177 
1190         /* Verdin I2C_3_HDMI */                  1178         /* Verdin I2C_3_HDMI */
1191         pinctrl_i2c5: i2c5grp {                  1179         pinctrl_i2c5: i2c5grp {
1192                 fsl,pins =                       1180                 fsl,pins =
1193                         <MX8MP_IOMUXC_HDMI_DD    1181                         <MX8MP_IOMUXC_HDMI_DDC_SCL__I2C5_SCL            0x400001c6>,    /* SODIMM 59 */
1194                         <MX8MP_IOMUXC_HDMI_DD    1182                         <MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA            0x400001c6>;    /* SODIMM 57 */
1195         };                                       1183         };
1196                                                  1184 
1197         pinctrl_i2c5_gpio: i2c5gpiogrp {         1185         pinctrl_i2c5_gpio: i2c5gpiogrp {
1198                 fsl,pins =                       1186                 fsl,pins =
1199                         <MX8MP_IOMUXC_HDMI_DD    1187                         <MX8MP_IOMUXC_HDMI_DDC_SCL__GPIO3_IO26          0x400001c6>,    /* SODIMM 59 */
1200                         <MX8MP_IOMUXC_HDMI_DD    1188                         <MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27          0x400001c6>;    /* SODIMM 57 */
1201         };                                       1189         };
1202                                                  1190 
1203         /* Verdin I2S_2_BCLK (TOUCH_RESET#) *    1191         /* Verdin I2S_2_BCLK (TOUCH_RESET#) */
1204         pinctrl_i2s_2_bclk_touch_reset: i2s2b    1192         pinctrl_i2s_2_bclk_touch_reset: i2s2bclktouchresetgrp {
1205                 fsl,pins =                       1193                 fsl,pins =
1206                         <MX8MP_IOMUXC_SAI3_TX    1194                         <MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00              0x184>; /* SODIMM 42 */
1207         };                                       1195         };
1208                                                  1196 
1209         /* Verdin I2S_2_D_OUT shared with SAI    1197         /* Verdin I2S_2_D_OUT shared with SAI3 */
1210         pinctrl_i2s_2_d_out_dsi_1_bkl_en: i2s    1198         pinctrl_i2s_2_d_out_dsi_1_bkl_en: i2s2doutdsi1bklengrp {
1211                 fsl,pins =                       1199                 fsl,pins =
1212                         <MX8MP_IOMUXC_SAI3_TX    1200                         <MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01              0x184>; /* SODIMM 46 */
1213         };                                       1201         };
1214                                                  1202 
1215         pinctrl_pcie: pciegrp {                  1203         pinctrl_pcie: pciegrp {
1216                 fsl,pins =                       1204                 fsl,pins =
1217                         <MX8MP_IOMUXC_SAI1_TX    1205                         <MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19             0x4>,   /* SODIMM 244 */
1218                         <MX8MP_IOMUXC_SD2_RES    1206                         <MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19           0x1c4>; /* PMIC_EN_PCIe_CLK, unused */
1219         };                                       1207         };
1220                                                  1208 
1221         pinctrl_pmic: pmicirqgrp {               1209         pinctrl_pmic: pmicirqgrp {
1222                 fsl,pins =                       1210                 fsl,pins =
1223                         <MX8MP_IOMUXC_GPIO1_I    1211                         <MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03            0x1c4>; /* PMIC_INT# */
1224         };                                       1212         };
1225                                                  1213 
1226         pinctrl_pwm_1: pwm1grp {                 1214         pinctrl_pwm_1: pwm1grp {
1227                 fsl,pins =                       1215                 fsl,pins =
1228                         <MX8MP_IOMUXC_SPDIF_E    1216                         <MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT           0x6>;   /* SODIMM 15 */
1229         };                                       1217         };
1230                                                  1218 
1231         pinctrl_pwm_2: pwm2grp {                 1219         pinctrl_pwm_2: pwm2grp {
1232                 fsl,pins =                       1220                 fsl,pins =
1233                         <MX8MP_IOMUXC_GPIO1_I    1221                         <MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT              0x6>;   /* SODIMM 16 */
1234         };                                       1222         };
1235                                                  1223 
1236         /* Verdin PWM_3_DSI shared with GPIO3    1224         /* Verdin PWM_3_DSI shared with GPIO3_IO20 */
1237         pinctrl_pwm_3: pwm3grp {                 1225         pinctrl_pwm_3: pwm3grp {
1238                 fsl,pins =                       1226                 fsl,pins =
1239                         <MX8MP_IOMUXC_SAI5_RX    1227                         <MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT                0x6>;   /* SODIMM 19 */
1240         };                                       1228         };
1241                                                  1229 
1242         /* Verdin PWM_3_DSI (pulled-down as a    1230         /* Verdin PWM_3_DSI (pulled-down as active-high) shared with PWM3_OUT */
1243         pinctrl_pwm_3_dsi_hpd_gpio: pwm3dsi1h    1231         pinctrl_pwm_3_dsi_hpd_gpio: pwm3dsi1hpdgpiogrp {
1244                 fsl,pins =                       1232                 fsl,pins =
1245                         <MX8MP_IOMUXC_SAI5_RX    1233                         <MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20              0x184>; /* SODIMM 19 */
1246         };                                       1234         };
1247                                                  1235 
1248         pinctrl_reg_eth: regethgrp {             1236         pinctrl_reg_eth: regethgrp {
1249                 fsl,pins =                       1237                 fsl,pins =
1250                         <MX8MP_IOMUXC_SD2_WP_    1238                         <MX8MP_IOMUXC_SD2_WP__GPIO2_IO20                0x184>; /* PMIC_EN_ETH */
1251         };                                       1239         };
1252                                                  1240 
1253         pinctrl_sai1: sai1grp {                  1241         pinctrl_sai1: sai1grp {
1254                 fsl,pins =                       1242                 fsl,pins =
1255                         <MX8MP_IOMUXC_SAI1_MC    1243                         <MX8MP_IOMUXC_SAI1_MCLK__AUDIOMIX_SAI1_MCLK             0x96>,  /* SODIMM 38 */
1256                         <MX8MP_IOMUXC_SAI1_RX    1244                         <MX8MP_IOMUXC_SAI1_RXD0__AUDIOMIX_SAI1_RX_DATA00        0x1d6>, /* SODIMM 36 */
1257                         <MX8MP_IOMUXC_SAI5_MC    1245                         <MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK          0x1d6>, /* SODIMM 30 */
1258                         <MX8MP_IOMUXC_SAI5_RX    1246                         <MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC          0x1d6>, /* SODIMM 32 */
1259                         <MX8MP_IOMUXC_SAI5_RX    1247                         <MX8MP_IOMUXC_SAI5_RXFS__AUDIOMIX_SAI1_TX_DATA00        0x96>;  /* SODIMM 34 */
1260         };                                       1248         };
1261                                                  1249 
1262         pinctrl_sai3: sai3grp {                  1250         pinctrl_sai3: sai3grp {
1263                 fsl,pins =                       1251                 fsl,pins =
1264                         <MX8MP_IOMUXC_SAI3_RX    1252                         <MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0x1d6>, /* SODIMM 48 */
1265                         <MX8MP_IOMUXC_SAI3_TX    1253                         <MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK   0x1d6>, /* SODIMM 42 */
1266                         <MX8MP_IOMUXC_SAI3_TX    1254                         <MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0x96>,  /* SODIMM 46 */
1267                         <MX8MP_IOMUXC_SAI3_TX    1255                         <MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC  0x1d6>; /* SODIMM 44 */
1268         };                                       1256         };
1269                                                  1257 
1270         pinctrl_uart1: uart1grp {                1258         pinctrl_uart1: uart1grp {
1271                 fsl,pins =                       1259                 fsl,pins =
1272                         <MX8MP_IOMUXC_SAI2_RX    1260                         <MX8MP_IOMUXC_SAI2_RXD0__UART1_DCE_RTS          0x1c4>, /* SODIMM 135 */
1273                         <MX8MP_IOMUXC_SAI2_TX    1261                         <MX8MP_IOMUXC_SAI2_TXFS__UART1_DCE_CTS          0x1c4>, /* SODIMM 133 */
1274                         <MX8MP_IOMUXC_UART1_R    1262                         <MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX           0x1c4>, /* SODIMM 129 */
1275                         <MX8MP_IOMUXC_UART1_T    1263                         <MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX           0x1c4>; /* SODIMM 131 */
1276         };                                       1264         };
1277                                                  1265 
1278         pinctrl_uart2: uart2grp {                1266         pinctrl_uart2: uart2grp {
1279                 fsl,pins =                       1267                 fsl,pins =
1280                         <MX8MP_IOMUXC_SD1_DAT    1268                         <MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS          0x1c4>, /* SODIMM 143 */
1281                         <MX8MP_IOMUXC_SD1_DAT    1269                         <MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS          0x1c4>, /* SODIMM 141 */
1282                         <MX8MP_IOMUXC_UART2_R    1270                         <MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX           0x1c4>, /* SODIMM 137 */
1283                         <MX8MP_IOMUXC_UART2_T    1271                         <MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX           0x1c4>; /* SODIMM 139 */
1284         };                                       1272         };
1285                                                  1273 
1286         pinctrl_uart3: uart3grp {                1274         pinctrl_uart3: uart3grp {
1287                 fsl,pins =                       1275                 fsl,pins =
1288                         <MX8MP_IOMUXC_UART3_R    1276                         <MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX           0x1c4>, /* SODIMM 147 */
1289                         <MX8MP_IOMUXC_UART3_T    1277                         <MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX           0x1c4>; /* SODIMM 149 */
1290         };                                       1278         };
1291                                                  1279 
1292         /* Non-wifi usage only */                1280         /* Non-wifi usage only */
1293         pinctrl_uart4: uart4grp {                1281         pinctrl_uart4: uart4grp {
1294                 fsl,pins =                       1282                 fsl,pins =
1295                         <MX8MP_IOMUXC_UART4_R    1283                         <MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX           0x1c4>, /* SODIMM 151 */
1296                         <MX8MP_IOMUXC_UART4_T    1284                         <MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX           0x1c4>; /* SODIMM 153 */
1297         };                                       1285         };
1298                                                  1286 
1299         pinctrl_usb1_vbus: usb1vbusgrp {         1287         pinctrl_usb1_vbus: usb1vbusgrp {
1300                 fsl,pins =                       1288                 fsl,pins =
1301                         <MX8MP_IOMUXC_GPIO1_I    1289                         <MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12            0x106>; /* SODIMM 155 */
1302         };                                       1290         };
1303                                                  1291 
1304         /* USB_1_ID */                           1292         /* USB_1_ID */
1305         pinctrl_usb_1_id: usb1idgrp {            1293         pinctrl_usb_1_id: usb1idgrp {
1306                 fsl,pins =                       1294                 fsl,pins =
1307                         <MX8MP_IOMUXC_SD1_RES    1295                         <MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10           0x1c4>; /* SODIMM 161 */
1308         };                                       1296         };
1309                                                  1297 
1310         /* USB_1_OC# */                          1298         /* USB_1_OC# */
1311         pinctrl_usb_1_oc_n: usb1ocngrp {         1299         pinctrl_usb_1_oc_n: usb1ocngrp {
1312                 fsl,pins =                       1300                 fsl,pins =
1313                         <MX8MP_IOMUXC_GPIO1_I    1301                         <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC           0x1c4>; /* SODIMM 157 */
1314         };                                       1302         };
1315                                                  1303 
1316         pinctrl_usb2_vbus: usb2vbusgrp {         1304         pinctrl_usb2_vbus: usb2vbusgrp {
1317                 fsl,pins =                       1305                 fsl,pins =
1318                         <MX8MP_IOMUXC_GPIO1_I    1306                         <MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14            0x106>; /* SODIMM 185 */
1319         };                                       1307         };
1320                                                  1308 
1321         /* On-module Wi-Fi */                    1309         /* On-module Wi-Fi */
1322         pinctrl_usdhc1: usdhc1grp {              1310         pinctrl_usdhc1: usdhc1grp {
1323                 fsl,pins =                       1311                 fsl,pins =
1324                         <MX8MP_IOMUXC_SD1_CLK    1312                         <MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK               0x190>,
1325                         <MX8MP_IOMUXC_SD1_CMD    1313                         <MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD               0x1d0>,
1326                         <MX8MP_IOMUXC_SD1_DAT    1314                         <MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0           0x1d0>,
1327                         <MX8MP_IOMUXC_SD1_DAT    1315                         <MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1           0x1d0>,
1328                         <MX8MP_IOMUXC_SD1_DAT    1316                         <MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2           0x1d0>,
1329                         <MX8MP_IOMUXC_SD1_DAT    1317                         <MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3           0x1d0>;
1330         };                                       1318         };
1331                                                  1319 
1332         pinctrl_usdhc1_100mhz: usdhc1-100mhzg    1320         pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
1333                 fsl,pins =                       1321                 fsl,pins =
1334                         <MX8MP_IOMUXC_SD1_CLK    1322                         <MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK               0x194>,
1335                         <MX8MP_IOMUXC_SD1_CMD    1323                         <MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD               0x1d4>,
1336                         <MX8MP_IOMUXC_SD1_DAT    1324                         <MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0           0x1d4>,
1337                         <MX8MP_IOMUXC_SD1_DAT    1325                         <MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1           0x1d4>,
1338                         <MX8MP_IOMUXC_SD1_DAT    1326                         <MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2           0x1d4>,
1339                         <MX8MP_IOMUXC_SD1_DAT    1327                         <MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3           0x1d4>;
1340         };                                       1328         };
1341                                                  1329 
1342         pinctrl_usdhc1_200mhz: usdhc1-200mhzg    1330         pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
1343                 fsl,pins =                       1331                 fsl,pins =
1344                         <MX8MP_IOMUXC_SD1_CLK    1332                         <MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK               0x196>,
1345                         <MX8MP_IOMUXC_SD1_CMD    1333                         <MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD               0x1d6>,
1346                         <MX8MP_IOMUXC_SD1_DAT    1334                         <MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0           0x1d6>,
1347                         <MX8MP_IOMUXC_SD1_DAT    1335                         <MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1           0x1d6>,
1348                         <MX8MP_IOMUXC_SD1_DAT    1336                         <MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2           0x1d6>,
1349                         <MX8MP_IOMUXC_SD1_DAT    1337                         <MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3           0x1d6>;
1350         };                                       1338         };
1351                                                  1339 
1352         pinctrl_usdhc2_cd: usdhc2cdgrp {         1340         pinctrl_usdhc2_cd: usdhc2cdgrp {
1353                 fsl,pins =                       1341                 fsl,pins =
1354                         <MX8MP_IOMUXC_SD2_CD_    1342                         <MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12              0x1c4>; /* SODIMM 84 */
1355         };                                       1343         };
1356                                                  1344 
1357         pinctrl_usdhc2_cd_sleep: usdhc2cdslpg    1345         pinctrl_usdhc2_cd_sleep: usdhc2cdslpgrp {
1358                 fsl,pins =                       1346                 fsl,pins =
1359                         <MX8MP_IOMUXC_SD2_CD_    1347                         <MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12              0x0>;   /* SODIMM 84 */
1360         };                                       1348         };
1361                                                  1349 
1362         pinctrl_usdhc2_pwr_en: usdhc2pwrengrp    1350         pinctrl_usdhc2_pwr_en: usdhc2pwrengrp {
1363                 fsl,pins =                       1351                 fsl,pins =
1364                         <MX8MP_IOMUXC_SAI2_RX    1352                         <MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22              0x4>;   /* SODIMM 76 */
1365         };                                       1353         };
1366                                                  1354 
1367         pinctrl_usdhc2: usdhc2grp {              1355         pinctrl_usdhc2: usdhc2grp {
1368                 fsl,pins =                       1356                 fsl,pins =
1369                         <MX8MP_IOMUXC_GPIO1_I    1357                         <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT        0x4>,   /* PMIC_USDHC_VSELECT */
1370                         <MX8MP_IOMUXC_SD2_CLK    1358                         <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK               0x190>, /* SODIMM 78 */
1371                         <MX8MP_IOMUXC_SD2_CMD    1359                         <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD               0x1d0>, /* SODIMM 74 */
1372                         <MX8MP_IOMUXC_SD2_DAT    1360                         <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0           0x1d0>, /* SODIMM 80 */
1373                         <MX8MP_IOMUXC_SD2_DAT    1361                         <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1           0x1d0>, /* SODIMM 82 */
1374                         <MX8MP_IOMUXC_SD2_DAT    1362                         <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2           0x1d0>, /* SODIMM 70 */
1375                         <MX8MP_IOMUXC_SD2_DAT    1363                         <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3           0x1d0>; /* SODIMM 72 */
1376         };                                       1364         };
1377                                                  1365 
1378         pinctrl_usdhc2_100mhz: usdhc2-100mhzg    1366         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
1379                 fsl,pins =                       1367                 fsl,pins =
1380                         <MX8MP_IOMUXC_GPIO1_I    1368                         <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT        0x4>,
1381                         <MX8MP_IOMUXC_SD2_CLK    1369                         <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK               0x194>,
1382                         <MX8MP_IOMUXC_SD2_CMD    1370                         <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD               0x1d4>,
1383                         <MX8MP_IOMUXC_SD2_DAT    1371                         <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0           0x1d4>,
1384                         <MX8MP_IOMUXC_SD2_DAT    1372                         <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1           0x1d4>,
1385                         <MX8MP_IOMUXC_SD2_DAT    1373                         <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2           0x1d4>,
1386                         <MX8MP_IOMUXC_SD2_DAT    1374                         <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3           0x1d4>;
1387         };                                       1375         };
1388                                                  1376 
1389         pinctrl_usdhc2_200mhz: usdhc2-200mhzg    1377         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
1390                 fsl,pins =                       1378                 fsl,pins =
1391                         <MX8MP_IOMUXC_GPIO1_I    1379                         <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT        0x4>,
1392                         <MX8MP_IOMUXC_SD2_CLK    1380                         <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK               0x196>,
1393                         <MX8MP_IOMUXC_SD2_CMD    1381                         <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD               0x1d6>,
1394                         <MX8MP_IOMUXC_SD2_DAT    1382                         <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0           0x1d6>,
1395                         <MX8MP_IOMUXC_SD2_DAT    1383                         <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1           0x1d6>,
1396                         <MX8MP_IOMUXC_SD2_DAT    1384                         <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2           0x1d6>,
1397                         <MX8MP_IOMUXC_SD2_DAT    1385                         <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3           0x1d6>;
1398         };                                       1386         };
1399                                                  1387 
1400         /* Avoid backfeeding with removed car    1388         /* Avoid backfeeding with removed card power */
1401         pinctrl_usdhc2_sleep: usdhc2slpgrp {     1389         pinctrl_usdhc2_sleep: usdhc2slpgrp {
1402                 fsl,pins =                       1390                 fsl,pins =
1403                         <MX8MP_IOMUXC_GPIO1_I    1391                         <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT        0x0>,
1404                         <MX8MP_IOMUXC_SD2_CLK    1392                         <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK               0x100>,
1405                         <MX8MP_IOMUXC_SD2_CMD    1393                         <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD               0x100>,
1406                         <MX8MP_IOMUXC_SD2_DAT    1394                         <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0           0x100>,
1407                         <MX8MP_IOMUXC_SD2_DAT    1395                         <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1           0x100>,
1408                         <MX8MP_IOMUXC_SD2_DAT    1396                         <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2           0x100>,
1409                         <MX8MP_IOMUXC_SD2_DAT    1397                         <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3           0x100>;
1410         };                                       1398         };
1411                                                  1399 
1412         pinctrl_usdhc3: usdhc3grp {              1400         pinctrl_usdhc3: usdhc3grp {
1413                 fsl,pins =                       1401                 fsl,pins =
1414                         <MX8MP_IOMUXC_GPIO1_I    1402                         <MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B        0x1d1>,
1415                         <MX8MP_IOMUXC_NAND_CE    1403                         <MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE         0x190>,
1416                         <MX8MP_IOMUXC_NAND_CE    1404                         <MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5          0x1d0>,
1417                         <MX8MP_IOMUXC_NAND_CE    1405                         <MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6          0x1d0>,
1418                         <MX8MP_IOMUXC_NAND_CL    1406                         <MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7            0x1d0>,
1419                         <MX8MP_IOMUXC_NAND_DA    1407                         <MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0         0x1d0>,
1420                         <MX8MP_IOMUXC_NAND_DA    1408                         <MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1         0x1d0>,
1421                         <MX8MP_IOMUXC_NAND_DA    1409                         <MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2         0x1d0>,
1422                         <MX8MP_IOMUXC_NAND_DA    1410                         <MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3         0x1d0>,
1423                         <MX8MP_IOMUXC_NAND_RE    1411                         <MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4           0x1d0>,
1424                         <MX8MP_IOMUXC_NAND_WE    1412                         <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK             0x190>,
1425                         <MX8MP_IOMUXC_NAND_WP    1413                         <MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD             0x1d0>;
1426         };                                       1414         };
1427                                                  1415 
1428         pinctrl_usdhc3_100mhz: usdhc3-100mhzg    1416         pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
1429                 fsl,pins =                       1417                 fsl,pins =
1430                         <MX8MP_IOMUXC_GPIO1_I    1418                         <MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B        0x1d1>,
1431                         <MX8MP_IOMUXC_NAND_CE    1419                         <MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE         0x194>,
1432                         <MX8MP_IOMUXC_NAND_CE    1420                         <MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5          0x1d4>,
1433                         <MX8MP_IOMUXC_NAND_CE    1421                         <MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6          0x1d4>,
1434                         <MX8MP_IOMUXC_NAND_CL    1422                         <MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7            0x1d4>,
1435                         <MX8MP_IOMUXC_NAND_DA    1423                         <MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0         0x1d4>,
1436                         <MX8MP_IOMUXC_NAND_DA    1424                         <MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1         0x1d4>,
1437                         <MX8MP_IOMUXC_NAND_DA    1425                         <MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2         0x1d4>,
1438                         <MX8MP_IOMUXC_NAND_DA    1426                         <MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3         0x1d4>,
1439                         <MX8MP_IOMUXC_NAND_RE    1427                         <MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4           0x1d4>,
1440                         <MX8MP_IOMUXC_NAND_WE    1428                         <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK             0x194>,
1441                         <MX8MP_IOMUXC_NAND_WP    1429                         <MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD             0x1d4>;
1442         };                                       1430         };
1443                                                  1431 
1444         pinctrl_usdhc3_200mhz: usdhc3-200mhzg    1432         pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
1445                 fsl,pins =                       1433                 fsl,pins =
1446                         <MX8MP_IOMUXC_GPIO1_I    1434                         <MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B        0x1d1>,
1447                         <MX8MP_IOMUXC_NAND_CE    1435                         <MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE         0x196>,
1448                         <MX8MP_IOMUXC_NAND_CE    1436                         <MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5          0x1d2>,
1449                         <MX8MP_IOMUXC_NAND_CE    1437                         <MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6          0x1d2>,
1450                         <MX8MP_IOMUXC_NAND_CL    1438                         <MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7            0x1d2>,
1451                         <MX8MP_IOMUXC_NAND_DA    1439                         <MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0         0x1d2>,
1452                         <MX8MP_IOMUXC_NAND_DA    1440                         <MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1         0x1d2>,
1453                         <MX8MP_IOMUXC_NAND_DA    1441                         <MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2         0x1d2>,
1454                         <MX8MP_IOMUXC_NAND_DA    1442                         <MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3         0x1d2>,
1455                         <MX8MP_IOMUXC_NAND_RE    1443                         <MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4           0x1d2>,
1456                         <MX8MP_IOMUXC_NAND_WE    1444                         <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK             0x196>,
1457                         <MX8MP_IOMUXC_NAND_WP    1445                         <MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD             0x1d6>;
1458         };                                       1446         };
1459                                                  1447 
1460         pinctrl_wdog: wdoggrp {                  1448         pinctrl_wdog: wdoggrp {
1461                 fsl,pins =                       1449                 fsl,pins =
1462                         <MX8MP_IOMUXC_GPIO1_I    1450                         <MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B          0xc6>;  /* PMIC_WDI */
1463         };                                       1451         };
1464                                                  1452 
1465         pinctrl_bluetooth_ctrl: bluetoothctrl    1453         pinctrl_bluetooth_ctrl: bluetoothctrlgrp {
1466                 fsl,pins =                       1454                 fsl,pins =
1467                         <MX8MP_IOMUXC_SD1_DAT    1455                         <MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08             0x1c4>; /* WIFI_WKUP_BT */
1468         };                                       1456         };
1469                                                  1457 
1470         pinctrl_wifi_ctrl: wifictrlgrp {         1458         pinctrl_wifi_ctrl: wifictrlgrp {
1471                 fsl,pins =                       1459                 fsl,pins =
1472                         <MX8MP_IOMUXC_SD1_DAT    1460                         <MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09             0x1c4>; /* WIFI_WKUP_WLAN */
1473         };                                       1461         };
1474                                                  1462 
1475         pinctrl_wifi_i2s: wifii2sgrp {           1463         pinctrl_wifi_i2s: wifii2sgrp {
1476                 fsl,pins =                       1464                 fsl,pins =
1477                         <MX8MP_IOMUXC_SAI2_RX    1465                         <MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21             0x1d6>, /* WIFI_TX_SYNC */
1478                         <MX8MP_IOMUXC_SAI5_RX    1466                         <MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21             0x96>,  /* WIFI_RX_DATA0 */
1479                         <MX8MP_IOMUXC_SAI5_RX    1467                         <MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23             0x1d6>, /* WIFI_TX_BCLK */
1480                         <MX8MP_IOMUXC_SAI5_RX    1468                         <MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24             0x1d6>; /* WIFI_TX_DATA0 */
1481         };                                       1469         };
1482                                                  1470 
1483         pinctrl_wifi_pwr_en: wifipwrengrp {      1471         pinctrl_wifi_pwr_en: wifipwrengrp {
1484                 fsl,pins =                       1472                 fsl,pins =
1485                         <MX8MP_IOMUXC_SD1_STR    1473                         <MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11            0x184>; /* PMIC_EN_WIFI */
1486         };                                       1474         };
1487 };                                               1475 };
                                                      

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