1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-
4 */
5
6 /dts-v1/;
7
8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi"
10
11 / {
12 model = "SolidRun i.MX8MQ HummingBoard
13 compatible = "solidrun,hummingboard-pu
14
15 chosen {
16 stdout-path = &uart1;
17 };
18
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc
20 compatible = "regulator-fixed"
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_usdhc2_v
23 regulator-name = "VSD_3V3";
24 regulator-min-microvolt = <330
25 regulator-max-microvolt = <330
26 gpio = <&gpio1 13 GPIO_ACTIVE_
27 };
28
29 reg_v_5v0: regulator-v-5v0 {
30 compatible = "regulator-fixed"
31 regulator-name = "v_5v0";
32 regulator-max-microvolt = <500
33 regulator-min-microvolt = <500
34 regulator-always-on;
35 };
36 };
37
38 &i2c2 {
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_i2c2>;
41 clock-frequency = <100000>;
42 status = "okay";
43
44 typec_ptn5100: usb-typec@50 {
45 compatible = "nxp,ptn5110", "t
46 reg = <0x50>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_typec>;
49 interrupt-parent = <&gpio1>;
50 interrupts = <6 IRQ_TYPE_LEVEL
51
52 connector {
53 compatible = "usb-c-co
54 label = "USB-C";
55 data-role = "dual";
56 power-role = "dual";
57 try-power-role = "sink
58 source-pdos = <PDO_FIX
59
60
61
62 sink-pdos = <PDO_FIXED
63
64
65
66 PDO_FIXED
67
68
69
70 op-sink-microwatt = <9
71
72 port {
73 typec1_dr_sw:
74 remote
75 };
76 };
77 };
78 };
79 };
80
81 &i2c3 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_i2c3>;
84 clock-frequency = <100000>;
85 status = "okay";
86
87 eeprom@57 {
88 compatible = "atmel,24c02";
89 reg = <0x57>;
90 status = "okay";
91 };
92
93 rtc@69 {
94 compatible = "abracon,ab1805";
95 reg = <0x69>;
96 abracon,tc-diode = "schottky";
97 abracon,tc-resistor = <3>;
98 };
99 };
100
101 &uart2 { /* J35 header */
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_uart2>;
104 assigned-clocks = <&clk IMX8MQ_CLK_UAR
105 assigned-clock-parents = <&clk IMX8MQ_
106 status = "okay";
107 };
108
109 &uart3 { /* Mikrobus */
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_uart3>;
112 assigned-clocks = <&clk IMX8MQ_CLK_UAR
113 assigned-clock-parents = <&clk IMX8MQ_
114 uart-has-rtscts;
115 status = "okay";
116 };
117
118 &usdhc2 {
119 assigned-clocks = <&clk IMX8MQ_CLK_USD
120 assigned-clock-rates = <200000000>;
121 pinctrl-names = "default", "state_100m
122 pinctrl-0 = <&pinctrl_usdhc2>, <&pinct
123 pinctrl-1 = <&pinctrl_usdhc2_100mhz>,
124 pinctrl-2 = <&pinctrl_usdhc2_200mhz>,
125 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>
126 vmmc-supply = <®_usdhc2_vmmc>;
127 status = "okay";
128 };
129
130 &usb_dwc3_0 {
131 dr_mode = "otg";
132 status = "okay";
133
134 port {
135 usb1_drd_sw: endpoint {
136 remote-endpoint = <&ty
137 };
138 };
139 };
140
141 &usb_dwc3_1 {
142 dr_mode = "host";
143 status = "okay";
144 };
145
146 &usb3_phy0 {
147 status = "okay";
148 };
149
150 &usb3_phy1 {
151 status = "okay";
152 };
153
154 &iomuxc {
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_hog>;
157
158 pinctrl_hog: hoggrp {
159 fsl,pins = <
160 /* MikroBus Analog */
161 MX8MQ_IOMUXC_NAND_DATA
162 /* MikroBus Reset */
163 MX8MQ_IOMUXC_SAI2_RXD0
164 /*
165 * The following 2 pin
166 * reconfigured to ena
167 */
168 /* MikroBus PWM */
169 MX8MQ_IOMUXC_ECSPI1_MI
170 /* MikroBus INT */
171 MX8MQ_IOMUXC_ECSPI1_SS
172 >;
173 };
174
175 pinctrl_i2c2: i2c2grp {
176 fsl,pins = <
177 MX8MQ_IOMUXC_I2C2_SCL_
178 MX8MQ_IOMUXC_I2C2_SDA_
179 >;
180 };
181
182 pinctrl_i2c3: i2c3grp {
183 fsl,pins = <
184 MX8MQ_IOMUXC_I2C3_SCL_
185 MX8MQ_IOMUXC_I2C3_SDA_
186 >;
187 };
188
189 pinctrl_typec: typecgrp {
190 fsl,pins = <
191 MX8MQ_IOMUXC_NAND_RE_B
192 MX8MQ_IOMUXC_GPIO1_IO0
193 >;
194 };
195
196 pinctrl_uart2: uart2grp {
197 fsl,pins = <
198 MX8MQ_IOMUXC_UART2_TXD
199 MX8MQ_IOMUXC_UART2_RXD
200 >;
201 };
202
203 pinctrl_uart3: uart3grp {
204 fsl,pins = <
205 MX8MQ_IOMUXC_UART3_TXD
206 MX8MQ_IOMUXC_UART3_RXD
207 /*
208 * These pins are by d
209 * Header. To use RTS/
210 * of the hoggrp and e
211 */
212 /* MX8MQ_IOMUXC_ECSPI1
213 /* MX8MQ_IOMUXC_ECSPI1
214 >;
215 };
216
217 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
218 fsl,pins = <
219 MX8MQ_IOMUXC_SD2_CD_B_
220 >;
221 };
222
223 pinctrl_usdhc2_vmmc: usdhc2vmmcgpiogrp
224 fsl,pins = <
225 MX8MQ_IOMUXC_GPIO1_IO1
226 >;
227 };
228
229 pinctrl_usdhc2: usdhc2grp {
230 fsl,pins = <
231 MX8MQ_IOMUXC_SD2_CLK_U
232 MX8MQ_IOMUXC_SD2_CMD_U
233 MX8MQ_IOMUXC_SD2_DATA0
234 MX8MQ_IOMUXC_SD2_DATA1
235 MX8MQ_IOMUXC_SD2_DATA2
236 MX8MQ_IOMUXC_SD2_DATA3
237 MX8MQ_IOMUXC_GPIO1_IO0
238 >;
239 };
240
241 pinctrl_usdhc2_100mhz: usdhc2-100mhzgr
242 fsl,pins = <
243 MX8MQ_IOMUXC_SD2_CLK_U
244 MX8MQ_IOMUXC_SD2_CMD_U
245 MX8MQ_IOMUXC_SD2_DATA0
246 MX8MQ_IOMUXC_SD2_DATA1
247 MX8MQ_IOMUXC_SD2_DATA2
248 MX8MQ_IOMUXC_SD2_DATA3
249 MX8MQ_IOMUXC_GPIO1_IO0
250 >;
251 };
252
253 pinctrl_usdhc2_200mhz: usdhc2-200mhzgr
254 fsl,pins = <
255 MX8MQ_IOMUXC_SD2_CLK_U
256 MX8MQ_IOMUXC_SD2_CMD_U
257 MX8MQ_IOMUXC_SD2_DATA0
258 MX8MQ_IOMUXC_SD2_DATA1
259 MX8MQ_IOMUXC_SD2_DATA2
260 MX8MQ_IOMUXC_SD2_DATA3
261 MX8MQ_IOMUXC_GPIO1_IO0
262 >;
263 };
264 };
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