1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* 2 /*
3 * Copyright (C) 2018 Jon Nettleton <jon@solid- 3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "dt-bindings/usb/pd.h" 8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi" 9 #include "imx8mq-sr-som.dtsi"
10 10
11 / { 11 / {
12 model = "SolidRun i.MX8MQ HummingBoard 12 model = "SolidRun i.MX8MQ HummingBoard Pulse";
13 compatible = "solidrun,hummingboard-pu 13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
14 14
15 chosen { 15 chosen {
16 stdout-path = &uart1; 16 stdout-path = &uart1;
17 }; 17 };
18 18
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc 19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20 compatible = "regulator-fixed" 20 compatible = "regulator-fixed";
21 pinctrl-names = "default"; 21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_usdhc2_v 22 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
23 regulator-name = "VSD_3V3"; 23 regulator-name = "VSD_3V3";
24 regulator-min-microvolt = <330 24 regulator-min-microvolt = <3300000>;
25 regulator-max-microvolt = <330 25 regulator-max-microvolt = <3300000>;
26 gpio = <&gpio1 13 GPIO_ACTIVE_ 26 gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
27 }; 27 };
28 28
29 reg_v_5v0: regulator-v-5v0 { 29 reg_v_5v0: regulator-v-5v0 {
30 compatible = "regulator-fixed" 30 compatible = "regulator-fixed";
31 regulator-name = "v_5v0"; 31 regulator-name = "v_5v0";
32 regulator-max-microvolt = <500 32 regulator-max-microvolt = <5000000>;
33 regulator-min-microvolt = <500 33 regulator-min-microvolt = <5000000>;
34 regulator-always-on; 34 regulator-always-on;
35 }; 35 };
36 }; 36 };
37 37
38 &i2c2 { 38 &i2c2 {
39 pinctrl-names = "default"; 39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_i2c2>; 40 pinctrl-0 = <&pinctrl_i2c2>;
41 clock-frequency = <100000>; 41 clock-frequency = <100000>;
42 status = "okay"; 42 status = "okay";
43 43
44 typec_ptn5100: usb-typec@50 { 44 typec_ptn5100: usb-typec@50 {
45 compatible = "nxp,ptn5110", "t !! 45 compatible = "nxp,ptn5110";
46 reg = <0x50>; 46 reg = <0x50>;
47 pinctrl-names = "default"; 47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_typec>; 48 pinctrl-0 = <&pinctrl_typec>;
49 interrupt-parent = <&gpio1>; 49 interrupt-parent = <&gpio1>;
50 interrupts = <6 IRQ_TYPE_LEVEL 50 interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
51 51
52 connector { 52 connector {
53 compatible = "usb-c-co 53 compatible = "usb-c-connector";
54 label = "USB-C"; 54 label = "USB-C";
55 data-role = "dual"; 55 data-role = "dual";
56 power-role = "dual"; 56 power-role = "dual";
57 try-power-role = "sink 57 try-power-role = "sink";
58 source-pdos = <PDO_FIX 58 source-pdos = <PDO_FIXED(5000, 2000,
59 59 PDO_FIXED_USB_COMM |
60 60 PDO_FIXED_SUSPEND |
61 61 PDO_FIXED_EXTPOWER)>;
62 sink-pdos = <PDO_FIXED 62 sink-pdos = <PDO_FIXED(5000, 2000,
63 63 PDO_FIXED_USB_COMM |
64 64 PDO_FIXED_SUSPEND |
65 65 PDO_FIXED_EXTPOWER)
66 PDO_FIXED 66 PDO_FIXED(9000, 2000,
67 67 PDO_FIXED_USB_COMM |
68 68 PDO_FIXED_SUSPEND |
69 69 PDO_FIXED_EXTPOWER)>;
70 op-sink-microwatt = <9 70 op-sink-microwatt = <9000000>;
71 71
72 port { 72 port {
73 typec1_dr_sw: 73 typec1_dr_sw: endpoint {
74 remote 74 remote-endpoint = <&usb1_drd_sw>;
75 }; 75 };
76 }; 76 };
77 }; 77 };
78 }; 78 };
79 }; 79 };
80 80
81 &i2c3 { 81 &i2c3 {
82 pinctrl-names = "default"; 82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_i2c3>; 83 pinctrl-0 = <&pinctrl_i2c3>;
84 clock-frequency = <100000>; 84 clock-frequency = <100000>;
85 status = "okay"; 85 status = "okay";
86 86
87 eeprom@57 { 87 eeprom@57 {
88 compatible = "atmel,24c02"; 88 compatible = "atmel,24c02";
89 reg = <0x57>; 89 reg = <0x57>;
90 status = "okay"; 90 status = "okay";
91 }; 91 };
92 92
93 rtc@69 { 93 rtc@69 {
94 compatible = "abracon,ab1805"; 94 compatible = "abracon,ab1805";
95 reg = <0x69>; 95 reg = <0x69>;
96 abracon,tc-diode = "schottky"; 96 abracon,tc-diode = "schottky";
97 abracon,tc-resistor = <3>; 97 abracon,tc-resistor = <3>;
98 }; 98 };
99 }; 99 };
100 100
101 &uart2 { /* J35 header */ 101 &uart2 { /* J35 header */
102 pinctrl-names = "default"; 102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_uart2>; 103 pinctrl-0 = <&pinctrl_uart2>;
104 assigned-clocks = <&clk IMX8MQ_CLK_UAR 104 assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
105 assigned-clock-parents = <&clk IMX8MQ_ 105 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
106 status = "okay"; 106 status = "okay";
107 }; 107 };
108 108
109 &uart3 { /* Mikrobus */ 109 &uart3 { /* Mikrobus */
110 pinctrl-names = "default"; 110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_uart3>; 111 pinctrl-0 = <&pinctrl_uart3>;
112 assigned-clocks = <&clk IMX8MQ_CLK_UAR 112 assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
113 assigned-clock-parents = <&clk IMX8MQ_ 113 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
114 uart-has-rtscts; 114 uart-has-rtscts;
115 status = "okay"; 115 status = "okay";
116 }; 116 };
117 117
118 &usdhc2 { 118 &usdhc2 {
119 assigned-clocks = <&clk IMX8MQ_CLK_USD 119 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
120 assigned-clock-rates = <200000000>; 120 assigned-clock-rates = <200000000>;
121 pinctrl-names = "default", "state_100m 121 pinctrl-names = "default", "state_100mhz", "state_200mhz";
122 pinctrl-0 = <&pinctrl_usdhc2>, <&pinct 122 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
123 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, 123 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
124 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, 124 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
125 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW> 125 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
126 vmmc-supply = <®_usdhc2_vmmc>; 126 vmmc-supply = <®_usdhc2_vmmc>;
127 status = "okay"; 127 status = "okay";
128 }; 128 };
129 129
130 &usb_dwc3_0 { 130 &usb_dwc3_0 {
131 dr_mode = "otg"; 131 dr_mode = "otg";
132 status = "okay"; 132 status = "okay";
133 133
134 port { 134 port {
135 usb1_drd_sw: endpoint { 135 usb1_drd_sw: endpoint {
136 remote-endpoint = <&ty 136 remote-endpoint = <&typec1_dr_sw>;
137 }; 137 };
138 }; 138 };
139 }; 139 };
140 140
141 &usb_dwc3_1 { 141 &usb_dwc3_1 {
142 dr_mode = "host"; 142 dr_mode = "host";
143 status = "okay"; 143 status = "okay";
144 }; 144 };
145 145
146 &usb3_phy0 { 146 &usb3_phy0 {
147 status = "okay"; 147 status = "okay";
148 }; 148 };
149 149
150 &usb3_phy1 { 150 &usb3_phy1 {
151 status = "okay"; 151 status = "okay";
152 }; 152 };
153 153
154 &iomuxc { 154 &iomuxc {
155 pinctrl-names = "default"; 155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_hog>; 156 pinctrl-0 = <&pinctrl_hog>;
157 157
158 pinctrl_hog: hoggrp { 158 pinctrl_hog: hoggrp {
159 fsl,pins = < 159 fsl,pins = <
160 /* MikroBus Analog */ 160 /* MikroBus Analog */
161 MX8MQ_IOMUXC_NAND_DATA 161 MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x41
162 /* MikroBus Reset */ 162 /* MikroBus Reset */
163 MX8MQ_IOMUXC_SAI2_RXD0 163 MX8MQ_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x41
164 /* 164 /*
165 * The following 2 pin 165 * The following 2 pins need to be commented out and
166 * reconfigured to ena 166 * reconfigured to enable RTS/CTS on UART3
167 */ 167 */
168 /* MikroBus PWM */ 168 /* MikroBus PWM */
169 MX8MQ_IOMUXC_ECSPI1_MI 169 MX8MQ_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x41
170 /* MikroBus INT */ 170 /* MikroBus INT */
171 MX8MQ_IOMUXC_ECSPI1_SS 171 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
172 >; 172 >;
173 }; 173 };
174 174
175 pinctrl_i2c2: i2c2grp { 175 pinctrl_i2c2: i2c2grp {
176 fsl,pins = < 176 fsl,pins = <
177 MX8MQ_IOMUXC_I2C2_SCL_ 177 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f
178 MX8MQ_IOMUXC_I2C2_SDA_ 178 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f
179 >; 179 >;
180 }; 180 };
181 181
182 pinctrl_i2c3: i2c3grp { 182 pinctrl_i2c3: i2c3grp {
183 fsl,pins = < 183 fsl,pins = <
184 MX8MQ_IOMUXC_I2C3_SCL_ 184 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f
185 MX8MQ_IOMUXC_I2C3_SDA_ 185 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f
186 >; 186 >;
187 }; 187 };
188 188
189 pinctrl_typec: typecgrp { 189 pinctrl_typec: typecgrp {
190 fsl,pins = < 190 fsl,pins = <
191 MX8MQ_IOMUXC_NAND_RE_B 191 MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x16
192 MX8MQ_IOMUXC_GPIO1_IO0 192 MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x17059
193 >; 193 >;
194 }; 194 };
195 195
196 pinctrl_uart2: uart2grp { 196 pinctrl_uart2: uart2grp {
197 fsl,pins = < 197 fsl,pins = <
198 MX8MQ_IOMUXC_UART2_TXD 198 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
199 MX8MQ_IOMUXC_UART2_RXD 199 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
200 >; 200 >;
201 }; 201 };
202 202
203 pinctrl_uart3: uart3grp { 203 pinctrl_uart3: uart3grp {
204 fsl,pins = < 204 fsl,pins = <
205 MX8MQ_IOMUXC_UART3_TXD 205 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
206 MX8MQ_IOMUXC_UART3_RXD 206 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
207 /* 207 /*
208 * These pins are by d 208 * These pins are by default GPIO on the Mikro Bus
209 * Header. To use RTS/ 209 * Header. To use RTS/CTS on UART3 comment them out
210 * of the hoggrp and e 210 * of the hoggrp and enable them here
211 */ 211 */
212 /* MX8MQ_IOMUXC_ECSPI1 212 /* MX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x49 */
213 /* MX8MQ_IOMUXC_ECSPI1 213 /* MX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x49 */
214 >; 214 >;
215 }; 215 };
216 216
217 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 217 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
218 fsl,pins = < 218 fsl,pins = <
219 MX8MQ_IOMUXC_SD2_CD_B_ 219 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41
220 >; 220 >;
221 }; 221 };
222 222
223 pinctrl_usdhc2_vmmc: usdhc2vmmcgpiogrp 223 pinctrl_usdhc2_vmmc: usdhc2vmmcgpiogrp {
224 fsl,pins = < 224 fsl,pins = <
225 MX8MQ_IOMUXC_GPIO1_IO1 225 MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41
226 >; 226 >;
227 }; 227 };
228 228
229 pinctrl_usdhc2: usdhc2grp { 229 pinctrl_usdhc2: usdhc2grp {
230 fsl,pins = < 230 fsl,pins = <
231 MX8MQ_IOMUXC_SD2_CLK_U 231 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
232 MX8MQ_IOMUXC_SD2_CMD_U 232 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
233 MX8MQ_IOMUXC_SD2_DATA0 233 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
234 MX8MQ_IOMUXC_SD2_DATA1 234 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
235 MX8MQ_IOMUXC_SD2_DATA2 235 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
236 MX8MQ_IOMUXC_SD2_DATA3 236 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
237 MX8MQ_IOMUXC_GPIO1_IO0 237 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
238 >; 238 >;
239 }; 239 };
240 240
241 pinctrl_usdhc2_100mhz: usdhc2-100mhzgr 241 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
242 fsl,pins = < 242 fsl,pins = <
243 MX8MQ_IOMUXC_SD2_CLK_U 243 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
244 MX8MQ_IOMUXC_SD2_CMD_U 244 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
245 MX8MQ_IOMUXC_SD2_DATA0 245 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
246 MX8MQ_IOMUXC_SD2_DATA1 246 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
247 MX8MQ_IOMUXC_SD2_DATA2 247 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
248 MX8MQ_IOMUXC_SD2_DATA3 248 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
249 MX8MQ_IOMUXC_GPIO1_IO0 249 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
250 >; 250 >;
251 }; 251 };
252 252
253 pinctrl_usdhc2_200mhz: usdhc2-200mhzgr 253 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
254 fsl,pins = < 254 fsl,pins = <
255 MX8MQ_IOMUXC_SD2_CLK_U 255 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
256 MX8MQ_IOMUXC_SD2_CMD_U 256 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xdf
257 MX8MQ_IOMUXC_SD2_DATA0 257 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xdf
258 MX8MQ_IOMUXC_SD2_DATA1 258 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xdf
259 MX8MQ_IOMUXC_SD2_DATA2 259 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xdf
260 MX8MQ_IOMUXC_SD2_DATA3 260 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xdf
261 MX8MQ_IOMUXC_GPIO1_IO0 261 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
262 >; 262 >;
263 }; 263 };
264 }; 264 };
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