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Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mq-phanbell.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8mq-phanbell.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/freescale/imx8mq-phanbell.dts (Version linux-4.4.302)


  1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)      
  2 /*                                                
  3  * Copyright 2017-2019 NXP                        
  4  */                                               
  5                                                   
  6 /dts-v1/;                                         
  7                                                   
  8 #include "imx8mq.dtsi"                            
  9 #include <dt-bindings/interrupt-controller/irq    
 10                                                   
 11 / {                                               
 12         model = "Google i.MX8MQ Phanbell";        
 13         compatible = "google,imx8mq-phanbell",    
 14                                                   
 15         chosen {                                  
 16                 stdout-path = &uart1;             
 17         };                                        
 18                                                   
 19         memory@40000000 {                         
 20                 device_type = "memory";           
 21                 reg = <0x00000000 0x40000000 0    
 22         };                                        
 23                                                   
 24         pmic_osc: clock-pmic {                    
 25                 compatible = "fixed-clock";       
 26                 #clock-cells = <0>;               
 27                 clock-frequency = <32768>;        
 28                 clock-output-names = "pmic_osc    
 29         };                                        
 30                                                   
 31         reg_usdhc2_vmmc: regulator-usdhc2-vmmc    
 32                 compatible = "regulator-fixed"    
 33                 regulator-name = "VSD_3V3";       
 34                 regulator-min-microvolt = <330    
 35                 regulator-max-microvolt = <330    
 36                 gpio = <&gpio2 19 GPIO_ACTIVE_    
 37                 enable-active-high;               
 38         };                                        
 39                                                   
 40         fan: gpio-fan {                           
 41                 compatible = "gpio-fan";          
 42                 gpio-fan,speed-map = <0 0>, <8    
 43                 gpios = <&gpio3 5 GPIO_ACTIVE_    
 44                 #cooling-cells = <2>;             
 45                 pinctrl-names = "default";        
 46                 pinctrl-0 = <&pinctrl_gpio_fan    
 47                 status = "okay";                  
 48         };                                        
 49 };                                                
 50                                                   
 51 &A53_0 {                                          
 52         cpu-supply = <&buck2>;                    
 53 };                                                
 54                                                   
 55 &A53_1 {                                          
 56         cpu-supply = <&buck2>;                    
 57 };                                                
 58                                                   
 59 &A53_2 {                                          
 60         cpu-supply = <&buck2>;                    
 61 };                                                
 62                                                   
 63 &A53_3 {                                          
 64         cpu-supply = <&buck2>;                    
 65 };                                                
 66                                                   
 67 &cpu_thermal {                                    
 68         trips {                                   
 69                 cpu_alert0: trip0 {               
 70                         temperature = <75000>;    
 71                         hysteresis = <2000>;      
 72                         type = "passive";         
 73                 };                                
 74                                                   
 75                 cpu_alert1: trip1 {               
 76                         temperature = <80000>;    
 77                         hysteresis = <2000>;      
 78                         type = "passive";         
 79                 };                                
 80                                                   
 81                 cpu_crit0: trip3 {                
 82                         temperature = <90000>;    
 83                         hysteresis = <2000>;      
 84                         type = "critical";        
 85                 };                                
 86                                                   
 87                 fan_toggle0: trip4 {              
 88                         temperature = <65000>;    
 89                         hysteresis = <10000>;     
 90                         type = "active";          
 91                 };                                
 92         };                                        
 93                                                   
 94         cooling-maps {                            
 95                 map0 {                            
 96                         trip = <&cpu_alert0>;     
 97                         cooling-device =          
 98                         <&A53_0 0 1>; /* Exclu    
 99                 };                                
100                                                   
101                 map1 {                            
102                         trip = <&cpu_alert1>;     
103                         cooling-device =          
104                         <&A53_0 0 2>; /* Exclu    
105                 };                                
106                                                   
107                 map4 {                            
108                         trip = <&fan_toggle0>;    
109                         cooling-device = <&fan    
110                 };                                
111         };                                        
112 };                                                
113                                                   
114 &i2c1 {                                           
115         clock-frequency = <400000>;               
116         pinctrl-names = "default";                
117         pinctrl-0 = <&pinctrl_i2c1>;              
118         status = "okay";                          
119                                                   
120         pmic: pmic@4b {                           
121                 compatible = "rohm,bd71837";      
122                 reg = <0x4b>;                     
123                 pinctrl-names = "default";        
124                 pinctrl-0 = <&pinctrl_pmic>;      
125                 #clock-cells = <0>;               
126                 clocks = <&pmic_osc>;             
127                 clock-output-names = "pmic_clk    
128                 interrupt-parent = <&gpio1>;      
129                 interrupts = <3 IRQ_TYPE_LEVEL    
130                                                   
131                 regulators {                      
132                         buck1: BUCK1 {            
133                                 regulator-name    
134                                 regulator-min-    
135                                 regulator-max-    
136                                 regulator-boot    
137                                 regulator-alwa    
138                                 regulator-ramp    
139                                 rohm,dvs-run-v    
140                                 rohm,dvs-idle-    
141                                 rohm,dvs-suspe    
142                         };                        
143                                                   
144                         buck2: BUCK2 {            
145                                 regulator-name    
146                                 regulator-min-    
147                                 regulator-max-    
148                                 regulator-boot    
149                                 regulator-alwa    
150                                 rohm,dvs-run-v    
151                                 rohm,dvs-idle-    
152                         };                        
153                                                   
154                         buck3: BUCK3 {            
155                                 regulator-name    
156                                 regulator-min-    
157                                 regulator-max-    
158                                 regulator-boot    
159                                 rohm,dvs-run-v    
160                         };                        
161                                                   
162                         buck4: BUCK4 {            
163                                 regulator-name    
164                                 regulator-min-    
165                                 regulator-max-    
166                                 regulator-boot    
167                                 regulator-alwa    
168                                 rohm,dvs-run-v    
169                         };                        
170                                                   
171                         buck5: BUCK5 {            
172                                 regulator-name    
173                                 regulator-min-    
174                                 regulator-max-    
175                                 regulator-boot    
176                                 regulator-alwa    
177                         };                        
178                                                   
179                         buck6: BUCK6 {            
180                                 regulator-name    
181                                 regulator-min-    
182                                 regulator-max-    
183                                 regulator-boot    
184                                 regulator-alwa    
185                         };                        
186                                                   
187                         buck7: BUCK7 {            
188                                 regulator-name    
189                                 regulator-min-    
190                                 regulator-max-    
191                                 regulator-boot    
192                                 regulator-alwa    
193                         };                        
194                                                   
195                         buck8: BUCK8 {            
196                                 regulator-name    
197                                 regulator-min-    
198                                 regulator-max-    
199                                 regulator-boot    
200                                 regulator-alwa    
201                         };                        
202                                                   
203                         ldo1: LDO1 {              
204                                 regulator-name    
205                                 regulator-min-    
206                                 regulator-max-    
207                                 regulator-boot    
208                                 regulator-alwa    
209                         };                        
210                                                   
211                         ldo2: LDO2 {              
212                                 regulator-name    
213                                 regulator-min-    
214                                 regulator-max-    
215                                 regulator-boot    
216                                 regulator-alwa    
217                         };                        
218                                                   
219                         ldo3: LDO3 {              
220                                 regulator-name    
221                                 regulator-min-    
222                                 regulator-max-    
223                                 regulator-boot    
224                                 regulator-alwa    
225                         };                        
226                                                   
227                         ldo4: LDO4 {              
228                                 regulator-name    
229                                 regulator-min-    
230                                 regulator-max-    
231                                 regulator-boot    
232                                 regulator-alwa    
233                         };                        
234                                                   
235                         ldo5: LDO5 {              
236                                 regulator-name    
237                                 regulator-min-    
238                                 regulator-max-    
239                                 regulator-boot    
240                                 regulator-alwa    
241                         };                        
242                                                   
243                         ldo6: LDO6 {              
244                                 regulator-name    
245                                 regulator-min-    
246                                 regulator-max-    
247                                 regulator-boot    
248                                 regulator-alwa    
249                         };                        
250                                                   
251                         ldo7: LDO7 {              
252                                 regulator-name    
253                                 regulator-min-    
254                                 regulator-max-    
255                                 regulator-boot    
256                                 regulator-alwa    
257                         };                        
258                 };                                
259         };                                        
260 };                                                
261                                                   
262 &fec1 {                                           
263         pinctrl-names = "default";                
264         pinctrl-0 = <&pinctrl_fec1>;              
265         phy-mode = "rgmii-id";                    
266         phy-handle = <&ethphy0>;                  
267         fsl,magic-packet;                         
268         status = "okay";                          
269                                                   
270         mdio {                                    
271                 #address-cells = <1>;             
272                 #size-cells = <0>;                
273                 ethphy0: ethernet-phy@0 {         
274                         compatible = "ethernet    
275                         reg = <0>;                
276                         reset-gpios = <&gpio1     
277                         reset-assert-us = <100    
278                         reset-deassert-us = <5    
279                 };                                
280         };                                        
281 };                                                
282                                                   
283 &uart1 {                                          
284         pinctrl-names = "default";                
285         pinctrl-0 = <&pinctrl_uart1>;             
286         status = "okay";                          
287 };                                                
288                                                   
289 &usdhc1 {                                         
290         pinctrl-names = "default", "state_100m    
291         pinctrl-0 = <&pinctrl_usdhc1>;            
292         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;     
293         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;     
294         bus-width = <8>;                          
295         non-removable;                            
296         status = "okay";                          
297 };                                                
298                                                   
299 &usdhc2 {                                         
300         pinctrl-names = "default", "state_100m    
301         pinctrl-0 = <&pinctrl_usdhc2>, <&pinct    
302         pinctrl-1 = <&pinctrl_usdhc2_100mhz>,     
303         pinctrl-2 = <&pinctrl_usdhc2_200mhz>,     
304         bus-width = <4>;                          
305         cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>    
306         vmmc-supply = <&reg_usdhc2_vmmc>;         
307         status = "okay";                          
308 };                                                
309                                                   
310 &usb3_phy0 {                                      
311         status = "okay";                          
312 };                                                
313                                                   
314 &usb_dwc3_0 {                                     
315         dr_mode = "otg";                          
316         status = "okay";                          
317 };                                                
318                                                   
319 &usb3_phy1 {                                      
320         status = "okay";                          
321 };                                                
322                                                   
323 &usb_dwc3_1 {                                     
324         dr_mode = "host";                         
325         status = "okay";                          
326 };                                                
327                                                   
328 &wdog1 {                                          
329         pinctrl-names = "default";                
330         pinctrl-0 = <&pinctrl_wdog>;              
331         fsl,ext-reset-output;                     
332         status = "okay";                          
333 };                                                
334                                                   
335 &iomuxc {                                         
336         pinctrl_fec1: fec1grp {                   
337                 fsl,pins = <                      
338                         MX8MQ_IOMUXC_ENET_MDC_    
339                         MX8MQ_IOMUXC_ENET_MDIO    
340                         MX8MQ_IOMUXC_ENET_TD3_    
341                         MX8MQ_IOMUXC_ENET_TD2_    
342                         MX8MQ_IOMUXC_ENET_TD1_    
343                         MX8MQ_IOMUXC_ENET_TD0_    
344                         MX8MQ_IOMUXC_ENET_RD3_    
345                         MX8MQ_IOMUXC_ENET_RD2_    
346                         MX8MQ_IOMUXC_ENET_RD1_    
347                         MX8MQ_IOMUXC_ENET_RD0_    
348                         MX8MQ_IOMUXC_ENET_TXC_    
349                         MX8MQ_IOMUXC_ENET_RXC_    
350                         MX8MQ_IOMUXC_ENET_RX_C    
351                         MX8MQ_IOMUXC_ENET_TX_C    
352                         MX8MQ_IOMUXC_GPIO1_IO0    
353                 >;                                
354         };                                        
355                                                   
356         pinctrl_gpio_fan: gpiofangrp {            
357                 fsl,pins = <                      
358                         MX8MQ_IOMUXC_NAND_CLE_    
359                 >;                                
360         };                                        
361                                                   
362         pinctrl_i2c1: i2c1grp {                   
363                 fsl,pins = <                      
364                         MX8MQ_IOMUXC_I2C1_SCL_    
365                         MX8MQ_IOMUXC_I2C1_SDA_    
366                 >;                                
367         };                                        
368                                                   
369         pinctrl_pmic: pmicirqgrp {                
370                 fsl,pins = <                      
371                         MX8MQ_IOMUXC_GPIO1_IO0    
372                 >;                                
373         };                                        
374                                                   
375         pinctrl_uart1: uart1grp {                 
376                 fsl,pins = <                      
377                         MX8MQ_IOMUXC_UART1_RXD    
378                         MX8MQ_IOMUXC_UART1_TXD    
379                 >;                                
380         };                                        
381                                                   
382         pinctrl_usdhc1: usdhc1grp {               
383                 fsl,pins = <                      
384                         MX8MQ_IOMUXC_SD1_CLK_U    
385                         MX8MQ_IOMUXC_SD1_CMD_U    
386                         MX8MQ_IOMUXC_SD1_DATA0    
387                         MX8MQ_IOMUXC_SD1_DATA1    
388                         MX8MQ_IOMUXC_SD1_DATA2    
389                         MX8MQ_IOMUXC_SD1_DATA3    
390                         MX8MQ_IOMUXC_SD1_DATA4    
391                         MX8MQ_IOMUXC_SD1_DATA5    
392                         MX8MQ_IOMUXC_SD1_DATA6    
393                         MX8MQ_IOMUXC_SD1_DATA7    
394                         MX8MQ_IOMUXC_SD1_STROB    
395                         MX8MQ_IOMUXC_SD1_RESET    
396                 >;                                
397         };                                        
398                                                   
399         pinctrl_usdhc1_100mhz: usdhc1-100mhzgr    
400                 fsl,pins = <                      
401                         MX8MQ_IOMUXC_SD1_CLK_U    
402                         MX8MQ_IOMUXC_SD1_CMD_U    
403                         MX8MQ_IOMUXC_SD1_DATA0    
404                         MX8MQ_IOMUXC_SD1_DATA1    
405                         MX8MQ_IOMUXC_SD1_DATA2    
406                         MX8MQ_IOMUXC_SD1_DATA3    
407                         MX8MQ_IOMUXC_SD1_DATA4    
408                         MX8MQ_IOMUXC_SD1_DATA5    
409                         MX8MQ_IOMUXC_SD1_DATA6    
410                         MX8MQ_IOMUXC_SD1_DATA7    
411                         MX8MQ_IOMUXC_SD1_STROB    
412                         MX8MQ_IOMUXC_SD1_RESET    
413                 >;                                
414         };                                        
415                                                   
416         pinctrl_usdhc1_200mhz: usdhc1-200mhzgr    
417                 fsl,pins = <                      
418                         MX8MQ_IOMUXC_SD1_CLK_U    
419                         MX8MQ_IOMUXC_SD1_CMD_U    
420                         MX8MQ_IOMUXC_SD1_DATA0    
421                         MX8MQ_IOMUXC_SD1_DATA1    
422                         MX8MQ_IOMUXC_SD1_DATA2    
423                         MX8MQ_IOMUXC_SD1_DATA3    
424                         MX8MQ_IOMUXC_SD1_DATA4    
425                         MX8MQ_IOMUXC_SD1_DATA5    
426                         MX8MQ_IOMUXC_SD1_DATA6    
427                         MX8MQ_IOMUXC_SD1_DATA7    
428                         MX8MQ_IOMUXC_SD1_STROB    
429                         MX8MQ_IOMUXC_SD1_RESET    
430                 >;                                
431         };                                        
432                                                   
433         pinctrl_usdhc2_gpio: usdhc2gpiogrp {      
434                 fsl,pins = <                      
435                         MX8MQ_IOMUXC_SD2_CD_B_    
436                         MX8MQ_IOMUXC_SD2_RESET    
437                 >;                                
438         };                                        
439                                                   
440         pinctrl_usdhc2: usdhc2grp {               
441                 fsl,pins = <                      
442                         MX8MQ_IOMUXC_SD2_CLK_U    
443                         MX8MQ_IOMUXC_SD2_CMD_U    
444                         MX8MQ_IOMUXC_SD2_DATA0    
445                         MX8MQ_IOMUXC_SD2_DATA1    
446                         MX8MQ_IOMUXC_SD2_DATA2    
447                         MX8MQ_IOMUXC_SD2_DATA3    
448                         MX8MQ_IOMUXC_GPIO1_IO0    
449                 >;                                
450         };                                        
451                                                   
452         pinctrl_usdhc2_100mhz: usdhc2-100mhzgr    
453                 fsl,pins = <                      
454                         MX8MQ_IOMUXC_SD2_CLK_U    
455                         MX8MQ_IOMUXC_SD2_CMD_U    
456                         MX8MQ_IOMUXC_SD2_DATA0    
457                         MX8MQ_IOMUXC_SD2_DATA1    
458                         MX8MQ_IOMUXC_SD2_DATA2    
459                         MX8MQ_IOMUXC_SD2_DATA3    
460                         MX8MQ_IOMUXC_GPIO1_IO0    
461                 >;                                
462         };                                        
463                                                   
464         pinctrl_usdhc2_200mhz: usdhc2-200mhzgr    
465                 fsl,pins = <                      
466                         MX8MQ_IOMUXC_SD2_CLK_U    
467                         MX8MQ_IOMUXC_SD2_CMD_U    
468                         MX8MQ_IOMUXC_SD2_DATA0    
469                         MX8MQ_IOMUXC_SD2_DATA1    
470                         MX8MQ_IOMUXC_SD2_DATA2    
471                         MX8MQ_IOMUXC_SD2_DATA3    
472                         MX8MQ_IOMUXC_GPIO1_IO0    
473                 >;                                
474         };                                        
475                                                   
476         pinctrl_wdog: wdoggrp {                   
477                 fsl,pins = <                      
478                         MX8MQ_IOMUXC_GPIO1_IO0    
479                 >;                                
480         };                                        
481 };                                                
                                                      

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