Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 2 /* 3 * Copyright 2017~2018 NXP 3 * Copyright 2017~2018 NXP 4 */ 4 */ 5 5 6 /dts-v1/; 6 /dts-v1/; 7 7 8 #include "imx8qxp.dtsi" 8 #include "imx8qxp.dtsi" 9 #include <dt-bindings/usb/pd.h> << 10 9 11 / { 10 / { 12 model = "Freescale i.MX8QXP MEK"; 11 model = "Freescale i.MX8QXP MEK"; 13 compatible = "fsl,imx8qxp-mek", "fsl,i 12 compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp"; 14 13 15 chosen { 14 chosen { 16 stdout-path = &lpuart0; !! 15 stdout-path = &adma_lpuart0; 17 }; 16 }; 18 17 19 memory@80000000 { 18 memory@80000000 { 20 device_type = "memory"; 19 device_type = "memory"; 21 reg = <0x00000000 0x80000000 0 20 reg = <0x00000000 0x80000000 0 0x40000000>; 22 }; 21 }; 23 22 24 reg_usdhc2_vmmc: usdhc2-vmmc { 23 reg_usdhc2_vmmc: usdhc2-vmmc { 25 compatible = "regulator-fixed" 24 compatible = "regulator-fixed"; 26 regulator-name = "SD1_SPWR"; 25 regulator-name = "SD1_SPWR"; 27 regulator-min-microvolt = <300 26 regulator-min-microvolt = <3000000>; 28 regulator-max-microvolt = <300 27 regulator-max-microvolt = <3000000>; 29 gpio = <&lsio_gpio4 19 GPIO_AC 28 gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; 30 enable-active-high; 29 enable-active-high; 31 }; 30 }; 32 << 33 gpio-sbu-mux { << 34 compatible = "nxp,cbdtu02043", << 35 pinctrl-names = "default"; << 36 pinctrl-0 = <&pinctrl_typec_mu << 37 select-gpios = <&lsio_gpio5 9 << 38 enable-gpios = <&pca9557_a 7 G << 39 orientation-switch; << 40 << 41 port { << 42 usb3_data_ss: endpoint << 43 remote-endpoin << 44 }; << 45 }; << 46 }; << 47 << 48 sound-wm8960 { << 49 compatible = "fsl,imx-audio-wm << 50 model = "wm8960-audio"; << 51 audio-cpu = <&sai1>; << 52 audio-codec = <&wm8960>; << 53 hp-det-gpio = <&lsio_gpio1 0 G << 54 audio-routing = "Headphone Jac << 55 "Headphone Jac << 56 "Ext Spk", "SP << 57 "Ext Spk", "SP << 58 "Ext Spk", "SP << 59 "Ext Spk", "SP << 60 "LINPUT1", "Mi << 61 "Mic Jack", "M << 62 }; << 63 }; << 64 << 65 &dsp { << 66 memory-region = <&dsp_reserved>; << 67 status = "okay"; << 68 }; 31 }; 69 32 70 &dsp_reserved { !! 33 &adma_lpuart0 { >> 34 pinctrl-names = "default"; >> 35 pinctrl-0 = <&pinctrl_lpuart0>; 71 status = "okay"; 36 status = "okay"; 72 }; 37 }; 73 38 74 &fec1 { 39 &fec1 { 75 pinctrl-names = "default"; 40 pinctrl-names = "default"; 76 pinctrl-0 = <&pinctrl_fec1>; 41 pinctrl-0 = <&pinctrl_fec1>; 77 phy-mode = "rgmii-id"; 42 phy-mode = "rgmii-id"; 78 phy-handle = <&ethphy0>; 43 phy-handle = <&ethphy0>; 79 fsl,magic-packet; 44 fsl,magic-packet; 80 status = "okay"; 45 status = "okay"; 81 46 82 mdio { 47 mdio { 83 #address-cells = <1>; 48 #address-cells = <1>; 84 #size-cells = <0>; 49 #size-cells = <0>; 85 50 86 ethphy0: ethernet-phy@0 { 51 ethphy0: ethernet-phy@0 { 87 compatible = "ethernet 52 compatible = "ethernet-phy-ieee802.3-c22"; 88 reg = <0>; 53 reg = <0>; 89 }; 54 }; >> 55 >> 56 ethphy1: ethernet-phy@1 { >> 57 compatible = "ethernet-phy-ieee802.3-c22"; >> 58 reg = <1>; >> 59 }; 90 }; 60 }; 91 }; 61 }; 92 62 93 &i2c1 { !! 63 &adma_i2c1 { 94 #address-cells = <1>; 64 #address-cells = <1>; 95 #size-cells = <0>; 65 #size-cells = <0>; 96 clock-frequency = <100000>; 66 clock-frequency = <100000>; 97 pinctrl-names = "default"; 67 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ 68 pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>; 99 status = "okay"; 69 status = "okay"; 100 70 101 i2c-mux@71 { !! 71 i2c-switch@71 { 102 compatible = "nxp,pca9646", "n 72 compatible = "nxp,pca9646", "nxp,pca9546"; 103 #address-cells = <1>; 73 #address-cells = <1>; 104 #size-cells = <0>; 74 #size-cells = <0>; 105 reg = <0x71>; 75 reg = <0x71>; 106 reset-gpios = <&lsio_gpio1 1 G 76 reset-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>; 107 77 108 i2c@0 { 78 i2c@0 { 109 #address-cells = <1>; 79 #address-cells = <1>; 110 #size-cells = <0>; 80 #size-cells = <0>; 111 reg = <0>; 81 reg = <0>; 112 82 113 max7322: gpio@68 { 83 max7322: gpio@68 { 114 compatible = " 84 compatible = "maxim,max7322"; 115 reg = <0x68>; 85 reg = <0x68>; 116 gpio-controlle 86 gpio-controller; 117 #gpio-cells = 87 #gpio-cells = <2>; 118 }; 88 }; 119 }; 89 }; 120 90 121 i2c@1 { 91 i2c@1 { 122 #address-cells = <1>; 92 #address-cells = <1>; 123 #size-cells = <0>; 93 #size-cells = <0>; 124 reg = <1>; 94 reg = <1>; 125 }; 95 }; 126 96 127 i2c@2 { 97 i2c@2 { 128 #address-cells = <1>; 98 #address-cells = <1>; 129 #size-cells = <0>; 99 #size-cells = <0>; 130 reg = <2>; 100 reg = <2>; 131 101 132 pressure-sensor@60 { 102 pressure-sensor@60 { 133 compatible = " 103 compatible = "fsl,mpl3115"; 134 reg = <0x60>; 104 reg = <0x60>; 135 }; 105 }; 136 }; 106 }; 137 107 138 i2c@3 { 108 i2c@3 { 139 #address-cells = <1>; 109 #address-cells = <1>; 140 #size-cells = <0>; 110 #size-cells = <0>; 141 reg = <3>; 111 reg = <3>; 142 112 143 pca9557_a: gpio@1a { 113 pca9557_a: gpio@1a { 144 compatible = " 114 compatible = "nxp,pca9557"; 145 reg = <0x1a>; 115 reg = <0x1a>; 146 gpio-controlle 116 gpio-controller; 147 #gpio-cells = 117 #gpio-cells = <2>; 148 }; 118 }; 149 119 150 pca9557_b: gpio@1d { 120 pca9557_b: gpio@1d { 151 compatible = " 121 compatible = "nxp,pca9557"; 152 reg = <0x1d>; 122 reg = <0x1d>; 153 gpio-controlle 123 gpio-controller; 154 #gpio-cells = 124 #gpio-cells = <2>; 155 }; 125 }; 156 126 157 light-sensor@44 { 127 light-sensor@44 { 158 pinctrl-names 128 pinctrl-names = "default"; 159 pinctrl-0 = <& 129 pinctrl-0 = <&pinctrl_isl29023>; 160 compatible = " 130 compatible = "isil,isl29023"; 161 reg = <0x44>; 131 reg = <0x44>; 162 interrupt-pare 132 interrupt-parent = <&lsio_gpio1>; 163 interrupts = < 133 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 164 }; 134 }; 165 }; 135 }; 166 }; 136 }; 167 << 168 ptn5110: tcpc@50 { << 169 compatible = "nxp,ptn5110", "t << 170 pinctrl-names = "default"; << 171 pinctrl-0 = <&pinctrl_typec>; << 172 reg = <0x50>; << 173 interrupt-parent = <&lsio_gpio << 174 interrupts = <3 IRQ_TYPE_LEVEL << 175 << 176 usb_con1: connector { << 177 compatible = "usb-c-co << 178 label = "USB-C"; << 179 power-role = "source"; << 180 data-role = "dual"; << 181 source-pdos = <PDO_FIX << 182 << 183 ports { << 184 #address-cells << 185 #size-cells = << 186 << 187 port@0 { << 188 reg = << 189 << 190 typec_ << 191 << 192 }; << 193 }; << 194 << 195 port@1 { << 196 reg = << 197 << 198 typec_ << 199 << 200 }; << 201 }; << 202 }; << 203 }; << 204 }; << 205 << 206 }; << 207 << 208 &cm40_i2c { << 209 #address-cells = <1>; << 210 #size-cells = <0>; << 211 clock-frequency = <100000>; << 212 pinctrl-names = "default", "gpio"; << 213 pinctrl-0 = <&pinctrl_cm40_i2c>; << 214 pinctrl-1 = <&pinctrl_cm40_i2c_gpio>; << 215 scl-gpios = <&lsio_gpio1 10 GPIO_ACTIV << 216 sda-gpios = <&lsio_gpio1 9 GPIO_ACTIVE << 217 status = "okay"; << 218 << 219 wm8960: audio-codec@1a { << 220 compatible = "wlf,wm8960"; << 221 reg = <0x1a>; << 222 clocks = <&mclkout0_lpcg IMX_L << 223 clock-names = "mclk"; << 224 assigned-clocks = <&clk IMX_SC << 225 <&clk IMX_SC << 226 <&clk IMX_SC << 227 <&mclkout0_l << 228 assigned-clock-rates = <786432 << 229 <491520 << 230 <122880 << 231 <122880 << 232 wlf,shared-lrclk; << 233 wlf,hp-cfg = <2 2 3>; << 234 wlf,gpio-cfg = <1 3>; << 235 }; << 236 << 237 pca6416: gpio@20 { << 238 compatible = "ti,tca6416"; << 239 reg = <0x20>; << 240 gpio-controller; << 241 #gpio-cells = <2>; << 242 }; << 243 }; << 244 << 245 &cm40_intmux { << 246 status = "okay"; << 247 }; << 248 << 249 &lpuart0 { << 250 pinctrl-names = "default"; << 251 pinctrl-0 = <&pinctrl_lpuart0>; << 252 status = "okay"; << 253 }; << 254 << 255 &lpuart2 { << 256 pinctrl-names = "default"; << 257 pinctrl-0 = <&pinctrl_lpuart2>; << 258 status = "okay"; << 259 }; << 260 << 261 &lpuart3 { << 262 pinctrl-names = "default"; << 263 pinctrl-0 = <&pinctrl_lpuart3>; << 264 status = "okay"; << 265 }; << 266 << 267 &mu_m0 { << 268 status = "okay"; << 269 }; << 270 << 271 &mu1_m0 { << 272 status = "okay"; << 273 }; << 274 << 275 &scu_key { << 276 status = "okay"; << 277 }; << 278 << 279 &sai0 { << 280 #sound-dai-cells = <0>; << 281 assigned-clocks = <&clk IMX_SC_R_AUDIO << 282 <&clk IMX_SC_R_AUDIO << 283 <&clk IMX_SC_R_AUDIO << 284 <&sai0_lpcg IMX_LPCG << 285 assigned-clock-rates = <786432000>, <4 << 286 pinctrl-names = "default"; << 287 pinctrl-0 = <&pinctrl_sai0>; << 288 status = "okay"; << 289 }; << 290 << 291 &sai1 { << 292 assigned-clocks = <&clk IMX_SC_R_AUDIO << 293 <&clk IMX_SC_R_AUDIO << 294 <&clk IMX_SC_R_AUDIO << 295 <&sai1_lpcg IMX_LPCG << 296 assigned-clock-rates = <786432000>, <4 << 297 pinctrl-names = "default"; << 298 pinctrl-0 = <&pinctrl_sai1>; << 299 status = "okay"; << 300 }; << 301 << 302 &sai4 { << 303 assigned-clocks = <&acm IMX_ADMA_ACM_S << 304 <&clk IMX_SC_R_AUDIO << 305 <&clk IMX_SC_R_AUDIO << 306 <&clk IMX_SC_R_AUDIO << 307 <&sai4_lpcg IMX_LPCG << 308 assigned-clock-parents = <&aud_pll_div << 309 assigned-clock-rates = <0>, <786432000 << 310 fsl,sai-asynchronous; << 311 status = "okay"; << 312 }; << 313 << 314 &sai5 { << 315 assigned-clocks = <&acm IMX_ADMA_ACM_S << 316 <&clk IMX_SC_R_AUDIO << 317 <&clk IMX_SC_R_AUDIO << 318 <&clk IMX_SC_R_AUDIO << 319 <&sai5_lpcg IMX_LPCG << 320 assigned-clock-parents = <&aud_pll_div << 321 assigned-clock-rates = <0>, <786432000 << 322 fsl,sai-asynchronous; << 323 status = "okay"; << 324 }; << 325 << 326 &thermal_zones { << 327 pmic-thermal { << 328 polling-delay-passive = <250>; << 329 polling-delay = <2000>; << 330 thermal-sensors = <&tsens IMX_ << 331 << 332 trips { << 333 pmic_alert0: trip0 { << 334 temperature = << 335 hysteresis = < << 336 type = "passiv << 337 }; << 338 << 339 pmic_crit0: trip1 { << 340 temperature = << 341 hysteresis = < << 342 type = "critic << 343 }; << 344 }; << 345 << 346 cooling-maps { << 347 map0 { << 348 trip = <&pmic_ << 349 cooling-device << 350 <&A35_ << 351 <&A35_ << 352 <&A35_ << 353 <&A35_ << 354 }; << 355 }; << 356 }; << 357 }; 137 }; 358 138 359 &usdhc1 { 139 &usdhc1 { 360 assigned-clocks = <&clk IMX_SC_R_SDHC_ << 361 assigned-clock-rates = <200000000>; << 362 pinctrl-names = "default"; 140 pinctrl-names = "default"; 363 pinctrl-0 = <&pinctrl_usdhc1>; 141 pinctrl-0 = <&pinctrl_usdhc1>; 364 bus-width = <8>; 142 bus-width = <8>; 365 no-sd; 143 no-sd; 366 no-sdio; 144 no-sdio; 367 non-removable; 145 non-removable; 368 status = "okay"; 146 status = "okay"; 369 }; 147 }; 370 148 371 &usdhc2 { 149 &usdhc2 { 372 assigned-clocks = <&clk IMX_SC_R_SDHC_ << 373 assigned-clock-rates = <200000000>; << 374 pinctrl-names = "default"; 150 pinctrl-names = "default"; 375 pinctrl-0 = <&pinctrl_usdhc2>; 151 pinctrl-0 = <&pinctrl_usdhc2>; 376 bus-width = <4>; 152 bus-width = <4>; 377 vmmc-supply = <&reg_usdhc2_vmmc>; 153 vmmc-supply = <&reg_usdhc2_vmmc>; 378 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE 154 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>; 379 wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE 155 wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>; 380 status = "okay"; 156 status = "okay"; 381 }; 157 }; 382 158 383 &usb3_phy { << 384 status = "okay"; << 385 }; << 386 << 387 &usbotg3 { << 388 status = "okay"; << 389 }; << 390 << 391 &usbotg3_cdns3 { << 392 dr_mode = "otg"; << 393 usb-role-switch; << 394 status = "okay"; << 395 << 396 port { << 397 usb3_drd_sw: endpoint { << 398 remote-endpoint = <&ty << 399 }; << 400 }; << 401 }; << 402 << 403 << 404 &vpu { << 405 compatible = "nxp,imx8qxp-vpu"; << 406 status = "okay"; << 407 }; << 408 << 409 &vpu_core0 { << 410 reg = <0x2d040000 0x10000>; << 411 memory-region = <&decoder_boot>, <&dec << 412 status = "okay"; << 413 }; << 414 << 415 &vpu_core1 { << 416 reg = <0x2d050000 0x10000>; << 417 memory-region = <&encoder_boot>, <&enc << 418 status = "okay"; << 419 }; << 420 << 421 &iomuxc { 159 &iomuxc { 422 << 423 pinctrl_cm40_i2c: cm40i2cgrp { << 424 fsl,pins = < << 425 IMX8QXP_ADC_IN1_M40_I2 << 426 IMX8QXP_ADC_IN0_M40_I2 << 427 >; << 428 }; << 429 << 430 pinctrl_cm40_i2c_gpio: cm40i2cgpio-grp << 431 fsl,pins = < << 432 IMX8QXP_ADC_IN1_LSIO_G << 433 IMX8QXP_ADC_IN0_LSIO_G << 434 >; << 435 }; << 436 << 437 pinctrl_fec1: fec1grp { 160 pinctrl_fec1: fec1grp { 438 fsl,pins = < 161 fsl,pins = < 439 IMX8QXP_ENET0_MDC_CONN 162 IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 440 IMX8QXP_ENET0_MDIO_CON 163 IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 441 IMX8QXP_ENET0_RGMII_TX 164 IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 442 IMX8QXP_ENET0_RGMII_TX 165 IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 443 IMX8QXP_ENET0_RGMII_TX 166 IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 444 IMX8QXP_ENET0_RGMII_TX 167 IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 445 IMX8QXP_ENET0_RGMII_TX 168 IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 446 IMX8QXP_ENET0_RGMII_TX 169 IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 447 IMX8QXP_ENET0_RGMII_RX 170 IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 448 IMX8QXP_ENET0_RGMII_RX 171 IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 449 IMX8QXP_ENET0_RGMII_RX 172 IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 450 IMX8QXP_ENET0_RGMII_RX 173 IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 451 IMX8QXP_ENET0_RGMII_RX 174 IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 452 IMX8QXP_ENET0_RGMII_RX 175 IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 453 >; 176 >; 454 }; 177 }; 455 178 456 pinctrl_ioexp_rst: ioexprstgrp { !! 179 pinctrl_ioexp_rst: ioexp_rst_grp { 457 fsl,pins = < 180 fsl,pins = < 458 IMX8QXP_SPI2_SDO_LSIO_ 181 IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021 459 >; 182 >; 460 }; 183 }; 461 184 462 pinctrl_isl29023: isl29023grp { 185 pinctrl_isl29023: isl29023grp { 463 fsl,pins = < 186 fsl,pins = < 464 IMX8QXP_SPI2_SDI_LSIO_ 187 IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02 0x00000021 465 >; 188 >; 466 }; 189 }; 467 190 468 pinctrl_lpi2c1: lpi2c1grp { 191 pinctrl_lpi2c1: lpi2c1grp { 469 fsl,pins = < 192 fsl,pins = < 470 IMX8QXP_USB_SS3_TC1_AD 193 IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000021 471 IMX8QXP_USB_SS3_TC3_AD 194 IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA 0x06000021 472 >; 195 >; 473 }; 196 }; 474 197 475 pinctrl_lpuart0: lpuart0grp { 198 pinctrl_lpuart0: lpuart0grp { 476 fsl,pins = < 199 fsl,pins = < 477 IMX8QXP_UART0_RX_ADMA_ 200 IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 478 IMX8QXP_UART0_TX_ADMA_ 201 IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 479 >; << 480 }; << 481 << 482 pinctrl_lpuart2: lpuart2grp { << 483 fsl,pins = < << 484 IMX8QXP_UART2_TX_ADMA_ << 485 IMX8QXP_UART2_RX_ADMA_ << 486 >; << 487 }; << 488 << 489 pinctrl_lpuart3: lpuart3grp { << 490 fsl,pins = < << 491 IMX8QXP_FLEXCAN2_TX_AD << 492 IMX8QXP_FLEXCAN2_RX_AD << 493 >; << 494 }; << 495 << 496 pinctrl_typec: typecgrp { << 497 fsl,pins = < << 498 IMX8QXP_SPI2_SCK_LSIO_ << 499 >; << 500 }; << 501 << 502 pinctrl_typec_mux: typecmuxgrp { << 503 fsl,pins = < << 504 IMX8QXP_ENET0_REFCLK_1 << 505 >; << 506 }; << 507 << 508 pinctrl_sai0: sai0grp { << 509 fsl,pins = < << 510 IMX8QXP_SAI0_TXD_ADMA_ << 511 IMX8QXP_SAI0_RXD_ADMA_ << 512 IMX8QXP_SAI0_TXC_ADMA_ << 513 IMX8QXP_SAI0_TXFS_ADMA << 514 >; << 515 }; << 516 << 517 pinctrl_sai1: sai1grp { << 518 fsl,pins = < << 519 IMX8QXP_SAI1_RXD_ADMA_ << 520 IMX8QXP_SAI1_RXC_ADMA_ << 521 IMX8QXP_SAI1_RXFS_ADMA << 522 IMX8QXP_SPI0_CS1_ADMA_ << 523 IMX8QXP_SPI2_CS0_LSIO_ << 524 >; 202 >; 525 }; 203 }; 526 204 527 pinctrl_usdhc1: usdhc1grp { 205 pinctrl_usdhc1: usdhc1grp { 528 fsl,pins = < 206 fsl,pins = < 529 IMX8QXP_EMMC0_CLK_CONN 207 IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 530 IMX8QXP_EMMC0_CMD_CONN 208 IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 531 IMX8QXP_EMMC0_DATA0_CO 209 IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 532 IMX8QXP_EMMC0_DATA1_CO 210 IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 533 IMX8QXP_EMMC0_DATA2_CO 211 IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 534 IMX8QXP_EMMC0_DATA3_CO 212 IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 535 IMX8QXP_EMMC0_DATA4_CO 213 IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 536 IMX8QXP_EMMC0_DATA5_CO 214 IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 537 IMX8QXP_EMMC0_DATA6_CO 215 IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 538 IMX8QXP_EMMC0_DATA7_CO 216 IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 539 IMX8QXP_EMMC0_STROBE_C 217 IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 540 >; 218 >; 541 }; 219 }; 542 220 543 pinctrl_usdhc2: usdhc2grp { 221 pinctrl_usdhc2: usdhc2grp { 544 fsl,pins = < 222 fsl,pins = < 545 IMX8QXP_USDHC1_CLK_CON 223 IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 546 IMX8QXP_USDHC1_CMD_CON 224 IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 547 IMX8QXP_USDHC1_DATA0_C 225 IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 548 IMX8QXP_USDHC1_DATA1_C 226 IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 549 IMX8QXP_USDHC1_DATA2_C 227 IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 550 IMX8QXP_USDHC1_DATA3_C 228 IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 551 IMX8QXP_USDHC1_VSELECT 229 IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 552 >; 230 >; 553 }; 231 }; 554 }; 232 };

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Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts

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TOMOYO Linux Cross Reference Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts

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Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts (Version linux-5.3.18)

TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts