Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 2 /* 3 * Copyright 2017~2018 NXP 3 * Copyright 2017~2018 NXP 4 */ 4 */ 5 5 6 /dts-v1/; 6 /dts-v1/; 7 7 8 #include "imx8qxp.dtsi" 8 #include "imx8qxp.dtsi" 9 #include <dt-bindings/usb/pd.h> << 10 9 11 / { 10 / { 12 model = "Freescale i.MX8QXP MEK"; 11 model = "Freescale i.MX8QXP MEK"; 13 compatible = "fsl,imx8qxp-mek", "fsl,i 12 compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp"; 14 13 15 chosen { 14 chosen { 16 stdout-path = &lpuart0; 15 stdout-path = &lpuart0; 17 }; 16 }; 18 17 19 memory@80000000 { 18 memory@80000000 { 20 device_type = "memory"; 19 device_type = "memory"; 21 reg = <0x00000000 0x80000000 0 20 reg = <0x00000000 0x80000000 0 0x40000000>; 22 }; 21 }; 23 22 24 reg_usdhc2_vmmc: usdhc2-vmmc { 23 reg_usdhc2_vmmc: usdhc2-vmmc { 25 compatible = "regulator-fixed" 24 compatible = "regulator-fixed"; 26 regulator-name = "SD1_SPWR"; 25 regulator-name = "SD1_SPWR"; 27 regulator-min-microvolt = <300 26 regulator-min-microvolt = <3000000>; 28 regulator-max-microvolt = <300 27 regulator-max-microvolt = <3000000>; 29 gpio = <&lsio_gpio4 19 GPIO_AC 28 gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; 30 enable-active-high; 29 enable-active-high; 31 }; 30 }; 32 << 33 gpio-sbu-mux { << 34 compatible = "nxp,cbdtu02043", << 35 pinctrl-names = "default"; << 36 pinctrl-0 = <&pinctrl_typec_mu << 37 select-gpios = <&lsio_gpio5 9 << 38 enable-gpios = <&pca9557_a 7 G << 39 orientation-switch; << 40 << 41 port { << 42 usb3_data_ss: endpoint << 43 remote-endpoin << 44 }; << 45 }; << 46 }; << 47 << 48 sound-wm8960 { << 49 compatible = "fsl,imx-audio-wm << 50 model = "wm8960-audio"; << 51 audio-cpu = <&sai1>; << 52 audio-codec = <&wm8960>; << 53 hp-det-gpio = <&lsio_gpio1 0 G << 54 audio-routing = "Headphone Jac << 55 "Headphone Jac << 56 "Ext Spk", "SP << 57 "Ext Spk", "SP << 58 "Ext Spk", "SP << 59 "Ext Spk", "SP << 60 "LINPUT1", "Mi << 61 "Mic Jack", "M << 62 }; << 63 }; 31 }; 64 32 65 &dsp { 33 &dsp { 66 memory-region = <&dsp_reserved>; << 67 status = "okay"; << 68 }; << 69 << 70 &dsp_reserved { << 71 status = "okay"; 34 status = "okay"; 72 }; 35 }; 73 36 74 &fec1 { 37 &fec1 { 75 pinctrl-names = "default"; 38 pinctrl-names = "default"; 76 pinctrl-0 = <&pinctrl_fec1>; 39 pinctrl-0 = <&pinctrl_fec1>; 77 phy-mode = "rgmii-id"; 40 phy-mode = "rgmii-id"; 78 phy-handle = <&ethphy0>; 41 phy-handle = <&ethphy0>; 79 fsl,magic-packet; 42 fsl,magic-packet; 80 status = "okay"; 43 status = "okay"; 81 44 82 mdio { 45 mdio { 83 #address-cells = <1>; 46 #address-cells = <1>; 84 #size-cells = <0>; 47 #size-cells = <0>; 85 48 86 ethphy0: ethernet-phy@0 { 49 ethphy0: ethernet-phy@0 { 87 compatible = "ethernet 50 compatible = "ethernet-phy-ieee802.3-c22"; 88 reg = <0>; 51 reg = <0>; 89 }; 52 }; 90 }; 53 }; 91 }; 54 }; 92 55 93 &i2c1 { 56 &i2c1 { 94 #address-cells = <1>; 57 #address-cells = <1>; 95 #size-cells = <0>; 58 #size-cells = <0>; 96 clock-frequency = <100000>; 59 clock-frequency = <100000>; 97 pinctrl-names = "default"; 60 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ 61 pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>; 99 status = "okay"; 62 status = "okay"; 100 63 101 i2c-mux@71 { 64 i2c-mux@71 { 102 compatible = "nxp,pca9646", "n 65 compatible = "nxp,pca9646", "nxp,pca9546"; 103 #address-cells = <1>; 66 #address-cells = <1>; 104 #size-cells = <0>; 67 #size-cells = <0>; 105 reg = <0x71>; 68 reg = <0x71>; 106 reset-gpios = <&lsio_gpio1 1 G 69 reset-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>; 107 70 108 i2c@0 { 71 i2c@0 { 109 #address-cells = <1>; 72 #address-cells = <1>; 110 #size-cells = <0>; 73 #size-cells = <0>; 111 reg = <0>; 74 reg = <0>; 112 75 113 max7322: gpio@68 { 76 max7322: gpio@68 { 114 compatible = " 77 compatible = "maxim,max7322"; 115 reg = <0x68>; 78 reg = <0x68>; 116 gpio-controlle 79 gpio-controller; 117 #gpio-cells = 80 #gpio-cells = <2>; 118 }; 81 }; 119 }; 82 }; 120 83 121 i2c@1 { 84 i2c@1 { 122 #address-cells = <1>; 85 #address-cells = <1>; 123 #size-cells = <0>; 86 #size-cells = <0>; 124 reg = <1>; 87 reg = <1>; 125 }; 88 }; 126 89 127 i2c@2 { 90 i2c@2 { 128 #address-cells = <1>; 91 #address-cells = <1>; 129 #size-cells = <0>; 92 #size-cells = <0>; 130 reg = <2>; 93 reg = <2>; 131 94 132 pressure-sensor@60 { 95 pressure-sensor@60 { 133 compatible = " 96 compatible = "fsl,mpl3115"; 134 reg = <0x60>; 97 reg = <0x60>; 135 }; 98 }; 136 }; 99 }; 137 100 138 i2c@3 { 101 i2c@3 { 139 #address-cells = <1>; 102 #address-cells = <1>; 140 #size-cells = <0>; 103 #size-cells = <0>; 141 reg = <3>; 104 reg = <3>; 142 105 143 pca9557_a: gpio@1a { 106 pca9557_a: gpio@1a { 144 compatible = " 107 compatible = "nxp,pca9557"; 145 reg = <0x1a>; 108 reg = <0x1a>; 146 gpio-controlle 109 gpio-controller; 147 #gpio-cells = 110 #gpio-cells = <2>; 148 }; 111 }; 149 112 150 pca9557_b: gpio@1d { 113 pca9557_b: gpio@1d { 151 compatible = " 114 compatible = "nxp,pca9557"; 152 reg = <0x1d>; 115 reg = <0x1d>; 153 gpio-controlle 116 gpio-controller; 154 #gpio-cells = 117 #gpio-cells = <2>; 155 }; 118 }; 156 119 157 light-sensor@44 { 120 light-sensor@44 { 158 pinctrl-names 121 pinctrl-names = "default"; 159 pinctrl-0 = <& 122 pinctrl-0 = <&pinctrl_isl29023>; 160 compatible = " 123 compatible = "isil,isl29023"; 161 reg = <0x44>; 124 reg = <0x44>; 162 interrupt-pare 125 interrupt-parent = <&lsio_gpio1>; 163 interrupts = < 126 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 164 }; 127 }; 165 }; 128 }; 166 }; 129 }; 167 << 168 ptn5110: tcpc@50 { << 169 compatible = "nxp,ptn5110", "t << 170 pinctrl-names = "default"; << 171 pinctrl-0 = <&pinctrl_typec>; << 172 reg = <0x50>; << 173 interrupt-parent = <&lsio_gpio << 174 interrupts = <3 IRQ_TYPE_LEVEL << 175 << 176 usb_con1: connector { << 177 compatible = "usb-c-co << 178 label = "USB-C"; << 179 power-role = "source"; << 180 data-role = "dual"; << 181 source-pdos = <PDO_FIX << 182 << 183 ports { << 184 #address-cells << 185 #size-cells = << 186 << 187 port@0 { << 188 reg = << 189 << 190 typec_ << 191 << 192 }; << 193 }; << 194 << 195 port@1 { << 196 reg = << 197 << 198 typec_ << 199 << 200 }; << 201 }; << 202 }; << 203 }; << 204 }; << 205 << 206 }; << 207 << 208 &cm40_i2c { << 209 #address-cells = <1>; << 210 #size-cells = <0>; << 211 clock-frequency = <100000>; << 212 pinctrl-names = "default", "gpio"; << 213 pinctrl-0 = <&pinctrl_cm40_i2c>; << 214 pinctrl-1 = <&pinctrl_cm40_i2c_gpio>; << 215 scl-gpios = <&lsio_gpio1 10 GPIO_ACTIV << 216 sda-gpios = <&lsio_gpio1 9 GPIO_ACTIVE << 217 status = "okay"; << 218 << 219 wm8960: audio-codec@1a { << 220 compatible = "wlf,wm8960"; << 221 reg = <0x1a>; << 222 clocks = <&mclkout0_lpcg IMX_L << 223 clock-names = "mclk"; << 224 assigned-clocks = <&clk IMX_SC << 225 <&clk IMX_SC << 226 <&clk IMX_SC << 227 <&mclkout0_l << 228 assigned-clock-rates = <786432 << 229 <491520 << 230 <122880 << 231 <122880 << 232 wlf,shared-lrclk; << 233 wlf,hp-cfg = <2 2 3>; << 234 wlf,gpio-cfg = <1 3>; << 235 }; << 236 << 237 pca6416: gpio@20 { << 238 compatible = "ti,tca6416"; << 239 reg = <0x20>; << 240 gpio-controller; << 241 #gpio-cells = <2>; << 242 }; << 243 }; << 244 << 245 &cm40_intmux { << 246 status = "okay"; << 247 }; 130 }; 248 131 249 &lpuart0 { 132 &lpuart0 { 250 pinctrl-names = "default"; 133 pinctrl-names = "default"; 251 pinctrl-0 = <&pinctrl_lpuart0>; 134 pinctrl-0 = <&pinctrl_lpuart0>; 252 status = "okay"; 135 status = "okay"; 253 }; 136 }; 254 137 255 &lpuart2 { << 256 pinctrl-names = "default"; << 257 pinctrl-0 = <&pinctrl_lpuart2>; << 258 status = "okay"; << 259 }; << 260 << 261 &lpuart3 { << 262 pinctrl-names = "default"; << 263 pinctrl-0 = <&pinctrl_lpuart3>; << 264 status = "okay"; << 265 }; << 266 << 267 &mu_m0 { 138 &mu_m0 { 268 status = "okay"; 139 status = "okay"; 269 }; 140 }; 270 141 271 &mu1_m0 { 142 &mu1_m0 { 272 status = "okay"; 143 status = "okay"; 273 }; 144 }; 274 145 275 &scu_key { 146 &scu_key { 276 status = "okay"; 147 status = "okay"; 277 }; 148 }; 278 149 279 &sai0 { << 280 #sound-dai-cells = <0>; << 281 assigned-clocks = <&clk IMX_SC_R_AUDIO << 282 <&clk IMX_SC_R_AUDIO << 283 <&clk IMX_SC_R_AUDIO << 284 <&sai0_lpcg IMX_LPCG << 285 assigned-clock-rates = <786432000>, <4 << 286 pinctrl-names = "default"; << 287 pinctrl-0 = <&pinctrl_sai0>; << 288 status = "okay"; << 289 }; << 290 << 291 &sai1 { << 292 assigned-clocks = <&clk IMX_SC_R_AUDIO << 293 <&clk IMX_SC_R_AUDIO << 294 <&clk IMX_SC_R_AUDIO << 295 <&sai1_lpcg IMX_LPCG << 296 assigned-clock-rates = <786432000>, <4 << 297 pinctrl-names = "default"; << 298 pinctrl-0 = <&pinctrl_sai1>; << 299 status = "okay"; << 300 }; << 301 << 302 &sai4 { << 303 assigned-clocks = <&acm IMX_ADMA_ACM_S << 304 <&clk IMX_SC_R_AUDIO << 305 <&clk IMX_SC_R_AUDIO << 306 <&clk IMX_SC_R_AUDIO << 307 <&sai4_lpcg IMX_LPCG << 308 assigned-clock-parents = <&aud_pll_div << 309 assigned-clock-rates = <0>, <786432000 << 310 fsl,sai-asynchronous; << 311 status = "okay"; << 312 }; << 313 << 314 &sai5 { << 315 assigned-clocks = <&acm IMX_ADMA_ACM_S << 316 <&clk IMX_SC_R_AUDIO << 317 <&clk IMX_SC_R_AUDIO << 318 <&clk IMX_SC_R_AUDIO << 319 <&sai5_lpcg IMX_LPCG << 320 assigned-clock-parents = <&aud_pll_div << 321 assigned-clock-rates = <0>, <786432000 << 322 fsl,sai-asynchronous; << 323 status = "okay"; << 324 }; << 325 << 326 &thermal_zones { 150 &thermal_zones { 327 pmic-thermal { !! 151 pmic-thermal0 { 328 polling-delay-passive = <250>; 152 polling-delay-passive = <250>; 329 polling-delay = <2000>; 153 polling-delay = <2000>; 330 thermal-sensors = <&tsens IMX_ 154 thermal-sensors = <&tsens IMX_SC_R_PMIC_0>; 331 155 332 trips { 156 trips { 333 pmic_alert0: trip0 { 157 pmic_alert0: trip0 { 334 temperature = 158 temperature = <110000>; 335 hysteresis = < 159 hysteresis = <2000>; 336 type = "passiv 160 type = "passive"; 337 }; 161 }; 338 162 339 pmic_crit0: trip1 { 163 pmic_crit0: trip1 { 340 temperature = 164 temperature = <125000>; 341 hysteresis = < 165 hysteresis = <2000>; 342 type = "critic 166 type = "critical"; 343 }; 167 }; 344 }; 168 }; 345 169 346 cooling-maps { 170 cooling-maps { 347 map0 { 171 map0 { 348 trip = <&pmic_ 172 trip = <&pmic_alert0>; 349 cooling-device 173 cooling-device = 350 <&A35_ 174 <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 351 <&A35_ 175 <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 352 <&A35_ 176 <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 353 <&A35_ 177 <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 354 }; 178 }; 355 }; 179 }; 356 }; 180 }; 357 }; 181 }; 358 182 359 &usdhc1 { 183 &usdhc1 { 360 assigned-clocks = <&clk IMX_SC_R_SDHC_ 184 assigned-clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>; 361 assigned-clock-rates = <200000000>; 185 assigned-clock-rates = <200000000>; 362 pinctrl-names = "default"; 186 pinctrl-names = "default"; 363 pinctrl-0 = <&pinctrl_usdhc1>; 187 pinctrl-0 = <&pinctrl_usdhc1>; 364 bus-width = <8>; 188 bus-width = <8>; 365 no-sd; 189 no-sd; 366 no-sdio; 190 no-sdio; 367 non-removable; 191 non-removable; 368 status = "okay"; 192 status = "okay"; 369 }; 193 }; 370 194 371 &usdhc2 { 195 &usdhc2 { 372 assigned-clocks = <&clk IMX_SC_R_SDHC_ 196 assigned-clocks = <&clk IMX_SC_R_SDHC_1 IMX_SC_PM_CLK_PER>; 373 assigned-clock-rates = <200000000>; 197 assigned-clock-rates = <200000000>; 374 pinctrl-names = "default"; 198 pinctrl-names = "default"; 375 pinctrl-0 = <&pinctrl_usdhc2>; 199 pinctrl-0 = <&pinctrl_usdhc2>; 376 bus-width = <4>; 200 bus-width = <4>; 377 vmmc-supply = <&reg_usdhc2_vmmc>; 201 vmmc-supply = <&reg_usdhc2_vmmc>; 378 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE 202 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>; 379 wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE 203 wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>; 380 status = "okay"; 204 status = "okay"; 381 }; 205 }; 382 206 383 &usb3_phy { << 384 status = "okay"; << 385 }; << 386 << 387 &usbotg3 { << 388 status = "okay"; << 389 }; << 390 << 391 &usbotg3_cdns3 { << 392 dr_mode = "otg"; << 393 usb-role-switch; << 394 status = "okay"; << 395 << 396 port { << 397 usb3_drd_sw: endpoint { << 398 remote-endpoint = <&ty << 399 }; << 400 }; << 401 }; << 402 << 403 << 404 &vpu { 207 &vpu { 405 compatible = "nxp,imx8qxp-vpu"; 208 compatible = "nxp,imx8qxp-vpu"; 406 status = "okay"; 209 status = "okay"; 407 }; 210 }; 408 211 409 &vpu_core0 { 212 &vpu_core0 { 410 reg = <0x2d040000 0x10000>; 213 reg = <0x2d040000 0x10000>; 411 memory-region = <&decoder_boot>, <&dec 214 memory-region = <&decoder_boot>, <&decoder_rpc>; 412 status = "okay"; 215 status = "okay"; 413 }; 216 }; 414 217 415 &vpu_core1 { 218 &vpu_core1 { 416 reg = <0x2d050000 0x10000>; 219 reg = <0x2d050000 0x10000>; 417 memory-region = <&encoder_boot>, <&enc 220 memory-region = <&encoder_boot>, <&encoder_rpc>; 418 status = "okay"; 221 status = "okay"; 419 }; 222 }; 420 223 421 &iomuxc { 224 &iomuxc { 422 << 423 pinctrl_cm40_i2c: cm40i2cgrp { << 424 fsl,pins = < << 425 IMX8QXP_ADC_IN1_M40_I2 << 426 IMX8QXP_ADC_IN0_M40_I2 << 427 >; << 428 }; << 429 << 430 pinctrl_cm40_i2c_gpio: cm40i2cgpio-grp << 431 fsl,pins = < << 432 IMX8QXP_ADC_IN1_LSIO_G << 433 IMX8QXP_ADC_IN0_LSIO_G << 434 >; << 435 }; << 436 << 437 pinctrl_fec1: fec1grp { 225 pinctrl_fec1: fec1grp { 438 fsl,pins = < 226 fsl,pins = < 439 IMX8QXP_ENET0_MDC_CONN 227 IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 440 IMX8QXP_ENET0_MDIO_CON 228 IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 441 IMX8QXP_ENET0_RGMII_TX 229 IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 442 IMX8QXP_ENET0_RGMII_TX 230 IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 443 IMX8QXP_ENET0_RGMII_TX 231 IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 444 IMX8QXP_ENET0_RGMII_TX 232 IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 445 IMX8QXP_ENET0_RGMII_TX 233 IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 446 IMX8QXP_ENET0_RGMII_TX 234 IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 447 IMX8QXP_ENET0_RGMII_RX 235 IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 448 IMX8QXP_ENET0_RGMII_RX 236 IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 449 IMX8QXP_ENET0_RGMII_RX 237 IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 450 IMX8QXP_ENET0_RGMII_RX 238 IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 451 IMX8QXP_ENET0_RGMII_RX 239 IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 452 IMX8QXP_ENET0_RGMII_RX 240 IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 453 >; 241 >; 454 }; 242 }; 455 243 456 pinctrl_ioexp_rst: ioexprstgrp { 244 pinctrl_ioexp_rst: ioexprstgrp { 457 fsl,pins = < 245 fsl,pins = < 458 IMX8QXP_SPI2_SDO_LSIO_ 246 IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021 459 >; 247 >; 460 }; 248 }; 461 249 462 pinctrl_isl29023: isl29023grp { 250 pinctrl_isl29023: isl29023grp { 463 fsl,pins = < 251 fsl,pins = < 464 IMX8QXP_SPI2_SDI_LSIO_ 252 IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02 0x00000021 465 >; 253 >; 466 }; 254 }; 467 255 468 pinctrl_lpi2c1: lpi2c1grp { 256 pinctrl_lpi2c1: lpi2c1grp { 469 fsl,pins = < 257 fsl,pins = < 470 IMX8QXP_USB_SS3_TC1_AD 258 IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000021 471 IMX8QXP_USB_SS3_TC3_AD 259 IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA 0x06000021 472 >; 260 >; 473 }; 261 }; 474 262 475 pinctrl_lpuart0: lpuart0grp { 263 pinctrl_lpuart0: lpuart0grp { 476 fsl,pins = < 264 fsl,pins = < 477 IMX8QXP_UART0_RX_ADMA_ 265 IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 478 IMX8QXP_UART0_TX_ADMA_ 266 IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 479 >; << 480 }; << 481 << 482 pinctrl_lpuart2: lpuart2grp { << 483 fsl,pins = < << 484 IMX8QXP_UART2_TX_ADMA_ << 485 IMX8QXP_UART2_RX_ADMA_ << 486 >; << 487 }; << 488 << 489 pinctrl_lpuart3: lpuart3grp { << 490 fsl,pins = < << 491 IMX8QXP_FLEXCAN2_TX_AD << 492 IMX8QXP_FLEXCAN2_RX_AD << 493 >; << 494 }; << 495 << 496 pinctrl_typec: typecgrp { << 497 fsl,pins = < << 498 IMX8QXP_SPI2_SCK_LSIO_ << 499 >; << 500 }; << 501 << 502 pinctrl_typec_mux: typecmuxgrp { << 503 fsl,pins = < << 504 IMX8QXP_ENET0_REFCLK_1 << 505 >; << 506 }; << 507 << 508 pinctrl_sai0: sai0grp { << 509 fsl,pins = < << 510 IMX8QXP_SAI0_TXD_ADMA_ << 511 IMX8QXP_SAI0_RXD_ADMA_ << 512 IMX8QXP_SAI0_TXC_ADMA_ << 513 IMX8QXP_SAI0_TXFS_ADMA << 514 >; << 515 }; << 516 << 517 pinctrl_sai1: sai1grp { << 518 fsl,pins = < << 519 IMX8QXP_SAI1_RXD_ADMA_ << 520 IMX8QXP_SAI1_RXC_ADMA_ << 521 IMX8QXP_SAI1_RXFS_ADMA << 522 IMX8QXP_SPI0_CS1_ADMA_ << 523 IMX8QXP_SPI2_CS0_LSIO_ << 524 >; 267 >; 525 }; 268 }; 526 269 527 pinctrl_usdhc1: usdhc1grp { 270 pinctrl_usdhc1: usdhc1grp { 528 fsl,pins = < 271 fsl,pins = < 529 IMX8QXP_EMMC0_CLK_CONN 272 IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 530 IMX8QXP_EMMC0_CMD_CONN 273 IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 531 IMX8QXP_EMMC0_DATA0_CO 274 IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 532 IMX8QXP_EMMC0_DATA1_CO 275 IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 533 IMX8QXP_EMMC0_DATA2_CO 276 IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 534 IMX8QXP_EMMC0_DATA3_CO 277 IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 535 IMX8QXP_EMMC0_DATA4_CO 278 IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 536 IMX8QXP_EMMC0_DATA5_CO 279 IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 537 IMX8QXP_EMMC0_DATA6_CO 280 IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 538 IMX8QXP_EMMC0_DATA7_CO 281 IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 539 IMX8QXP_EMMC0_STROBE_C 282 IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 540 >; 283 >; 541 }; 284 }; 542 285 543 pinctrl_usdhc2: usdhc2grp { 286 pinctrl_usdhc2: usdhc2grp { 544 fsl,pins = < 287 fsl,pins = < 545 IMX8QXP_USDHC1_CLK_CON 288 IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 546 IMX8QXP_USDHC1_CMD_CON 289 IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 547 IMX8QXP_USDHC1_DATA0_C 290 IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 548 IMX8QXP_USDHC1_DATA1_C 291 IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 549 IMX8QXP_USDHC1_DATA2_C 292 IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 550 IMX8QXP_USDHC1_DATA3_C 293 IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 551 IMX8QXP_USDHC1_VSELECT 294 IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 552 >; 295 >; 553 }; 296 }; 554 }; 297 };

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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts

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Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts (Version linux-6.1.116)

TOMOYO Linux Cross Reference Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts

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Differences between /scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts (Version linux-6.1.116)

TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8qxp-mek.dts