1 // SPDX-License-Identifier: GPL-2.0-or-later O
2 /*
3 * Copyright 2019 Toradex
4 */
5
6 / {
7 chosen {
8 stdout-path = &lpuart3;
9 };
10
11 colibri_gpio_keys: gpio-keys {
12 compatible = "gpio-keys";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpiokeys
15 status = "disabled";
16
17 key-wakeup {
18 debounce-interval = <1
19 gpios = <&lsio_gpio3 1
20 label = "Wake-Up";
21 linux,code = <KEY_WAKE
22 wakeup-source;
23 };
24 };
25
26 extcon_usbc_det: usbc-det {
27 compatible = "linux,extcon-usb
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_usbc_det
30 id-gpios = <&lsio_gpio5 9 GPIO
31 status = "disabled";
32 };
33
34 reg_module_3v3: regulator-module-3v3 {
35 compatible = "regulator-fixed"
36 regulator-name = "+V3.3";
37 regulator-min-microvolt = <330
38 regulator-max-microvolt = <330
39 };
40
41 reg_module_3v3_avdd: regulator-module-
42 compatible = "regulator-fixed"
43 regulator-max-microvolt = <330
44 regulator-min-microvolt = <330
45 regulator-name = "+V3.3_AVDD_A
46 };
47
48 reg_module_vref_1v8: regulator-module-
49 compatible = "regulator-fixed"
50 regulator-max-microvolt = <180
51 regulator-min-microvolt = <180
52 regulator-name = "vref-1v8";
53 };
54
55 reg_usbh_vbus: regulator-usbh-vbus {
56 compatible = "regulator-fixed"
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_usbh1_re
59 gpio = <&lsio_gpio4 3 GPIO_ACT
60 regulator-always-on;
61 regulator-max-microvolt = <500
62 regulator-min-microvolt = <500
63 regulator-name = "usbh_vbus";
64 };
65
66 sound-card {
67 compatible = "simple-audio-car
68 simple-audio-card,bitclock-mas
69 simple-audio-card,format = "i2
70 simple-audio-card,frame-master
71 simple-audio-card,name = "coli
72
73 dailink_master: simple-audio-c
74 clocks = <&mclkout0_lp
75 sound-dai = <&sgtl5000
76 };
77
78 simple-audio-card,cpu {
79 sound-dai = <&sai0>;
80 };
81 };
82 };
83
84 /* Colibri Analogue Inputs */
85 &adc0 {
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_adc0>;
88 vref-supply = <®_module_vref_1v8>;
89 };
90
91 /* Colibri PWM_A */
92 &adma_pwm {
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_pwm_a>;
95 };
96
97 &cpu_alert0 {
98 hysteresis = <2000>;
99 temperature = <90000>;
100 type = "passive";
101 };
102
103 &cpu_crit0 {
104 hysteresis = <2000>;
105 temperature = <105000>;
106 type = "critical";
107 };
108
109 &enet0_lpcg {
110 clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_
111 <&clk IMX_SC_R_ENET_0 IMX_SC_
112 <&conn_axi_clk>,
113 <&clk IMX_SC_R_ENET_0 IMX_SC_
114 <&conn_ipg_clk>,
115 <&conn_ipg_clk>;
116 clock-output-names = "enet0_lpcg_timer
117 "enet0_lpcg_txc_s
118 "enet0_lpcg_ahb_c
119 "enet0_lpcg_ref_5
120 "enet0_lpcg_ipg_c
121 "enet0_lpcg_ipg_s
122 };
123
124 /* On-module I2C */
125 &i2c0 {
126 #address-cells = <1>;
127 #size-cells = <0>;
128 clock-frequency = <100000>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl
131 status = "okay";
132
133 /* USB HUB USB3803 */
134 usb-hub@8 {
135 compatible = "smsc,usb3803";
136 reg = <0x8>;
137 assigned-clocks = <&clk IMX_SC
138 <&clk IMX_SC
139 <&clk IMX_SC
140 <&mclkout0_l
141 assigned-clock-rates = <786432
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_usb3503a
144 bypass-gpios = <&gpio_expander
145 clocks = <&mclkout0_lpcg IMX_L
146 clock-names = "refclk";
147 disabled-ports = <2>;
148 initial-mode = <1>;
149 intn-gpios = <&lsio_gpio3 4 GP
150 reset-gpios = <&gpio_expander_
151 };
152
153 sgtl5000_a: audio-codec@a {
154 compatible = "fsl,sgtl5000";
155 reg = <0xa>;
156 #sound-dai-cells = <0>;
157 assigned-clocks = <&clk IMX_SC
158 <&clk IMX_SC
159 <&clk IMX_SC
160 <&mclkout0_l
161 assigned-clock-rates = <786432
162 clocks = <&mclkout0_lpcg IMX_L
163 VDDA-supply = <®_module_3v3
164 VDDD-supply = <®_module_vre
165 VDDIO-supply = <®_module_3v
166 };
167
168 /* Touch controller */
169 touchscreen@2c {
170 compatible = "adi,ad7879-1";
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_ad7879_i
173 reg = <0x2c>;
174 interrupt-parent = <&lsio_gpio
175 interrupts = <5 IRQ_TYPE_EDGE_
176 touchscreen-max-pressure = <40
177 adi,resistance-plate-x = <120>
178 adi,first-conversion-delay = /
179 adi,acquisition-time = /bits/
180 adi,median-filter-size = /bits
181 adi,averaging = /bits/ 8 <1>;
182 adi,conversion-interval = /bit
183 status = "disabled";
184 };
185
186 gpio_expander_43: gpio@43 {
187 compatible = "fcs,fxl6408";
188 reg = <0x43>;
189 gpio-controller;
190 #gpio-cells = <2>;
191 gpio-line-names = "Wi-Fi_W_DIS
192 "Wi-Fi_WKUP_
193 "PWR_EN_+V3.
194 "PCIe_REF_CL
195 "USB_RESET_N
196 "USB_BYPASS_
197 "Wi-Fi_PDn",
198 "Wi-Fi_WKUP_
199 };
200 };
201
202 /* TODO i2c lvds0 accessible on FFC (X2) */
203
204 /* TODO i2c lvds1 accessible on FFC (X3) */
205
206 /* Colibri I2C */
207 &i2c1 {
208 #address-cells = <1>;
209 #size-cells = <0>;
210 clock-frequency = <100000>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_i2c1>;
213 };
214
215 &jpegdec {
216 status = "okay";
217 };
218
219 &jpegenc {
220 status = "okay";
221 };
222
223 /* TODO Parallel RRB */
224
225 /* Colibri UART_B */
226 &lpuart0 {
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_lpuart0>;
229 };
230
231 /* Colibri UART_C */
232 &lpuart2 {
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_lpuart2>;
235 };
236
237 /* Colibri UART_A */
238 &lpuart3 {
239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_lpuart3>, <&pinc
241 };
242
243 /* Colibri FastEthernet */
244 &fec1 {
245 pinctrl-names = "default", "sleep";
246 pinctrl-0 = <&pinctrl_fec1>;
247 pinctrl-1 = <&pinctrl_fec1_sleep>;
248 phy-mode = "rmii";
249 phy-handle = <ðphy0>;
250 fsl,magic-packet;
251
252 mdio {
253 #address-cells = <1>;
254 #size-cells = <0>;
255
256 ethphy0: ethernet-phy@2 {
257 compatible = "ethernet
258 max-speed = <100>;
259 reg = <2>;
260 };
261 };
262 };
263
264 /* Colibri SPI */
265 &lpspi2 {
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_lpspi2>;
268 cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_
269 };
270
271 &lsio_gpio0 {
272 gpio-line-names = "",
273 "SODIMM_70",
274 "SODIMM_60",
275 "SODIMM_58",
276 "SODIMM_78",
277 "SODIMM_72",
278 "SODIMM_80",
279 "SODIMM_46",
280 "SODIMM_62",
281 "SODIMM_48",
282 "SODIMM_74",
283 "SODIMM_50",
284 "SODIMM_52",
285 "SODIMM_54",
286 "SODIMM_66",
287 "SODIMM_64",
288 "SODIMM_68",
289 "",
290 "",
291 "SODIMM_82",
292 "SODIMM_56",
293 "SODIMM_28",
294 "SODIMM_30",
295 "",
296 "SODIMM_61",
297 "SODIMM_103",
298 "",
299 "",
300 "",
301 "SODIMM_25",
302 "SODIMM_27",
303 "SODIMM_100";
304 };
305
306 &lsio_gpio1 {
307 gpio-line-names = "SODIMM_86",
308 "SODIMM_92",
309 "SODIMM_90",
310 "SODIMM_88",
311 "",
312 "",
313 "",
314 "SODIMM_59",
315 "",
316 "SODIMM_6",
317 "SODIMM_8",
318 "",
319 "",
320 "SODIMM_2",
321 "SODIMM_4",
322 "SODIMM_34",
323 "SODIMM_32",
324 "SODIMM_63",
325 "SODIMM_55",
326 "SODIMM_33",
327 "SODIMM_35",
328 "SODIMM_36",
329 "SODIMM_38",
330 "SODIMM_21",
331 "SODIMM_19",
332 "SODIMM_140",
333 "SODIMM_142",
334 "SODIMM_196",
335 "SODIMM_194",
336 "SODIMM_186",
337 "SODIMM_188",
338 "SODIMM_138";
339 };
340
341 &lsio_gpio2 {
342 gpio-line-names = "SODIMM_23",
343 "",
344 "",
345 "SODIMM_144";
346 };
347
348 &lsio_gpio3 {
349 gpio-line-names = "SODIMM_96",
350 "SODIMM_75",
351 "SODIMM_37",
352 "SODIMM_29",
353 "",
354 "",
355 "",
356 "",
357 "",
358 "SODIMM_43",
359 "SODIMM_45",
360 "SODIMM_69",
361 "SODIMM_71",
362 "SODIMM_73",
363 "SODIMM_77",
364 "SODIMM_89",
365 "SODIMM_93",
366 "SODIMM_95",
367 "SODIMM_99",
368 "SODIMM_105",
369 "SODIMM_107",
370 "SODIMM_98",
371 "SODIMM_102",
372 "SODIMM_104",
373 "SODIMM_106";
374 };
375
376 &lsio_gpio4 {
377 gpio-line-names = "",
378 "",
379 "",
380 "SODIMM_129",
381 "SODIMM_133",
382 "SODIMM_127",
383 "SODIMM_131",
384 "",
385 "",
386 "",
387 "",
388 "",
389 "",
390 "",
391 "",
392 "",
393 "",
394 "",
395 "",
396 "SODIMM_44",
397 "",
398 "SODIMM_76",
399 "SODIMM_31",
400 "SODIMM_47",
401 "SODIMM_190",
402 "SODIMM_192",
403 "SODIMM_49",
404 "SODIMM_51",
405 "SODIMM_53";
406 };
407
408 &lsio_gpio5 {
409 gpio-line-names = "",
410 "SODIMM_57",
411 "SODIMM_65",
412 "SODIMM_85",
413 "",
414 "",
415 "",
416 "",
417 "SODIMM_135",
418 "SODIMM_137",
419 "UNUSABLE_SODIMM_180
420 "UNUSABLE_SODIMM_184
421 };
422
423 /* Colibri PWM_B */
424 &lsio_pwm0 {
425 #pwm-cells = <3>;
426 pinctrl-0 = <&pinctrl_pwm_b>;
427 pinctrl-names = "default";
428 };
429
430 /* Colibri PWM_C */
431 &lsio_pwm1 {
432 #pwm-cells = <3>;
433 pinctrl-0 = <&pinctrl_pwm_c>;
434 pinctrl-names = "default";
435 };
436
437 /* Colibri PWM_D */
438 &lsio_pwm2 {
439 #pwm-cells = <3>;
440 pinctrl-0 = <&pinctrl_pwm_d>;
441 pinctrl-names = "default";
442 };
443
444 /* VPU Mailboxes */
445 &mu_m0 {
446 status="okay";
447 };
448
449 &mu1_m0 {
450 status="okay";
451 };
452
453 /* TODO MIPI CSI */
454
455 /* TODO MIPI DSI with DSI-to-HDMI bridge lt891
456
457 /* TODO on-module PCIe for Wi-Fi */
458
459 /* On-module I2S */
460 &sai0 {
461 #sound-dai-cells = <0>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_sai0>;
464 status = "okay";
465 };
466
467 &thermal_zones {
468 pmic-thermal {
469 polling-delay-passive = <250>;
470 polling-delay = <2000>;
471 thermal-sensors = <&tsens IMX_
472
473 trips {
474 pmic_alert0: trip0 {
475 temperature =
476 hysteresis = <
477 type = "passiv
478 };
479
480 pmic_crit0: trip1 {
481 temperature =
482 hysteresis = <
483 type = "critic
484 };
485 };
486
487 cooling-maps {
488 pmic_cooling_map0: map
489 trip = <&pmic_
490 cooling-device
491
492
493
494 };
495 };
496 };
497 };
498
499 &usbotg1 {
500 adp-disable;
501 disable-over-current;
502 extcon = <&extcon_usbc_det &extcon_usb
503 hnp-disable;
504 power-active-high;
505 srp-disable;
506 vbus-supply = <®_usbh_vbus>;
507 };
508
509 &usbotg3_cdns3 {
510 dr_mode = "host";
511 };
512
513 /* On-module eMMC */
514 &usdhc1 {
515 bus-width = <8>;
516 non-removable;
517 no-sd;
518 no-sdio;
519 pinctrl-names = "default", "state_100m
520 pinctrl-0 = <&pinctrl_usdhc1>;
521 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
522 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
523 status = "okay";
524 };
525
526 /* Colibri SD/MMC Card */
527 &usdhc2 {
528 bus-width = <4>;
529 cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_
530 vmmc-supply = <®_module_3v3>;
531 pinctrl-names = "default", "state_100m
532 pinctrl-0 = <&pinctrl_usdhc2>, <&pinct
533 pinctrl-1 = <&pinctrl_usdhc2_100mhz>,
534 pinctrl-2 = <&pinctrl_usdhc2_200mhz>,
535 pinctrl-3 = <&pinctrl_usdhc2_sleep>, <
536 disable-wp;
537 no-1-8-v;
538 };
539
540 &vpu {
541 compatible = "nxp,imx8qxp-vpu";
542 status = "okay";
543 };
544
545 /* VPU Decoder */
546 &vpu_core0 {
547 reg = <0x2d040000 0x10000>;
548 memory-region = <&decoder_boot>, <&dec
549 status = "okay";
550 };
551
552 /* VPU Encoder */
553 &vpu_core1 {
554 reg = <0x2d050000 0x10000>;
555 memory-region = <&encoder_boot>, <&enc
556 status = "okay";
557 };
558
559 &iomuxc {
560 /* On-module touch pen-down interrupt
561 pinctrl_ad7879_int: ad7879intgrp {
562 fsl,pins = <IMX8QXP_MIPI_CSI0_
563 };
564
565 /* Colibri Analogue Inputs */
566 pinctrl_adc0: adc0grp {
567 fsl,pins = <IMX8QXP_ADC_IN0_AD
568 <IMX8QXP_ADC_IN1_AD
569 <IMX8QXP_ADC_IN4_AD
570 <IMX8QXP_ADC_IN5_AD
571 };
572
573 /* Atmel MXT touchsceen + Capacitive T
574 /* NOTE: This pingroup conflicts with
575 * pinctrl_pwm_b/pinctrl_pwm_c. Don't
576 * simultaneously.
577 */
578 pinctrl_atmel_adap: atmeladaptergrp {
579 fsl,pins = <IMX8QXP_UART1_RX_L
580 <IMX8QXP_UART1_TX_L
581 };
582
583 /* Atmel MXT touchsceen + boards with
584 pinctrl_atmel_conn: atmelconnectorgrp
585 fsl,pins = <IMX8QXP_QSPI0B_DAT
586 <IMX8QXP_QSPI0B_SS1
587 };
588
589 pinctrl_can_int: canintgrp {
590 fsl,pins = <IMX8QXP_QSPI0A_DQS
591 };
592
593 pinctrl_csi_ctl: csictlgrp {
594 fsl,pins = <IMX8QXP_QSPI0A_SS0
595 <IMX8QXP_QSPI0A_SS1
596 };
597
598 pinctrl_csi_mclk: csimclkgrp {
599 fsl,pins = <IMX8QXP_CSI_MCLK_C
600 };
601
602 pinctrl_ext_io0: extio0grp {
603 fsl,pins = <IMX8QXP_ENET0_RGMI
604 };
605
606 /* Colibri Ethernet: On-module 100Mbps
607 pinctrl_fec1: fec1grp {
608 fsl,pins = <IMX8QXP_ENET0_MDC_
609 <IMX8QXP_ENET0_MDIO
610 <IMX8QXP_ENET0_RGMI
611 <IMX8QXP_ENET0_RGMI
612 <IMX8QXP_ENET0_RGMI
613 <IMX8QXP_ENET0_RGMI
614 <IMX8QXP_ENET0_RGMI
615 <IMX8QXP_ENET0_RGMI
616 <IMX8QXP_ENET0_RGMI
617 <IMX8QXP_ENET0_RGMI
618 };
619
620 pinctrl_fec1_sleep: fec1slpgrp {
621 fsl,pins = <IMX8QXP_ENET0_MDC_
622 <IMX8QXP_ENET0_MDIO
623 <IMX8QXP_ENET0_RGMI
624 <IMX8QXP_ENET0_RGMI
625 <IMX8QXP_ENET0_RGMI
626 <IMX8QXP_ENET0_RGMI
627 <IMX8QXP_ENET0_RGMI
628 <IMX8QXP_ENET0_RGMI
629 <IMX8QXP_ENET0_RGMI
630 <IMX8QXP_ENET0_RGMI
631 };
632
633 /* Colibri optional CAN on UART_B RTS/
634 pinctrl_flexcan1: flexcan0grp {
635 fsl,pins = <IMX8QXP_FLEXCAN0_T
636 <IMX8QXP_FLEXCAN0_R
637 };
638
639 /* Colibri optional CAN on PS2 */
640 pinctrl_flexcan2: flexcan1grp {
641 fsl,pins = <IMX8QXP_FLEXCAN1_T
642 <IMX8QXP_FLEXCAN1_R
643 };
644
645 /* Colibri optional CAN on UART_A TXD/
646 pinctrl_flexcan3: flexcan2grp {
647 fsl,pins = <IMX8QXP_FLEXCAN2_T
648 <IMX8QXP_FLEXCAN2_R
649 };
650
651 /* Colibri LCD Back-Light GPIO */
652 pinctrl_gpio_bl_on: gpioblongrp {
653 fsl,pins = <IMX8QXP_QSPI0A_DAT
654 };
655
656 /* HDMI Hot Plug Detect on FFC (X2) */
657 pinctrl_gpio_hpd: gpiohpdgrp {
658 fsl,pins = <IMX8QXP_MIPI_DSI1_
659 };
660
661 pinctrl_gpiokeys: gpiokeysgrp {
662 fsl,pins = <IMX8QXP_QSPI0A_DAT
663 };
664
665 pinctrl_hog0: hog0grp {
666 fsl,pins = <IMX8QXP_CSI_D07_CI
667 <IMX8QXP_QSPI0A_DAT
668 <IMX8QXP_SAI0_TXC_L
669 <IMX8QXP_CSI_D02_CI
670 <IMX8QXP_ENET0_RGMI
671 <IMX8QXP_CSI_D06_CI
672 <IMX8QXP_QSPI0B_SCL
673 <IMX8QXP_SAI0_RXD_L
674 <IMX8QXP_CSI_D03_CI
675 <IMX8QXP_QSPI0B_DAT
676 <IMX8QXP_SAI0_TXFS_
677 <IMX8QXP_CSI_D00_CI
678 <IMX8QXP_SAI0_TXD_L
679 <IMX8QXP_CSI_D01_CI
680 <IMX8QXP_QSPI0B_DAT
681 <IMX8QXP_USB_SS3_TC
682 <IMX8QXP_USB_SS3_TC
683 <IMX8QXP_USB_SS3_TC
684 <IMX8QXP_CSI_PCLK_L
685 <IMX8QXP_QSPI0B_DAT
686 <IMX8QXP_SAI1_RXFS_
687 <IMX8QXP_QSPI0B_DQS
688 <IMX8QXP_QSPI0B_SS0
689 };
690
691 pinctrl_hog1: hog1grp {
692 fsl,pins = <IMX8QXP_QSPI0A_SCL
693 };
694
695 pinctrl_hog2: hog2grp {
696 fsl,pins = <IMX8QXP_CSI_MCLK_L
697 };
698
699 /*
700 * This pin is used in the SCFW as a U
701 * Linux would require rewritting the
702 */
703 pinctrl_hog_scfw: hogscfwgrp {
704 fsl,pins = <IMX8QXP_SCU_GPIO0_
705 };
706
707 /* On Module I2C */
708 pinctrl_i2c0: i2c0grp {
709 fsl,pins = <IMX8QXP_MIPI_CSI0_
710 <IMX8QXP_MIPI_CSI0_
711 };
712
713 /* MIPI DSI I2C accessible on SODIMM (
714 pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0
715 fsl,pins = <IMX8QXP_MIPI_DSI0_
716 <IMX8QXP_MIPI_DSI0_
717 };
718
719 /* MIPI CSI I2C accessible on SODIMM (
720 pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1
721 fsl,pins = <IMX8QXP_MIPI_DSI1_
722 <IMX8QXP_MIPI_DSI1_
723 };
724
725 /* Colibri I2C */
726 pinctrl_i2c1: i2c1grp {
727 fsl,pins = <IMX8QXP_MIPI_DSI0_
728 <IMX8QXP_MIPI_DSI0_
729 };
730
731 /* Colibri Parallel RGB LCD Interface
732 pinctrl_lcdif: lcdifgrp {
733 fsl,pins = <IMX8QXP_MCLK_OUT0_
734 <IMX8QXP_SPI3_CS0_A
735 <IMX8QXP_MCLK_IN0_A
736 <IMX8QXP_MCLK_IN1_A
737 <IMX8QXP_USDHC1_RES
738 <IMX8QXP_ESAI0_FSR_
739 <IMX8QXP_USDHC1_WP_
740 <IMX8QXP_ESAI0_FST_
741 <IMX8QXP_ESAI0_SCKR
742 <IMX8QXP_ESAI0_SCKT
743 <IMX8QXP_ESAI0_TX0_
744 <IMX8QXP_ESAI0_TX1_
745 <IMX8QXP_ESAI0_TX2_
746 <IMX8QXP_ESAI0_TX3_
747 <IMX8QXP_ESAI0_TX4_
748 <IMX8QXP_ESAI0_TX5_
749 <IMX8QXP_SPDIF0_RX_
750 <IMX8QXP_SPDIF0_TX_
751 <IMX8QXP_SPDIF0_EXT
752 <IMX8QXP_SPI3_SCK_A
753 <IMX8QXP_SPI3_SDO_A
754 <IMX8QXP_SPI3_SDI_A
755 <IMX8QXP_SPI3_CS1_A
756 <IMX8QXP_ENET0_RGMI
757 <IMX8QXP_UART1_CTS_
758 };
759
760 /* Colibri SPI */
761 pinctrl_lpspi2: lpspi2grp {
762 fsl,pins = <IMX8QXP_SPI2_CS0_L
763 <IMX8QXP_SPI2_SDO_A
764 <IMX8QXP_SPI2_SDI_A
765 <IMX8QXP_SPI2_SCK_A
766 };
767
768 pinctrl_lpspi2_cs2: lpspi2cs2grp {
769 fsl,pins = <IMX8QXP_ENET0_RGMI
770 };
771
772 /* Colibri UART_B */
773 pinctrl_lpuart0: lpuart0grp {
774 fsl,pins = <IMX8QXP_UART0_RX_A
775 <IMX8QXP_UART0_TX_A
776 <IMX8QXP_FLEXCAN0_R
777 <IMX8QXP_FLEXCAN0_T
778 };
779
780 /* Colibri UART_C */
781 pinctrl_lpuart2: lpuart2grp {
782 fsl,pins = <IMX8QXP_UART2_RX_A
783 <IMX8QXP_UART2_TX_A
784 };
785
786 /* Colibri UART_A */
787 pinctrl_lpuart3: lpuart3grp {
788 fsl,pins = <IMX8QXP_FLEXCAN2_R
789 <IMX8QXP_FLEXCAN2_T
790 };
791
792 /* Colibri UART_A Control */
793 pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
794 fsl,pins = <IMX8QXP_MIPI_DSI1_
795 <IMX8QXP_SAI1_RXD_L
796 <IMX8QXP_SAI1_RXC_L
797 <IMX8QXP_CSI_RESET_
798 <IMX8QXP_USDHC1_CD_
799 <IMX8QXP_CSI_EN_LSI
800 };
801
802 /* On module wifi module */
803 pinctrl_pcieb: pciebgrp {
804 fsl,pins = <IMX8QXP_PCIE_CTRL0
805 <IMX8QXP_PCIE_CTRL0
806 <IMX8QXP_PCIE_CTRL0
807 };
808
809 /* Colibri PWM_A */
810 pinctrl_pwm_a: pwmagrp {
811 /* both pins are connected together, r
812 fsl,pins = <IMX8QXP_CSI_D05_CI
813 <IMX8QXP_SPI0_CS1_A
814 };
815
816 /* Colibri PWM_B */
817 pinctrl_pwm_b: pwmbgrp {
818 fsl,pins = <IMX8QXP_UART1_TX_L
819 };
820
821 /* Colibri PWM_C */
822 pinctrl_pwm_c: pwmcgrp {
823 fsl,pins = <IMX8QXP_UART1_RX_L
824 };
825
826 /* Colibri PWM_D */
827 pinctrl_pwm_d: pwmdgrp {
828 /* both pins are connected together, r
829 fsl,pins = <IMX8QXP_CSI_D04_CI
830 <IMX8QXP_UART1_RTS_
831 };
832
833 /* On-module I2S */
834 pinctrl_sai0: sai0grp {
835 fsl,pins = <IMX8QXP_SPI0_SDI_A
836 <IMX8QXP_SPI0_CS0_A
837 <IMX8QXP_SPI0_SCK_A
838 <IMX8QXP_SPI0_SDO_A
839 };
840
841 /* Colibri Audio Analogue Microphone G
842 pinctrl_sgtl5000: sgtl5000grp {
843 fsl,pins = <IMX8QXP_MIPI_CSI0_
844 };
845
846 /* On-module SGTL5000 clock */
847 pinctrl_sgtl5000_usb_clk: sgtl5000usbc
848 fsl,pins = <IMX8QXP_ADC_IN3_AD
849 };
850
851 /* On-module USB interrupt */
852 pinctrl_usb3503a: usb3503agrp {
853 fsl,pins = <IMX8QXP_MIPI_CSI0_
854 };
855
856 /* Colibri USB Client Cable Detect */
857 pinctrl_usbc_det: usbcdetgrp {
858 fsl,pins = <IMX8QXP_ENET0_REFC
859 };
860
861 /* USB Host Power Enable */
862 pinctrl_usbh1_reg: usbh1reggrp {
863 fsl,pins = <IMX8QXP_USB_SS3_TC
864 };
865
866 /* On-module eMMC */
867 pinctrl_usdhc1: usdhc1grp {
868 fsl,pins = <IMX8QXP_EMMC0_CLK_
869 <IMX8QXP_EMMC0_CMD_
870 <IMX8QXP_EMMC0_DATA
871 <IMX8QXP_EMMC0_DATA
872 <IMX8QXP_EMMC0_DATA
873 <IMX8QXP_EMMC0_DATA
874 <IMX8QXP_EMMC0_DATA
875 <IMX8QXP_EMMC0_DATA
876 <IMX8QXP_EMMC0_DATA
877 <IMX8QXP_EMMC0_DATA
878 <IMX8QXP_EMMC0_STRO
879 <IMX8QXP_EMMC0_RESE
880 };
881
882 pinctrl_usdhc1_100mhz: usdhc1-100mhzgr
883 fsl,pins = <IMX8QXP_EMMC0_CLK_
884 <IMX8QXP_EMMC0_CMD_
885 <IMX8QXP_EMMC0_DATA
886 <IMX8QXP_EMMC0_DATA
887 <IMX8QXP_EMMC0_DATA
888 <IMX8QXP_EMMC0_DATA
889 <IMX8QXP_EMMC0_DATA
890 <IMX8QXP_EMMC0_DATA
891 <IMX8QXP_EMMC0_DATA
892 <IMX8QXP_EMMC0_DATA
893 <IMX8QXP_EMMC0_STRO
894 <IMX8QXP_EMMC0_RESE
895 };
896
897 pinctrl_usdhc1_200mhz: usdhc1-200mhzgr
898 fsl,pins = <IMX8QXP_EMMC0_CLK_
899 <IMX8QXP_EMMC0_CMD_
900 <IMX8QXP_EMMC0_DATA
901 <IMX8QXP_EMMC0_DATA
902 <IMX8QXP_EMMC0_DATA
903 <IMX8QXP_EMMC0_DATA
904 <IMX8QXP_EMMC0_DATA
905 <IMX8QXP_EMMC0_DATA
906 <IMX8QXP_EMMC0_DATA
907 <IMX8QXP_EMMC0_DATA
908 <IMX8QXP_EMMC0_STRO
909 <IMX8QXP_EMMC0_RESE
910 };
911
912 /* Colibri SD/MMC Card Detect */
913 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
914 fsl,pins = <IMX8QXP_QSPI0A_DAT
915 };
916
917 pinctrl_usdhc2_gpio_sleep: usdhc2gpios
918 fsl,pins = <IMX8QXP_QSPI0A_DAT
919 };
920
921 /* Colibri SD/MMC Card */
922 pinctrl_usdhc2: usdhc2grp {
923 fsl,pins = <IMX8QXP_USDHC1_CLK
924 <IMX8QXP_USDHC1_CMD
925 <IMX8QXP_USDHC1_DAT
926 <IMX8QXP_USDHC1_DAT
927 <IMX8QXP_USDHC1_DAT
928 <IMX8QXP_USDHC1_DAT
929 <IMX8QXP_USDHC1_VSE
930 };
931
932 pinctrl_usdhc2_100mhz: usdhc2-100mhzgr
933 fsl,pins = <IMX8QXP_USDHC1_CLK
934 <IMX8QXP_USDHC1_CMD
935 <IMX8QXP_USDHC1_DAT
936 <IMX8QXP_USDHC1_DAT
937 <IMX8QXP_USDHC1_DAT
938 <IMX8QXP_USDHC1_DAT
939 <IMX8QXP_USDHC1_VSE
940 };
941
942 pinctrl_usdhc2_200mhz: usdhc2-200mhzgr
943 fsl,pins = <IMX8QXP_USDHC1_CLK
944 <IMX8QXP_USDHC1_CMD
945 <IMX8QXP_USDHC1_DAT
946 <IMX8QXP_USDHC1_DAT
947 <IMX8QXP_USDHC1_DAT
948 <IMX8QXP_USDHC1_DAT
949 <IMX8QXP_USDHC1_VSE
950 };
951
952 pinctrl_usdhc2_sleep: usdhc2slpgrp {
953 fsl,pins = <IMX8QXP_USDHC1_CLK
954 <IMX8QXP_USDHC1_CMD
955 <IMX8QXP_USDHC1_DAT
956 <IMX8QXP_USDHC1_DAT
957 <IMX8QXP_USDHC1_DAT
958 <IMX8QXP_USDHC1_DAT
959 <IMX8QXP_USDHC1_VSE
960 };
961
962 pinctrl_wifi: wifigrp {
963 fsl,pins = <IMX8QXP_SCU_BOOT_M
964 };
965 };
966
967 /* Delete peripherals which are not present on
968
969 /delete-node/ &adc1;
970 /delete-node/ &adc1_lpcg;
971 /delete-node/ &dsp;
972 /delete-node/ &dsp_lpcg;
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