1 // SPDX-License-Identifier: GPL-2.0-or-later O 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* 2 /*
3 * Copyright 2019 Toradex 3 * Copyright 2019 Toradex
4 */ 4 */
5 5
6 / { 6 / {
7 chosen { 7 chosen {
8 stdout-path = &lpuart3; 8 stdout-path = &lpuart3;
9 }; 9 };
10 10
11 colibri_gpio_keys: gpio-keys { 11 colibri_gpio_keys: gpio-keys {
12 compatible = "gpio-keys"; 12 compatible = "gpio-keys";
13 pinctrl-names = "default"; 13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpiokeys 14 pinctrl-0 = <&pinctrl_gpiokeys>;
15 status = "disabled"; 15 status = "disabled";
16 16
17 key-wakeup { 17 key-wakeup {
18 debounce-interval = <1 18 debounce-interval = <10>;
19 gpios = <&lsio_gpio3 1 19 gpios = <&lsio_gpio3 10 GPIO_ACTIVE_HIGH>;
20 label = "Wake-Up"; 20 label = "Wake-Up";
21 linux,code = <KEY_WAKE 21 linux,code = <KEY_WAKEUP>;
22 wakeup-source; 22 wakeup-source;
23 }; 23 };
24 }; 24 };
25 25
26 extcon_usbc_det: usbc-det { <<
27 compatible = "linux,extcon-usb <<
28 pinctrl-names = "default"; <<
29 pinctrl-0 = <&pinctrl_usbc_det <<
30 id-gpios = <&lsio_gpio5 9 GPIO <<
31 status = "disabled"; <<
32 }; <<
33 <<
34 reg_module_3v3: regulator-module-3v3 { 26 reg_module_3v3: regulator-module-3v3 {
35 compatible = "regulator-fixed" 27 compatible = "regulator-fixed";
36 regulator-name = "+V3.3"; 28 regulator-name = "+V3.3";
37 regulator-min-microvolt = <330 29 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <330 30 regulator-max-microvolt = <3300000>;
39 }; 31 };
40 <<
41 reg_module_3v3_avdd: regulator-module- <<
42 compatible = "regulator-fixed" <<
43 regulator-max-microvolt = <330 <<
44 regulator-min-microvolt = <330 <<
45 regulator-name = "+V3.3_AVDD_A <<
46 }; <<
47 <<
48 reg_module_vref_1v8: regulator-module- <<
49 compatible = "regulator-fixed" <<
50 regulator-max-microvolt = <180 <<
51 regulator-min-microvolt = <180 <<
52 regulator-name = "vref-1v8"; <<
53 }; <<
54 <<
55 reg_usbh_vbus: regulator-usbh-vbus { <<
56 compatible = "regulator-fixed" <<
57 pinctrl-names = "default"; <<
58 pinctrl-0 = <&pinctrl_usbh1_re <<
59 gpio = <&lsio_gpio4 3 GPIO_ACT <<
60 regulator-always-on; <<
61 regulator-max-microvolt = <500 <<
62 regulator-min-microvolt = <500 <<
63 regulator-name = "usbh_vbus"; <<
64 }; <<
65 <<
66 sound-card { <<
67 compatible = "simple-audio-car <<
68 simple-audio-card,bitclock-mas <<
69 simple-audio-card,format = "i2 <<
70 simple-audio-card,frame-master <<
71 simple-audio-card,name = "coli <<
72 <<
73 dailink_master: simple-audio-c <<
74 clocks = <&mclkout0_lp <<
75 sound-dai = <&sgtl5000 <<
76 }; <<
77 <<
78 simple-audio-card,cpu { <<
79 sound-dai = <&sai0>; <<
80 }; <<
81 }; <<
82 }; 32 };
83 33
84 /* Colibri Analogue Inputs */ !! 34 /* TODO Analogue Inputs */
85 &adc0 { <<
86 pinctrl-names = "default"; <<
87 pinctrl-0 = <&pinctrl_adc0>; <<
88 vref-supply = <®_module_vref_1v8>; <<
89 }; <<
90 35
91 /* Colibri PWM_A */ !! 36 /* TODO Cooling maps for DX */
92 &adma_pwm { <<
93 pinctrl-names = "default"; <<
94 pinctrl-0 = <&pinctrl_pwm_a>; <<
95 }; <<
96 37
97 &cpu_alert0 { 38 &cpu_alert0 {
98 hysteresis = <2000>; 39 hysteresis = <2000>;
99 temperature = <90000>; 40 temperature = <90000>;
100 type = "passive"; 41 type = "passive";
101 }; 42 };
102 43
103 &cpu_crit0 { 44 &cpu_crit0 {
104 hysteresis = <2000>; 45 hysteresis = <2000>;
105 temperature = <105000>; 46 temperature = <105000>;
106 type = "critical"; 47 type = "critical";
107 }; 48 };
108 49
109 &enet0_lpcg { !! 50 /* TODO flexcan1 - 3 */
110 clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_ !! 51
111 <&clk IMX_SC_R_ENET_0 IMX_SC_ !! 52 /* TODO GPU */
112 <&conn_axi_clk>, <<
113 <&clk IMX_SC_R_ENET_0 IMX_SC_ <<
114 <&conn_ipg_clk>, <<
115 <&conn_ipg_clk>; <<
116 clock-output-names = "enet0_lpcg_timer <<
117 "enet0_lpcg_txc_s <<
118 "enet0_lpcg_ahb_c <<
119 "enet0_lpcg_ref_5 <<
120 "enet0_lpcg_ipg_c <<
121 "enet0_lpcg_ipg_s <<
122 }; <<
123 53
124 /* On-module I2C */ 54 /* On-module I2C */
125 &i2c0 { 55 &i2c0 {
126 #address-cells = <1>; 56 #address-cells = <1>;
127 #size-cells = <0>; 57 #size-cells = <0>;
128 clock-frequency = <100000>; 58 clock-frequency = <100000>;
129 pinctrl-names = "default"; 59 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl 60 pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
131 status = "okay"; 61 status = "okay";
132 62
133 /* USB HUB USB3803 */ <<
134 usb-hub@8 { <<
135 compatible = "smsc,usb3803"; <<
136 reg = <0x8>; <<
137 assigned-clocks = <&clk IMX_SC <<
138 <&clk IMX_SC <<
139 <&clk IMX_SC <<
140 <&mclkout0_l <<
141 assigned-clock-rates = <786432 <<
142 pinctrl-names = "default"; <<
143 pinctrl-0 = <&pinctrl_usb3503a <<
144 bypass-gpios = <&gpio_expander <<
145 clocks = <&mclkout0_lpcg IMX_L <<
146 clock-names = "refclk"; <<
147 disabled-ports = <2>; <<
148 initial-mode = <1>; <<
149 intn-gpios = <&lsio_gpio3 4 GP <<
150 reset-gpios = <&gpio_expander_ <<
151 }; <<
152 <<
153 sgtl5000_a: audio-codec@a { <<
154 compatible = "fsl,sgtl5000"; <<
155 reg = <0xa>; <<
156 #sound-dai-cells = <0>; <<
157 assigned-clocks = <&clk IMX_SC <<
158 <&clk IMX_SC <<
159 <&clk IMX_SC <<
160 <&mclkout0_l <<
161 assigned-clock-rates = <786432 <<
162 clocks = <&mclkout0_lpcg IMX_L <<
163 VDDA-supply = <®_module_3v3 <<
164 VDDD-supply = <®_module_vre <<
165 VDDIO-supply = <®_module_3v <<
166 }; <<
167 <<
168 /* Touch controller */ 63 /* Touch controller */
169 touchscreen@2c { 64 touchscreen@2c {
170 compatible = "adi,ad7879-1"; 65 compatible = "adi,ad7879-1";
171 pinctrl-names = "default"; 66 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_ad7879_i 67 pinctrl-0 = <&pinctrl_ad7879_int>;
173 reg = <0x2c>; 68 reg = <0x2c>;
174 interrupt-parent = <&lsio_gpio 69 interrupt-parent = <&lsio_gpio3>;
175 interrupts = <5 IRQ_TYPE_EDGE_ 70 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
176 touchscreen-max-pressure = <40 71 touchscreen-max-pressure = <4096>;
177 adi,resistance-plate-x = <120> 72 adi,resistance-plate-x = <120>;
178 adi,first-conversion-delay = / 73 adi,first-conversion-delay = /bits/ 8 <3>;
179 adi,acquisition-time = /bits/ 74 adi,acquisition-time = /bits/ 8 <1>;
180 adi,median-filter-size = /bits 75 adi,median-filter-size = /bits/ 8 <2>;
181 adi,averaging = /bits/ 8 <1>; 76 adi,averaging = /bits/ 8 <1>;
182 adi,conversion-interval = /bit 77 adi,conversion-interval = /bits/ 8 <255>;
183 status = "disabled"; 78 status = "disabled";
184 }; 79 };
185 <<
186 gpio_expander_43: gpio@43 { <<
187 compatible = "fcs,fxl6408"; <<
188 reg = <0x43>; <<
189 gpio-controller; <<
190 #gpio-cells = <2>; <<
191 gpio-line-names = "Wi-Fi_W_DIS <<
192 "Wi-Fi_WKUP_ <<
193 "PWR_EN_+V3. <<
194 "PCIe_REF_CL <<
195 "USB_RESET_N <<
196 "USB_BYPASS_ <<
197 "Wi-Fi_PDn", <<
198 "Wi-Fi_WKUP_ <<
199 }; <<
200 }; 80 };
201 81
202 /* TODO i2c lvds0 accessible on FFC (X2) */ 82 /* TODO i2c lvds0 accessible on FFC (X2) */
203 83
204 /* TODO i2c lvds1 accessible on FFC (X3) */ 84 /* TODO i2c lvds1 accessible on FFC (X3) */
205 85
206 /* Colibri I2C */ 86 /* Colibri I2C */
207 &i2c1 { 87 &i2c1 {
208 #address-cells = <1>; 88 #address-cells = <1>;
209 #size-cells = <0>; 89 #size-cells = <0>;
210 clock-frequency = <100000>; 90 clock-frequency = <100000>;
211 pinctrl-names = "default"; 91 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_i2c1>; 92 pinctrl-0 = <&pinctrl_i2c1>;
213 }; 93 };
214 94
215 &jpegdec { 95 &jpegdec {
216 status = "okay"; 96 status = "okay";
217 }; 97 };
218 98
219 &jpegenc { 99 &jpegenc {
220 status = "okay"; 100 status = "okay";
221 }; 101 };
222 102
223 /* TODO Parallel RRB */ 103 /* TODO Parallel RRB */
224 104
225 /* Colibri UART_B */ 105 /* Colibri UART_B */
226 &lpuart0 { 106 &lpuart0 {
227 pinctrl-names = "default"; 107 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_lpuart0>; 108 pinctrl-0 = <&pinctrl_lpuart0>;
229 }; 109 };
230 110
231 /* Colibri UART_C */ 111 /* Colibri UART_C */
232 &lpuart2 { 112 &lpuart2 {
233 pinctrl-names = "default"; 113 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_lpuart2>; 114 pinctrl-0 = <&pinctrl_lpuart2>;
235 }; 115 };
236 116
237 /* Colibri UART_A */ 117 /* Colibri UART_A */
238 &lpuart3 { 118 &lpuart3 {
239 pinctrl-names = "default"; 119 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_lpuart3>, <&pinc 120 pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
241 }; 121 };
242 122
243 /* Colibri FastEthernet */ 123 /* Colibri FastEthernet */
244 &fec1 { 124 &fec1 {
245 pinctrl-names = "default", "sleep"; 125 pinctrl-names = "default", "sleep";
246 pinctrl-0 = <&pinctrl_fec1>; 126 pinctrl-0 = <&pinctrl_fec1>;
247 pinctrl-1 = <&pinctrl_fec1_sleep>; 127 pinctrl-1 = <&pinctrl_fec1_sleep>;
248 phy-mode = "rmii"; 128 phy-mode = "rmii";
249 phy-handle = <ðphy0>; 129 phy-handle = <ðphy0>;
250 fsl,magic-packet; 130 fsl,magic-packet;
251 131
252 mdio { 132 mdio {
253 #address-cells = <1>; 133 #address-cells = <1>;
254 #size-cells = <0>; 134 #size-cells = <0>;
255 135
256 ethphy0: ethernet-phy@2 { 136 ethphy0: ethernet-phy@2 {
257 compatible = "ethernet 137 compatible = "ethernet-phy-ieee802.3-c22";
258 max-speed = <100>; 138 max-speed = <100>;
259 reg = <2>; 139 reg = <2>;
260 }; 140 };
261 }; 141 };
262 }; 142 };
263 143
264 /* Colibri SPI */ 144 /* Colibri SPI */
265 &lpspi2 { 145 &lpspi2 {
266 pinctrl-names = "default"; 146 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_lpspi2>; 147 pinctrl-0 = <&pinctrl_lpspi2>;
268 cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_ 148 cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
269 }; 149 };
270 150
271 &lsio_gpio0 { 151 &lsio_gpio0 {
272 gpio-line-names = "", 152 gpio-line-names = "",
273 "SODIMM_70", 153 "SODIMM_70",
274 "SODIMM_60", 154 "SODIMM_60",
275 "SODIMM_58", 155 "SODIMM_58",
276 "SODIMM_78", 156 "SODIMM_78",
277 "SODIMM_72", 157 "SODIMM_72",
278 "SODIMM_80", 158 "SODIMM_80",
279 "SODIMM_46", 159 "SODIMM_46",
280 "SODIMM_62", 160 "SODIMM_62",
281 "SODIMM_48", 161 "SODIMM_48",
282 "SODIMM_74", 162 "SODIMM_74",
283 "SODIMM_50", 163 "SODIMM_50",
284 "SODIMM_52", 164 "SODIMM_52",
285 "SODIMM_54", 165 "SODIMM_54",
286 "SODIMM_66", 166 "SODIMM_66",
287 "SODIMM_64", 167 "SODIMM_64",
288 "SODIMM_68", 168 "SODIMM_68",
289 "", 169 "",
290 "", 170 "",
291 "SODIMM_82", 171 "SODIMM_82",
292 "SODIMM_56", 172 "SODIMM_56",
293 "SODIMM_28", 173 "SODIMM_28",
294 "SODIMM_30", 174 "SODIMM_30",
295 "", 175 "",
296 "SODIMM_61", 176 "SODIMM_61",
297 "SODIMM_103", 177 "SODIMM_103",
298 "", 178 "",
299 "", 179 "",
300 "", 180 "",
301 "SODIMM_25", 181 "SODIMM_25",
302 "SODIMM_27", 182 "SODIMM_27",
303 "SODIMM_100"; 183 "SODIMM_100";
304 }; 184 };
305 185
306 &lsio_gpio1 { 186 &lsio_gpio1 {
307 gpio-line-names = "SODIMM_86", 187 gpio-line-names = "SODIMM_86",
308 "SODIMM_92", 188 "SODIMM_92",
309 "SODIMM_90", 189 "SODIMM_90",
310 "SODIMM_88", 190 "SODIMM_88",
311 "", 191 "",
312 "", 192 "",
313 "", 193 "",
314 "SODIMM_59", 194 "SODIMM_59",
315 "", 195 "",
316 "SODIMM_6", 196 "SODIMM_6",
317 "SODIMM_8", 197 "SODIMM_8",
318 "", 198 "",
319 "", 199 "",
320 "SODIMM_2", 200 "SODIMM_2",
321 "SODIMM_4", 201 "SODIMM_4",
322 "SODIMM_34", 202 "SODIMM_34",
323 "SODIMM_32", 203 "SODIMM_32",
324 "SODIMM_63", 204 "SODIMM_63",
325 "SODIMM_55", 205 "SODIMM_55",
326 "SODIMM_33", 206 "SODIMM_33",
327 "SODIMM_35", 207 "SODIMM_35",
328 "SODIMM_36", 208 "SODIMM_36",
329 "SODIMM_38", 209 "SODIMM_38",
330 "SODIMM_21", 210 "SODIMM_21",
331 "SODIMM_19", 211 "SODIMM_19",
332 "SODIMM_140", 212 "SODIMM_140",
333 "SODIMM_142", 213 "SODIMM_142",
334 "SODIMM_196", 214 "SODIMM_196",
335 "SODIMM_194", 215 "SODIMM_194",
336 "SODIMM_186", 216 "SODIMM_186",
337 "SODIMM_188", 217 "SODIMM_188",
338 "SODIMM_138"; 218 "SODIMM_138";
339 }; 219 };
340 220
341 &lsio_gpio2 { 221 &lsio_gpio2 {
342 gpio-line-names = "SODIMM_23", 222 gpio-line-names = "SODIMM_23",
343 "", 223 "",
344 "", 224 "",
345 "SODIMM_144"; 225 "SODIMM_144";
346 }; 226 };
347 227
348 &lsio_gpio3 { 228 &lsio_gpio3 {
349 gpio-line-names = "SODIMM_96", 229 gpio-line-names = "SODIMM_96",
350 "SODIMM_75", 230 "SODIMM_75",
351 "SODIMM_37", 231 "SODIMM_37",
352 "SODIMM_29", 232 "SODIMM_29",
353 "", 233 "",
354 "", 234 "",
355 "", 235 "",
356 "", 236 "",
357 "", 237 "",
358 "SODIMM_43", 238 "SODIMM_43",
359 "SODIMM_45", 239 "SODIMM_45",
360 "SODIMM_69", 240 "SODIMM_69",
361 "SODIMM_71", 241 "SODIMM_71",
362 "SODIMM_73", 242 "SODIMM_73",
363 "SODIMM_77", 243 "SODIMM_77",
364 "SODIMM_89", 244 "SODIMM_89",
365 "SODIMM_93", 245 "SODIMM_93",
366 "SODIMM_95", 246 "SODIMM_95",
367 "SODIMM_99", 247 "SODIMM_99",
368 "SODIMM_105", 248 "SODIMM_105",
369 "SODIMM_107", 249 "SODIMM_107",
370 "SODIMM_98", 250 "SODIMM_98",
371 "SODIMM_102", 251 "SODIMM_102",
372 "SODIMM_104", 252 "SODIMM_104",
373 "SODIMM_106"; 253 "SODIMM_106";
374 }; 254 };
375 255
376 &lsio_gpio4 { 256 &lsio_gpio4 {
377 gpio-line-names = "", 257 gpio-line-names = "",
378 "", 258 "",
379 "", 259 "",
380 "SODIMM_129", 260 "SODIMM_129",
381 "SODIMM_133", 261 "SODIMM_133",
382 "SODIMM_127", 262 "SODIMM_127",
383 "SODIMM_131", 263 "SODIMM_131",
384 "", 264 "",
385 "", 265 "",
386 "", 266 "",
387 "", 267 "",
388 "", 268 "",
389 "", 269 "",
390 "", 270 "",
391 "", 271 "",
392 "", 272 "",
393 "", 273 "",
394 "", 274 "",
395 "", 275 "",
396 "SODIMM_44", 276 "SODIMM_44",
397 "", 277 "",
398 "SODIMM_76", 278 "SODIMM_76",
399 "SODIMM_31", 279 "SODIMM_31",
400 "SODIMM_47", 280 "SODIMM_47",
401 "SODIMM_190", 281 "SODIMM_190",
402 "SODIMM_192", 282 "SODIMM_192",
403 "SODIMM_49", 283 "SODIMM_49",
404 "SODIMM_51", 284 "SODIMM_51",
405 "SODIMM_53"; 285 "SODIMM_53";
406 }; 286 };
407 287
408 &lsio_gpio5 { 288 &lsio_gpio5 {
409 gpio-line-names = "", 289 gpio-line-names = "",
410 "SODIMM_57", 290 "SODIMM_57",
411 "SODIMM_65", 291 "SODIMM_65",
412 "SODIMM_85", 292 "SODIMM_85",
413 "", 293 "",
414 "", 294 "",
415 "", 295 "",
416 "", 296 "",
417 "SODIMM_135", 297 "SODIMM_135",
418 "SODIMM_137", 298 "SODIMM_137",
419 "UNUSABLE_SODIMM_180 299 "UNUSABLE_SODIMM_180",
420 "UNUSABLE_SODIMM_184 300 "UNUSABLE_SODIMM_184";
421 }; 301 };
422 302
423 /* Colibri PWM_B */ 303 /* Colibri PWM_B */
424 &lsio_pwm0 { 304 &lsio_pwm0 {
425 #pwm-cells = <3>; 305 #pwm-cells = <3>;
426 pinctrl-0 = <&pinctrl_pwm_b>; 306 pinctrl-0 = <&pinctrl_pwm_b>;
427 pinctrl-names = "default"; 307 pinctrl-names = "default";
428 }; 308 };
429 309
430 /* Colibri PWM_C */ 310 /* Colibri PWM_C */
431 &lsio_pwm1 { 311 &lsio_pwm1 {
432 #pwm-cells = <3>; 312 #pwm-cells = <3>;
433 pinctrl-0 = <&pinctrl_pwm_c>; 313 pinctrl-0 = <&pinctrl_pwm_c>;
434 pinctrl-names = "default"; 314 pinctrl-names = "default";
435 }; 315 };
436 316
437 /* Colibri PWM_D */ 317 /* Colibri PWM_D */
438 &lsio_pwm2 { 318 &lsio_pwm2 {
439 #pwm-cells = <3>; 319 #pwm-cells = <3>;
440 pinctrl-0 = <&pinctrl_pwm_d>; 320 pinctrl-0 = <&pinctrl_pwm_d>;
441 pinctrl-names = "default"; 321 pinctrl-names = "default";
442 }; 322 };
443 323
444 /* VPU Mailboxes */ <<
445 &mu_m0 { <<
446 status="okay"; <<
447 }; <<
448 <<
449 &mu1_m0 { <<
450 status="okay"; <<
451 }; <<
452 <<
453 /* TODO MIPI CSI */ 324 /* TODO MIPI CSI */
454 325
455 /* TODO MIPI DSI with DSI-to-HDMI bridge lt891 326 /* TODO MIPI DSI with DSI-to-HDMI bridge lt8912 */
456 327
457 /* TODO on-module PCIe for Wi-Fi */ 328 /* TODO on-module PCIe for Wi-Fi */
458 329
459 /* On-module I2S */ !! 330 /* TODO On-module i2s / Audio */
460 &sai0 { <<
461 #sound-dai-cells = <0>; <<
462 pinctrl-names = "default"; <<
463 pinctrl-0 = <&pinctrl_sai0>; <<
464 status = "okay"; <<
465 }; <<
466 <<
467 &thermal_zones { <<
468 pmic-thermal { <<
469 polling-delay-passive = <250>; <<
470 polling-delay = <2000>; <<
471 thermal-sensors = <&tsens IMX_ <<
472 <<
473 trips { <<
474 pmic_alert0: trip0 { <<
475 temperature = <<
476 hysteresis = < <<
477 type = "passiv <<
478 }; <<
479 <<
480 pmic_crit0: trip1 { <<
481 temperature = <<
482 hysteresis = < <<
483 type = "critic <<
484 }; <<
485 }; <<
486 <<
487 cooling-maps { <<
488 pmic_cooling_map0: map <<
489 trip = <&pmic_ <<
490 cooling-device <<
491 <<
492 <<
493 <<
494 }; <<
495 }; <<
496 }; <<
497 }; <<
498 <<
499 &usbotg1 { <<
500 adp-disable; <<
501 disable-over-current; <<
502 extcon = <&extcon_usbc_det &extcon_usb <<
503 hnp-disable; <<
504 power-active-high; <<
505 srp-disable; <<
506 vbus-supply = <®_usbh_vbus>; <<
507 }; <<
508 <<
509 &usbotg3_cdns3 { <<
510 dr_mode = "host"; <<
511 }; <<
512 331
513 /* On-module eMMC */ 332 /* On-module eMMC */
514 &usdhc1 { 333 &usdhc1 {
515 bus-width = <8>; 334 bus-width = <8>;
516 non-removable; 335 non-removable;
517 no-sd; 336 no-sd;
518 no-sdio; 337 no-sdio;
519 pinctrl-names = "default", "state_100m 338 pinctrl-names = "default", "state_100mhz", "state_200mhz";
520 pinctrl-0 = <&pinctrl_usdhc1>; 339 pinctrl-0 = <&pinctrl_usdhc1>;
521 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 340 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
522 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 341 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
523 status = "okay"; 342 status = "okay";
524 }; 343 };
525 344
526 /* Colibri SD/MMC Card */ 345 /* Colibri SD/MMC Card */
527 &usdhc2 { 346 &usdhc2 {
528 bus-width = <4>; 347 bus-width = <4>;
529 cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_ 348 cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
530 vmmc-supply = <®_module_3v3>; 349 vmmc-supply = <®_module_3v3>;
531 pinctrl-names = "default", "state_100m 350 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
532 pinctrl-0 = <&pinctrl_usdhc2>, <&pinct 351 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
533 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, 352 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
534 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, 353 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
535 pinctrl-3 = <&pinctrl_usdhc2_sleep>, < 354 pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
536 disable-wp; 355 disable-wp;
537 no-1-8-v; 356 no-1-8-v;
538 }; 357 };
539 358
540 &vpu { !! 359 /* TODO USB Client/Host */
541 compatible = "nxp,imx8qxp-vpu"; <<
542 status = "okay"; <<
543 }; <<
544 360
545 /* VPU Decoder */ !! 361 /* TODO USB Host */
546 &vpu_core0 { <<
547 reg = <0x2d040000 0x10000>; <<
548 memory-region = <&decoder_boot>, <&dec <<
549 status = "okay"; <<
550 }; <<
551 362
552 /* VPU Encoder */ !! 363 /* TODO VPU Encoder/Decoder */
553 &vpu_core1 { <<
554 reg = <0x2d050000 0x10000>; <<
555 memory-region = <&encoder_boot>, <&enc <<
556 status = "okay"; <<
557 }; <<
558 364
559 &iomuxc { 365 &iomuxc {
560 /* On-module touch pen-down interrupt 366 /* On-module touch pen-down interrupt */
561 pinctrl_ad7879_int: ad7879intgrp { 367 pinctrl_ad7879_int: ad7879intgrp {
562 fsl,pins = <IMX8QXP_MIPI_CSI0_ 368 fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21>;
563 }; 369 };
564 370
565 /* Colibri Analogue Inputs */ 371 /* Colibri Analogue Inputs */
566 pinctrl_adc0: adc0grp { 372 pinctrl_adc0: adc0grp {
567 fsl,pins = <IMX8QXP_ADC_IN0_AD 373 fsl,pins = <IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60>, /* SODIMM 8 */
568 <IMX8QXP_ADC_IN1_AD 374 <IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60>, /* SODIMM 6 */
569 <IMX8QXP_ADC_IN4_AD 375 <IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60>, /* SODIMM 4 */
570 <IMX8QXP_ADC_IN5_AD 376 <IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60>; /* SODIMM 2 */
571 }; 377 };
572 378
573 /* Atmel MXT touchsceen + Capacitive T 379 /* Atmel MXT touchsceen + Capacitive Touch Adapter */
574 /* NOTE: This pingroup conflicts with 380 /* NOTE: This pingroup conflicts with pingroups
575 * pinctrl_pwm_b/pinctrl_pwm_c. Don't 381 * pinctrl_pwm_b/pinctrl_pwm_c. Don't enable them
576 * simultaneously. 382 * simultaneously.
577 */ 383 */
578 pinctrl_atmel_adap: atmeladaptergrp { 384 pinctrl_atmel_adap: atmeladaptergrp {
579 fsl,pins = <IMX8QXP_UART1_RX_L 385 fsl,pins = <IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 0x21>, /* SODIMM 30 */
580 <IMX8QXP_UART1_TX_L 386 <IMX8QXP_UART1_TX_LSIO_GPIO0_IO21 0x4000021>; /* SODIMM 28 */
581 }; 387 };
582 388
583 /* Atmel MXT touchsceen + boards with 389 /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
584 pinctrl_atmel_conn: atmelconnectorgrp 390 pinctrl_atmel_conn: atmelconnectorgrp {
585 fsl,pins = <IMX8QXP_QSPI0B_DAT 391 fsl,pins = <IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x4000021>, /* SODIMM 107 */
586 <IMX8QXP_QSPI0B_SS1 392 <IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x21>; /* SODIMM 106 */
587 }; 393 };
588 394
589 pinctrl_can_int: canintgrp { 395 pinctrl_can_int: canintgrp {
590 fsl,pins = <IMX8QXP_QSPI0A_DQS 396 fsl,pins = <IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40>; /* SODIMM 73 */
591 }; 397 };
592 398
593 pinctrl_csi_ctl: csictlgrp { 399 pinctrl_csi_ctl: csictlgrp {
594 fsl,pins = <IMX8QXP_QSPI0A_SS0 400 fsl,pins = <IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20>, /* SODIMM 77 */
595 <IMX8QXP_QSPI0A_SS1 401 <IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20>; /* SODIMM 89 */
596 }; 402 };
597 403
598 pinctrl_csi_mclk: csimclkgrp { 404 pinctrl_csi_mclk: csimclkgrp {
599 fsl,pins = <IMX8QXP_CSI_MCLK_C 405 fsl,pins = <IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041>; /* SODIMM 75 / X3-12 */
600 }; 406 };
601 407
602 pinctrl_ext_io0: extio0grp { 408 pinctrl_ext_io0: extio0grp {
603 fsl,pins = <IMX8QXP_ENET0_RGMI 409 fsl,pins = <IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040>; /* SODIMM 135 */
604 }; 410 };
605 411
606 /* Colibri Ethernet: On-module 100Mbps 412 /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
607 pinctrl_fec1: fec1grp { 413 pinctrl_fec1: fec1grp {
608 fsl,pins = <IMX8QXP_ENET0_MDC_ 414 fsl,pins = <IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020>,
609 <IMX8QXP_ENET0_MDIO 415 <IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020>,
610 <IMX8QXP_ENET0_RGMI 416 <IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61>,
611 <IMX8QXP_ENET0_RGMI 417 <IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061>,
612 <IMX8QXP_ENET0_RGMI 418 <IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61>,
613 <IMX8QXP_ENET0_RGMI 419 <IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61>,
614 <IMX8QXP_ENET0_RGMI 420 <IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61>,
615 <IMX8QXP_ENET0_RGMI 421 <IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61>,
616 <IMX8QXP_ENET0_RGMI 422 <IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61>,
617 <IMX8QXP_ENET0_RGMI 423 <IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61>;
618 }; 424 };
619 425
620 pinctrl_fec1_sleep: fec1slpgrp { 426 pinctrl_fec1_sleep: fec1slpgrp {
621 fsl,pins = <IMX8QXP_ENET0_MDC_ 427 fsl,pins = <IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041>,
622 <IMX8QXP_ENET0_MDIO 428 <IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041>,
623 <IMX8QXP_ENET0_RGMI 429 <IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41>,
624 <IMX8QXP_ENET0_RGMI 430 <IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41>,
625 <IMX8QXP_ENET0_RGMI 431 <IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41>,
626 <IMX8QXP_ENET0_RGMI 432 <IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41>,
627 <IMX8QXP_ENET0_RGMI 433 <IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41>,
628 <IMX8QXP_ENET0_RGMI 434 <IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41>,
629 <IMX8QXP_ENET0_RGMI 435 <IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41>,
630 <IMX8QXP_ENET0_RGMI 436 <IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41>;
631 }; 437 };
632 438
633 /* Colibri optional CAN on UART_B RTS/ 439 /* Colibri optional CAN on UART_B RTS/CTS */
634 pinctrl_flexcan1: flexcan0grp { 440 pinctrl_flexcan1: flexcan0grp {
635 fsl,pins = <IMX8QXP_FLEXCAN0_T 441 fsl,pins = <IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21>, /* SODIMM 32 */
636 <IMX8QXP_FLEXCAN0_R 442 <IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21>; /* SODIMM 34 */
637 }; 443 };
638 444
639 /* Colibri optional CAN on PS2 */ 445 /* Colibri optional CAN on PS2 */
640 pinctrl_flexcan2: flexcan1grp { 446 pinctrl_flexcan2: flexcan1grp {
641 fsl,pins = <IMX8QXP_FLEXCAN1_T 447 fsl,pins = <IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21>, /* SODIMM 55 */
642 <IMX8QXP_FLEXCAN1_R 448 <IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21>; /* SODIMM 63 */
643 }; 449 };
644 450
645 /* Colibri optional CAN on UART_A TXD/ 451 /* Colibri optional CAN on UART_A TXD/RXD */
646 pinctrl_flexcan3: flexcan2grp { 452 pinctrl_flexcan3: flexcan2grp {
647 fsl,pins = <IMX8QXP_FLEXCAN2_T 453 fsl,pins = <IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21>, /* SODIMM 35 */
648 <IMX8QXP_FLEXCAN2_R 454 <IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21>; /* SODIMM 33 */
649 }; 455 };
650 456
651 /* Colibri LCD Back-Light GPIO */ 457 /* Colibri LCD Back-Light GPIO */
652 pinctrl_gpio_bl_on: gpioblongrp { 458 pinctrl_gpio_bl_on: gpioblongrp {
653 fsl,pins = <IMX8QXP_QSPI0A_DAT 459 fsl,pins = <IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60>; /* SODIMM 71 */
654 }; 460 };
655 461
656 /* HDMI Hot Plug Detect on FFC (X2) */ 462 /* HDMI Hot Plug Detect on FFC (X2) */
657 pinctrl_gpio_hpd: gpiohpdgrp { 463 pinctrl_gpio_hpd: gpiohpdgrp {
658 fsl,pins = <IMX8QXP_MIPI_DSI1_ 464 fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO31 0x20>; /* SODIMM 138 */
659 }; 465 };
660 466
661 pinctrl_gpiokeys: gpiokeysgrp { 467 pinctrl_gpiokeys: gpiokeysgrp {
662 fsl,pins = <IMX8QXP_QSPI0A_DAT 468 fsl,pins = <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041>; /* SODIMM 45 */
663 }; 469 };
664 470
665 pinctrl_hog0: hog0grp { 471 pinctrl_hog0: hog0grp {
666 fsl,pins = <IMX8QXP_CSI_D07_CI 472 fsl,pins = <IMX8QXP_CSI_D07_CI_PI_D09 0x61>, /* SODIMM 65 */
667 <IMX8QXP_QSPI0A_DAT 473 <IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20>, /* SODIMM 69 */
668 <IMX8QXP_SAI0_TXC_L 474 <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20>, /* SODIMM 79 */
669 <IMX8QXP_CSI_D02_CI 475 <IMX8QXP_CSI_D02_CI_PI_D04 0x61>, /* SODIMM 79 */
670 <IMX8QXP_ENET0_RGMI 476 <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020>, /* SODIMM 85 */
671 <IMX8QXP_CSI_D06_CI 477 <IMX8QXP_CSI_D06_CI_PI_D08 0x61>, /* SODIMM 85 */
672 <IMX8QXP_QSPI0B_SCL 478 <IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20>, /* SODIMM 95 */
673 <IMX8QXP_SAI0_RXD_L 479 <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20>, /* SODIMM 97 */
674 <IMX8QXP_CSI_D03_CI 480 <IMX8QXP_CSI_D03_CI_PI_D05 0x61>, /* SODIMM 97 */
675 <IMX8QXP_QSPI0B_DAT 481 <IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20>, /* SODIMM 99 */
676 <IMX8QXP_SAI0_TXFS_ 482 <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20>, /* SODIMM 101 */
677 <IMX8QXP_CSI_D00_CI 483 <IMX8QXP_CSI_D00_CI_PI_D02 0x61>, /* SODIMM 101 */
678 <IMX8QXP_SAI0_TXD_L 484 <IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20>, /* SODIMM 103 */
679 <IMX8QXP_CSI_D01_CI 485 <IMX8QXP_CSI_D01_CI_PI_D03 0x61>, /* SODIMM 103 */
680 <IMX8QXP_QSPI0B_DAT 486 <IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20>, /* SODIMM 105 */
681 <IMX8QXP_USB_SS3_TC 487 <IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20>, /* SODIMM 127 */
682 <IMX8QXP_USB_SS3_TC 488 <IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20>, /* SODIMM 131 */
683 <IMX8QXP_USB_SS3_TC 489 <IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20>, /* SODIMM 133 */
684 <IMX8QXP_CSI_PCLK_L 490 <IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20>, /* SODIMM 96 */
685 <IMX8QXP_QSPI0B_DAT 491 <IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20>, /* SODIMM 98 */
686 <IMX8QXP_SAI1_RXFS_ 492 <IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20>, /* SODIMM 100 */
687 <IMX8QXP_QSPI0B_DQS 493 <IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20>, /* SODIMM 102 */
688 <IMX8QXP_QSPI0B_SS0 494 <IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20>; /* SODIMM 104 */
689 }; 495 };
690 496
691 pinctrl_hog1: hog1grp { 497 pinctrl_hog1: hog1grp {
692 fsl,pins = <IMX8QXP_QSPI0A_SCL 498 fsl,pins = <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */
693 }; 499 };
694 500
695 pinctrl_hog2: hog2grp { 501 pinctrl_hog2: hog2grp {
696 fsl,pins = <IMX8QXP_CSI_MCLK_L 502 fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20>; /* SODIMM 75 */
697 }; 503 };
698 504
699 /* 505 /*
700 * This pin is used in the SCFW as a U 506 * This pin is used in the SCFW as a UART. Using it from
701 * Linux would require rewritting the 507 * Linux would require rewritting the SCFW board file.
702 */ 508 */
703 pinctrl_hog_scfw: hogscfwgrp { 509 pinctrl_hog_scfw: hogscfwgrp {
704 fsl,pins = <IMX8QXP_SCU_GPIO0_ 510 fsl,pins = <IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20>; /* SODIMM 144 */
705 }; 511 };
706 512
707 /* On Module I2C */ 513 /* On Module I2C */
708 pinctrl_i2c0: i2c0grp { 514 pinctrl_i2c0: i2c0grp {
709 fsl,pins = <IMX8QXP_MIPI_CSI0_ 515 fsl,pins = <IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021>,
710 <IMX8QXP_MIPI_CSI0_ 516 <IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021>;
711 }; 517 };
712 518
713 /* MIPI DSI I2C accessible on SODIMM ( 519 /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
714 pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0 520 pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp {
715 fsl,pins = <IMX8QXP_MIPI_DSI0_ 521 fsl,pins = <IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020>, /* SODIMM 140 */
716 <IMX8QXP_MIPI_DSI0_ 522 <IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020>; /* SODIMM 142 */
717 }; 523 };
718 524
719 /* MIPI CSI I2C accessible on SODIMM ( 525 /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
720 pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1 526 pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp {
721 fsl,pins = <IMX8QXP_MIPI_DSI1_ 527 fsl,pins = <IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020>, /* SODIMM 186 */
722 <IMX8QXP_MIPI_DSI1_ 528 <IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020>; /* SODIMM 188 */
723 }; 529 };
724 530
725 /* Colibri I2C */ 531 /* Colibri I2C */
726 pinctrl_i2c1: i2c1grp { 532 pinctrl_i2c1: i2c1grp {
727 fsl,pins = <IMX8QXP_MIPI_DSI0_ 533 fsl,pins = <IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021>, /* SODIMM 196 */
728 <IMX8QXP_MIPI_DSI0_ 534 <IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021>; /* SODIMM 194 */
729 }; 535 };
730 536
731 /* Colibri Parallel RGB LCD Interface 537 /* Colibri Parallel RGB LCD Interface */
732 pinctrl_lcdif: lcdifgrp { 538 pinctrl_lcdif: lcdifgrp {
733 fsl,pins = <IMX8QXP_MCLK_OUT0_ 539 fsl,pins = <IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60>, /* SODIMM 56 */
734 <IMX8QXP_SPI3_CS0_A 540 <IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60>, /* SODIMM 68 */
735 <IMX8QXP_MCLK_IN0_A 541 <IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60>, /* SODIMM 82 */
736 <IMX8QXP_MCLK_IN1_A 542 <IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x40>, /* SODIMM 44 */
737 <IMX8QXP_USDHC1_RES 543 <IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x40>, /* SODIMM 44 */
738 <IMX8QXP_ESAI0_FSR_ 544 <IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60>, /* SODIMM 76 */
739 <IMX8QXP_USDHC1_WP_ 545 <IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60>, /* SODIMM 76 */
740 <IMX8QXP_ESAI0_FST_ 546 <IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60>, /* SODIMM 70 */
741 <IMX8QXP_ESAI0_SCKR 547 <IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60>, /* SODIMM 60 */
742 <IMX8QXP_ESAI0_SCKT 548 <IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60>, /* SODIMM 58 */
743 <IMX8QXP_ESAI0_TX0_ 549 <IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60>, /* SODIMM 78 */
744 <IMX8QXP_ESAI0_TX1_ 550 <IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60>, /* SODIMM 72 */
745 <IMX8QXP_ESAI0_TX2_ 551 <IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60>, /* SODIMM 80 */
746 <IMX8QXP_ESAI0_TX3_ 552 <IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60>, /* SODIMM 46 */
747 <IMX8QXP_ESAI0_TX4_ 553 <IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60>, /* SODIMM 62 */
748 <IMX8QXP_ESAI0_TX5_ 554 <IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60>, /* SODIMM 48 */
749 <IMX8QXP_SPDIF0_RX_ 555 <IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60>, /* SODIMM 74 */
750 <IMX8QXP_SPDIF0_TX_ 556 <IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60>, /* SODIMM 50 */
751 <IMX8QXP_SPDIF0_EXT 557 <IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60>, /* SODIMM 52 */
752 <IMX8QXP_SPI3_SCK_A 558 <IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60>, /* SODIMM 54 */
753 <IMX8QXP_SPI3_SDO_A 559 <IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60>, /* SODIMM 66 */
754 <IMX8QXP_SPI3_SDI_A 560 <IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60>, /* SODIMM 64 */
755 <IMX8QXP_SPI3_CS1_A 561 <IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60>, /* SODIMM 57 */
756 <IMX8QXP_ENET0_RGMI 562 <IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60>, /* SODIMM 57 */
757 <IMX8QXP_UART1_CTS_ 563 <IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60>; /* SODIMM 61 */
758 }; 564 };
759 565
760 /* Colibri SPI */ 566 /* Colibri SPI */
761 pinctrl_lpspi2: lpspi2grp { 567 pinctrl_lpspi2: lpspi2grp {
762 fsl,pins = <IMX8QXP_SPI2_CS0_L 568 fsl,pins = <IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21>, /* SODIMM 86 */
763 <IMX8QXP_SPI2_SDO_A 569 <IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040>, /* SODIMM 92 */
764 <IMX8QXP_SPI2_SDI_A 570 <IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040>, /* SODIMM 90 */
765 <IMX8QXP_SPI2_SCK_A 571 <IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040>; /* SODIMM 88 */
766 }; 572 };
767 573
768 pinctrl_lpspi2_cs2: lpspi2cs2grp { 574 pinctrl_lpspi2_cs2: lpspi2cs2grp {
769 fsl,pins = <IMX8QXP_ENET0_RGMI 575 fsl,pins = <IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x21>; /* SODIMM 65 */
770 }; 576 };
771 577
772 /* Colibri UART_B */ 578 /* Colibri UART_B */
773 pinctrl_lpuart0: lpuart0grp { 579 pinctrl_lpuart0: lpuart0grp {
774 fsl,pins = <IMX8QXP_UART0_RX_A 580 fsl,pins = <IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020>, /* SODIMM 36 */
775 <IMX8QXP_UART0_TX_A 581 <IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020>, /* SODIMM 38 */
776 <IMX8QXP_FLEXCAN0_R 582 <IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020>, /* SODIMM 34 */
777 <IMX8QXP_FLEXCAN0_T 583 <IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020>; /* SODIMM 32 */
778 }; 584 };
779 585
780 /* Colibri UART_C */ 586 /* Colibri UART_C */
781 pinctrl_lpuart2: lpuart2grp { 587 pinctrl_lpuart2: lpuart2grp {
782 fsl,pins = <IMX8QXP_UART2_RX_A 588 fsl,pins = <IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020>, /* SODIMM 19 */
783 <IMX8QXP_UART2_TX_A 589 <IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020>; /* SODIMM 21 */
784 }; 590 };
785 591
786 /* Colibri UART_A */ 592 /* Colibri UART_A */
787 pinctrl_lpuart3: lpuart3grp { 593 pinctrl_lpuart3: lpuart3grp {
788 fsl,pins = <IMX8QXP_FLEXCAN2_R 594 fsl,pins = <IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020>, /* SODIMM 33 */
789 <IMX8QXP_FLEXCAN2_T 595 <IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020>; /* SODIMM 35 */
790 }; 596 };
791 597
792 /* Colibri UART_A Control */ 598 /* Colibri UART_A Control */
793 pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { 599 pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
794 fsl,pins = <IMX8QXP_MIPI_DSI1_ 600 fsl,pins = <IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20>, /* SODIMM 23 */
795 <IMX8QXP_SAI1_RXD_L 601 <IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20>, /* SODIMM 25 */
796 <IMX8QXP_SAI1_RXC_L 602 <IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20>, /* SODIMM 27 */
797 <IMX8QXP_CSI_RESET_ 603 <IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20>, /* SODIMM 29 */
798 <IMX8QXP_USDHC1_CD_ 604 <IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20>, /* SODIMM 31 */
799 <IMX8QXP_CSI_EN_LSI 605 <IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20>; /* SODIMM 37 */
800 }; 606 };
801 607
802 /* On module wifi module */ 608 /* On module wifi module */
803 pinctrl_pcieb: pciebgrp { 609 pinctrl_pcieb: pciebgrp {
804 fsl,pins = <IMX8QXP_PCIE_CTRL0 610 fsl,pins = <IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061>, /* SODIMM 178 */
805 <IMX8QXP_PCIE_CTRL0 611 <IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061>, /* SODIMM 94 */
806 <IMX8QXP_PCIE_CTRL0 612 <IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60>; /* SODIMM 81 */
807 }; 613 };
808 614
809 /* Colibri PWM_A */ 615 /* Colibri PWM_A */
810 pinctrl_pwm_a: pwmagrp { 616 pinctrl_pwm_a: pwmagrp {
811 /* both pins are connected together, r 617 /* both pins are connected together, reserve the unused CSI_D05 */
812 fsl,pins = <IMX8QXP_CSI_D05_CI 618 fsl,pins = <IMX8QXP_CSI_D05_CI_PI_D07 0x61>, /* SODIMM 59 */
813 <IMX8QXP_SPI0_CS1_A 619 <IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60>; /* SODIMM 59 */
814 }; 620 };
815 621
816 /* Colibri PWM_B */ 622 /* Colibri PWM_B */
817 pinctrl_pwm_b: pwmbgrp { 623 pinctrl_pwm_b: pwmbgrp {
818 fsl,pins = <IMX8QXP_UART1_TX_L 624 fsl,pins = <IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60>; /* SODIMM 28 */
819 }; 625 };
820 626
821 /* Colibri PWM_C */ 627 /* Colibri PWM_C */
822 pinctrl_pwm_c: pwmcgrp { 628 pinctrl_pwm_c: pwmcgrp {
823 fsl,pins = <IMX8QXP_UART1_RX_L 629 fsl,pins = <IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60>; /* SODIMM 30 */
824 }; 630 };
825 631
826 /* Colibri PWM_D */ 632 /* Colibri PWM_D */
827 pinctrl_pwm_d: pwmdgrp { 633 pinctrl_pwm_d: pwmdgrp {
828 /* both pins are connected together, r 634 /* both pins are connected together, reserve the unused CSI_D04 */
829 fsl,pins = <IMX8QXP_CSI_D04_CI 635 fsl,pins = <IMX8QXP_CSI_D04_CI_PI_D06 0x61>, /* SODIMM 67 */
830 <IMX8QXP_UART1_RTS_ 636 <IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60>; /* SODIMM 67 */
831 }; 637 };
832 638
833 /* On-module I2S */ 639 /* On-module I2S */
834 pinctrl_sai0: sai0grp { 640 pinctrl_sai0: sai0grp {
835 fsl,pins = <IMX8QXP_SPI0_SDI_A 641 fsl,pins = <IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040>,
836 <IMX8QXP_SPI0_CS0_A 642 <IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040>,
837 <IMX8QXP_SPI0_SCK_A 643 <IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040>,
838 <IMX8QXP_SPI0_SDO_A 644 <IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040>;
839 }; 645 };
840 646
841 /* Colibri Audio Analogue Microphone G 647 /* Colibri Audio Analogue Microphone GND */
842 pinctrl_sgtl5000: sgtl5000grp { 648 pinctrl_sgtl5000: sgtl5000grp {
843 fsl,pins = <IMX8QXP_MIPI_CSI0_ 649 fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41>;
844 }; 650 };
845 651
846 /* On-module SGTL5000 clock */ 652 /* On-module SGTL5000 clock */
847 pinctrl_sgtl5000_usb_clk: sgtl5000usbc 653 pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp {
848 fsl,pins = <IMX8QXP_ADC_IN3_AD 654 fsl,pins = <IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21>;
849 }; 655 };
850 656
851 /* On-module USB interrupt */ 657 /* On-module USB interrupt */
852 pinctrl_usb3503a: usb3503agrp { 658 pinctrl_usb3503a: usb3503agrp {
853 fsl,pins = <IMX8QXP_MIPI_CSI0_ 659 fsl,pins = <IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61>;
854 }; 660 };
855 661
856 /* Colibri USB Client Cable Detect */ 662 /* Colibri USB Client Cable Detect */
857 pinctrl_usbc_det: usbcdetgrp { 663 pinctrl_usbc_det: usbcdetgrp {
858 fsl,pins = <IMX8QXP_ENET0_REFC 664 fsl,pins = <IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040>; /* SODIMM 137 */
859 }; 665 };
860 666
861 /* USB Host Power Enable */ 667 /* USB Host Power Enable */
862 pinctrl_usbh1_reg: usbh1reggrp { 668 pinctrl_usbh1_reg: usbh1reggrp {
863 fsl,pins = <IMX8QXP_USB_SS3_TC 669 fsl,pins = <IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040>; /* SODIMM 129 */
864 }; 670 };
865 671
866 /* On-module eMMC */ 672 /* On-module eMMC */
867 pinctrl_usdhc1: usdhc1grp { 673 pinctrl_usdhc1: usdhc1grp {
868 fsl,pins = <IMX8QXP_EMMC0_CLK_ 674 fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>,
869 <IMX8QXP_EMMC0_CMD_ 675 <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21>,
870 <IMX8QXP_EMMC0_DATA 676 <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21>,
871 <IMX8QXP_EMMC0_DATA 677 <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21>,
872 <IMX8QXP_EMMC0_DATA 678 <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21>,
873 <IMX8QXP_EMMC0_DATA 679 <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21>,
874 <IMX8QXP_EMMC0_DATA 680 <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21>,
875 <IMX8QXP_EMMC0_DATA 681 <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21>,
876 <IMX8QXP_EMMC0_DATA 682 <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21>,
877 <IMX8QXP_EMMC0_DATA 683 <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21>,
878 <IMX8QXP_EMMC0_STRO 684 <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41>,
879 <IMX8QXP_EMMC0_RESE 685 <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21>;
880 }; 686 };
881 687
882 pinctrl_usdhc1_100mhz: usdhc1-100mhzgr 688 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
883 fsl,pins = <IMX8QXP_EMMC0_CLK_ 689 fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>,
884 <IMX8QXP_EMMC0_CMD_ 690 <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21>,
885 <IMX8QXP_EMMC0_DATA 691 <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21>,
886 <IMX8QXP_EMMC0_DATA 692 <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21>,
887 <IMX8QXP_EMMC0_DATA 693 <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21>,
888 <IMX8QXP_EMMC0_DATA 694 <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21>,
889 <IMX8QXP_EMMC0_DATA 695 <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21>,
890 <IMX8QXP_EMMC0_DATA 696 <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21>,
891 <IMX8QXP_EMMC0_DATA 697 <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21>,
892 <IMX8QXP_EMMC0_DATA 698 <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21>,
893 <IMX8QXP_EMMC0_STRO 699 <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41>,
894 <IMX8QXP_EMMC0_RESE 700 <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21>;
895 }; 701 };
896 702
897 pinctrl_usdhc1_200mhz: usdhc1-200mhzgr 703 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
898 fsl,pins = <IMX8QXP_EMMC0_CLK_ 704 fsl,pins = <IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>,
899 <IMX8QXP_EMMC0_CMD_ 705 <IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21>,
900 <IMX8QXP_EMMC0_DATA 706 <IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21>,
901 <IMX8QXP_EMMC0_DATA 707 <IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21>,
902 <IMX8QXP_EMMC0_DATA 708 <IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21>,
903 <IMX8QXP_EMMC0_DATA 709 <IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21>,
904 <IMX8QXP_EMMC0_DATA 710 <IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21>,
905 <IMX8QXP_EMMC0_DATA 711 <IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21>,
906 <IMX8QXP_EMMC0_DATA 712 <IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21>,
907 <IMX8QXP_EMMC0_DATA 713 <IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21>,
908 <IMX8QXP_EMMC0_STRO 714 <IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41>,
909 <IMX8QXP_EMMC0_RESE 715 <IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21>;
910 }; 716 };
911 717
912 /* Colibri SD/MMC Card Detect */ 718 /* Colibri SD/MMC Card Detect */
913 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 719 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
914 fsl,pins = <IMX8QXP_QSPI0A_DAT 720 fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021>; /* SODIMM 43 */
915 }; 721 };
916 722
917 pinctrl_usdhc2_gpio_sleep: usdhc2gpios 723 pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
918 fsl,pins = <IMX8QXP_QSPI0A_DAT 724 fsl,pins = <IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60>; /* SODIMM 43 */
919 }; 725 };
920 726
921 /* Colibri SD/MMC Card */ 727 /* Colibri SD/MMC Card */
922 pinctrl_usdhc2: usdhc2grp { 728 pinctrl_usdhc2: usdhc2grp {
923 fsl,pins = <IMX8QXP_USDHC1_CLK 729 fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, /* SODIMM 47 */
924 <IMX8QXP_USDHC1_CMD 730 <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21>, /* SODIMM 190 */
925 <IMX8QXP_USDHC1_DAT 731 <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21>, /* SODIMM 192 */
926 <IMX8QXP_USDHC1_DAT 732 <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21>, /* SODIMM 49 */
927 <IMX8QXP_USDHC1_DAT 733 <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21>, /* SODIMM 51 */
928 <IMX8QXP_USDHC1_DAT 734 <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21>, /* SODIMM 53 */
929 <IMX8QXP_USDHC1_VSE 735 <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>;
930 }; 736 };
931 737
932 pinctrl_usdhc2_100mhz: usdhc2-100mhzgr 738 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
933 fsl,pins = <IMX8QXP_USDHC1_CLK 739 fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, /* SODIMM 47 */
934 <IMX8QXP_USDHC1_CMD 740 <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21>, /* SODIMM 190 */
935 <IMX8QXP_USDHC1_DAT 741 <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21>, /* SODIMM 192 */
936 <IMX8QXP_USDHC1_DAT 742 <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21>, /* SODIMM 49 */
937 <IMX8QXP_USDHC1_DAT 743 <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21>, /* SODIMM 51 */
938 <IMX8QXP_USDHC1_DAT 744 <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21>, /* SODIMM 53 */
939 <IMX8QXP_USDHC1_VSE 745 <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>;
940 }; 746 };
941 747
942 pinctrl_usdhc2_200mhz: usdhc2-200mhzgr 748 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
943 fsl,pins = <IMX8QXP_USDHC1_CLK 749 fsl,pins = <IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, /* SODIMM 47 */
944 <IMX8QXP_USDHC1_CMD 750 <IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21>, /* SODIMM 190 */
945 <IMX8QXP_USDHC1_DAT 751 <IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21>, /* SODIMM 192 */
946 <IMX8QXP_USDHC1_DAT 752 <IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21>, /* SODIMM 49 */
947 <IMX8QXP_USDHC1_DAT 753 <IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21>, /* SODIMM 51 */
948 <IMX8QXP_USDHC1_DAT 754 <IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21>, /* SODIMM 53 */
949 <IMX8QXP_USDHC1_VSE 755 <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>;
950 }; 756 };
951 757
952 pinctrl_usdhc2_sleep: usdhc2slpgrp { 758 pinctrl_usdhc2_sleep: usdhc2slpgrp {
953 fsl,pins = <IMX8QXP_USDHC1_CLK 759 fsl,pins = <IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60>, /* SODIMM 47 */
954 <IMX8QXP_USDHC1_CMD 760 <IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60>, /* SODIMM 190 */
955 <IMX8QXP_USDHC1_DAT 761 <IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60>, /* SODIMM 192 */
956 <IMX8QXP_USDHC1_DAT 762 <IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60>, /* SODIMM 49 */
957 <IMX8QXP_USDHC1_DAT 763 <IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60>, /* SODIMM 51 */
958 <IMX8QXP_USDHC1_DAT 764 <IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60>, /* SODIMM 53 */
959 <IMX8QXP_USDHC1_VSE 765 <IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21>;
960 }; 766 };
961 767
962 pinctrl_wifi: wifigrp { 768 pinctrl_wifi: wifigrp {
963 fsl,pins = <IMX8QXP_SCU_BOOT_M 769 fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20>;
964 }; 770 };
965 }; 771 };
966 772
967 /* Delete peripherals which are not present on 773 /* Delete peripherals which are not present on SOC, but are defined in imx8-ss-*.dtsi */
968 774
969 /delete-node/ &adc1; 775 /delete-node/ &adc1;
970 /delete-node/ &adc1_lpcg; 776 /delete-node/ &adc1_lpcg;
971 /delete-node/ &dsp; 777 /delete-node/ &dsp;
972 /delete-node/ &dsp_lpcg; 778 /delete-node/ &dsp_lpcg;
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