1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* 2 /*
3 * QorIQ FMan v3 device tree 3 * QorIQ FMan v3 device tree
4 * 4 *
5 * Copyright 2012-2015 Freescale Semiconductor 5 * Copyright 2012-2015 Freescale Semiconductor Inc.
6 * 6 *
7 */ 7 */
8 8
9 #include <dt-bindings/clock/fsl,qoriq-clockgen 9 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
10 10
11 fman0: fman@1a00000 { 11 fman0: fman@1a00000 {
12 #address-cells = <1>; 12 #address-cells = <1>;
13 #size-cells = <1>; 13 #size-cells = <1>;
14 cell-index = <0>; 14 cell-index = <0>;
15 compatible = "fsl,fman"; 15 compatible = "fsl,fman";
16 ranges = <0x0 0x0 0x1a00000 0xfe000>; 16 ranges = <0x0 0x0 0x1a00000 0xfe000>;
17 reg = <0x0 0x1a00000 0x0 0xfe000>; 17 reg = <0x0 0x1a00000 0x0 0xfe000>;
18 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVE 18 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
19 <GIC_SPI 45 IRQ_TYPE_LEVE 19 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
20 clocks = <&clockgen QORIQ_CLK_FMAN 0>; 20 clocks = <&clockgen QORIQ_CLK_FMAN 0>;
21 clock-names = "fmanclk"; 21 clock-names = "fmanclk";
22 fsl,qman-channel-range = <0x800 0x10>; 22 fsl,qman-channel-range = <0x800 0x10>;
23 ptimer-handle = <&ptp_timer0>; 23 ptimer-handle = <&ptp_timer0>;
24 dma-coherent; 24 dma-coherent;
25 25
26 muram@0 { 26 muram@0 {
27 compatible = "fsl,fman-muram"; 27 compatible = "fsl,fman-muram";
28 reg = <0x0 0x60000>; 28 reg = <0x0 0x60000>;
29 }; 29 };
30 30
31 fman0_oh_0x2: port@82000 { 31 fman0_oh_0x2: port@82000 {
32 cell-index = <0x2>; 32 cell-index = <0x2>;
33 compatible = "fsl,fman-v3-port 33 compatible = "fsl,fman-v3-port-oh";
34 reg = <0x82000 0x1000>; 34 reg = <0x82000 0x1000>;
35 }; 35 };
36 36
37 fman0_oh_0x3: port@83000 { 37 fman0_oh_0x3: port@83000 {
38 cell-index = <0x3>; 38 cell-index = <0x3>;
39 compatible = "fsl,fman-v3-port 39 compatible = "fsl,fman-v3-port-oh";
40 reg = <0x83000 0x1000>; 40 reg = <0x83000 0x1000>;
41 }; 41 };
42 42
43 fman0_oh_0x4: port@84000 { 43 fman0_oh_0x4: port@84000 {
44 cell-index = <0x4>; 44 cell-index = <0x4>;
45 compatible = "fsl,fman-v3-port 45 compatible = "fsl,fman-v3-port-oh";
46 reg = <0x84000 0x1000>; 46 reg = <0x84000 0x1000>;
47 }; 47 };
48 48
49 fman0_oh_0x5: port@85000 { 49 fman0_oh_0x5: port@85000 {
50 cell-index = <0x5>; 50 cell-index = <0x5>;
51 compatible = "fsl,fman-v3-port 51 compatible = "fsl,fman-v3-port-oh";
52 reg = <0x85000 0x1000>; 52 reg = <0x85000 0x1000>;
53 }; 53 };
54 54
55 fman0_oh_0x6: port@86000 { 55 fman0_oh_0x6: port@86000 {
56 cell-index = <0x6>; 56 cell-index = <0x6>;
57 compatible = "fsl,fman-v3-port 57 compatible = "fsl,fman-v3-port-oh";
58 reg = <0x86000 0x1000>; 58 reg = <0x86000 0x1000>;
59 }; 59 };
60 60
61 fman0_oh_0x7: port@87000 { 61 fman0_oh_0x7: port@87000 {
62 cell-index = <0x7>; 62 cell-index = <0x7>;
63 compatible = "fsl,fman-v3-port 63 compatible = "fsl,fman-v3-port-oh";
64 reg = <0x87000 0x1000>; 64 reg = <0x87000 0x1000>;
65 }; 65 };
66 66
67 mdio0: mdio@fc000 { 67 mdio0: mdio@fc000 {
68 #address-cells = <1>; 68 #address-cells = <1>;
69 #size-cells = <0>; 69 #size-cells = <0>;
70 compatible = "fsl,fman-memac-m 70 compatible = "fsl,fman-memac-mdio";
71 reg = <0xfc000 0x1000>; 71 reg = <0xfc000 0x1000>;
72 }; 72 };
73 73
74 xmdio0: mdio@fd000 { 74 xmdio0: mdio@fd000 {
75 #address-cells = <1>; 75 #address-cells = <1>;
76 #size-cells = <0>; 76 #size-cells = <0>;
77 compatible = "fsl,fman-memac-m 77 compatible = "fsl,fman-memac-mdio";
78 reg = <0xfd000 0x1000>; 78 reg = <0xfd000 0x1000>;
79 }; 79 };
80 }; 80 };
81 81
82 ptp_timer0: ptp-timer@1afe000 { 82 ptp_timer0: ptp-timer@1afe000 {
83 compatible = "fsl,fman-ptp-timer"; 83 compatible = "fsl,fman-ptp-timer";
84 reg = <0x0 0x1afe000 0x0 0x1000>; 84 reg = <0x0 0x1afe000 0x0 0x1000>;
85 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVE 85 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
86 clocks = <&clockgen QORIQ_CLK_FMAN 0>; 86 clocks = <&clockgen QORIQ_CLK_FMAN 0>;
87 fsl,extts-fifo; 87 fsl,extts-fifo;
88 }; 88 };
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