1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Device Tree file for Globalscale Marvell ES 3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board
4 * Copyright (C) 2016 Marvell 4 * Copyright (C) 2016 Marvell
5 * 5 *
6 * Romain Perier <romain.perier@free-electrons. 6 * Romain Perier <romain.perier@free-electrons.com>
7 * 7 *
8 */ 8 */
9 /* 9 /*
10 * Schematic available at http://espressobin.n 10 * Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
11 */ 11 */
12 12
13 /dts-v1/; 13 /dts-v1/;
14 14
15 #include "armada-3720-espressobin.dtsi" !! 15 #include <dt-bindings/gpio/gpio.h>
>> 16 #include "armada-372x.dtsi"
16 17
17 / { 18 / {
18 model = "Globalscale Marvell ESPRESSOB 19 model = "Globalscale Marvell ESPRESSOBin Board";
19 compatible = "globalscale,espressobin" !! 20 compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";
>> 21
>> 22 chosen {
>> 23 stdout-path = "serial0:115200n8";
>> 24 };
>> 25
>> 26 memory@0 {
>> 27 device_type = "memory";
>> 28 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
>> 29 };
>> 30
>> 31 vcc_sd_reg1: regulator {
>> 32 compatible = "regulator-gpio";
>> 33 regulator-name = "vcc_sd1";
>> 34 regulator-min-microvolt = <1800000>;
>> 35 regulator-max-microvolt = <3300000>;
>> 36 regulator-boot-on;
>> 37
>> 38 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
>> 39 gpios-states = <0>;
>> 40 states = <1800000 0x1
>> 41 3300000 0x0>;
>> 42 enable-active-high;
>> 43 };
>> 44 };
>> 45
>> 46 /* J9 */
>> 47 &pcie0 {
>> 48 status = "okay";
>> 49 phys = <&comphy1 0>;
>> 50 pinctrl-names = "default";
>> 51 pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
>> 52 };
>> 53
>> 54 /* J6 */
>> 55 &sata {
>> 56 status = "okay";
>> 57 phys = <&comphy2 0>;
>> 58 phy-names = "sata-phy";
>> 59 };
>> 60
>> 61 /* J1 */
>> 62 &sdhci1 {
>> 63 wp-inverted;
>> 64 bus-width = <4>;
>> 65 cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
>> 66 marvell,pad-type = "sd";
>> 67 vqmmc-supply = <&vcc_sd_reg1>;
>> 68
>> 69 pinctrl-names = "default";
>> 70 pinctrl-0 = <&sdio_pins>;
>> 71 status = "okay";
>> 72 };
>> 73
>> 74 /* U11 */
>> 75 &sdhci0 {
>> 76 non-removable;
>> 77 bus-width = <8>;
>> 78 mmc-ddr-1_8v;
>> 79 mmc-hs400-1_8v;
>> 80 marvell,xenon-emmc;
>> 81 marvell,xenon-tun-count = <9>;
>> 82 marvell,pad-type = "fixed-1-8v";
>> 83
>> 84 pinctrl-names = "default";
>> 85 pinctrl-0 = <&mmc_pins>;
>> 86 /*
>> 87 * This eMMC is not populated on all boards, so disable it by
>> 88 * default and let the bootloader enable it, if it is present
>> 89 */
>> 90 status = "disabled";
>> 91 };
>> 92
>> 93 &spi0 {
>> 94 status = "okay";
>> 95
>> 96 flash@0 {
>> 97 reg = <0>;
>> 98 compatible = "winbond,w25q32dw", "jedec,spi-flash";
>> 99 spi-max-frequency = <104000000>;
>> 100 m25p,fast-read;
>> 101
>> 102 partitions {
>> 103 compatible = "fixed-partitions";
>> 104 #address-cells = <1>;
>> 105 #size-cells = <1>;
>> 106
>> 107 partition@0 {
>> 108 label = "uboot";
>> 109 reg = <0 0x180000>;
>> 110 };
>> 111
>> 112 partition@180000 {
>> 113 label = "ubootenv";
>> 114 reg = <0x180000 0x10000>;
>> 115 };
>> 116 };
>> 117 };
>> 118 };
>> 119
>> 120 /* Exported on the micro USB connector J5 through an FTDI */
>> 121 &uart0 {
>> 122 pinctrl-names = "default";
>> 123 pinctrl-0 = <&uart1_pins>;
>> 124 status = "okay";
>> 125 };
>> 126
>> 127 /*
>> 128 * Connector J17 and J18 expose a number of different features. Some pins are
>> 129 * multiplexed. This is the case for instance for the following features:
>> 130 * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
>> 131 * how to enable it. Beware that the signals are 1.8V TTL.
>> 132 * - I2C
>> 133 * - SPI
>> 134 * - MMC
>> 135 */
>> 136
>> 137 /* J7 */
>> 138 &usb3 {
>> 139 status = "okay";
>> 140 };
>> 141
>> 142 /* J8 */
>> 143 &usb2 {
>> 144 status = "okay";
>> 145 };
>> 146
>> 147 &mdio {
>> 148 switch0: switch0@1 {
>> 149 compatible = "marvell,mv88e6085";
>> 150 #address-cells = <1>;
>> 151 #size-cells = <0>;
>> 152 reg = <1>;
>> 153
>> 154 dsa,member = <0 0>;
>> 155
>> 156 ports {
>> 157 #address-cells = <1>;
>> 158 #size-cells = <0>;
>> 159
>> 160 port@0 {
>> 161 reg = <0>;
>> 162 label = "cpu";
>> 163 ethernet = <ð0>;
>> 164 phy-mode = "rgmii-id";
>> 165 fixed-link {
>> 166 speed = <1000>;
>> 167 full-duplex;
>> 168 };
>> 169 };
>> 170
>> 171 port@1 {
>> 172 reg = <1>;
>> 173 label = "wan";
>> 174 phy-handle = <&switch0phy0>;
>> 175 };
>> 176
>> 177 port@2 {
>> 178 reg = <2>;
>> 179 label = "lan0";
>> 180 phy-handle = <&switch0phy1>;
>> 181 };
>> 182
>> 183 port@3 {
>> 184 reg = <3>;
>> 185 label = "lan1";
>> 186 phy-handle = <&switch0phy2>;
>> 187 };
>> 188
>> 189 };
>> 190
>> 191 mdio {
>> 192 #address-cells = <1>;
>> 193 #size-cells = <0>;
>> 194
>> 195 switch0phy0: switch0phy0@11 {
>> 196 reg = <0x11>;
>> 197 };
>> 198 switch0phy1: switch0phy1@12 {
>> 199 reg = <0x12>;
>> 200 };
>> 201 switch0phy2: switch0phy2@13 {
>> 202 reg = <0x13>;
>> 203 };
>> 204 };
>> 205 };
>> 206 };
>> 207
>> 208 ð0 {
>> 209 pinctrl-names = "default";
>> 210 pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
>> 211 phy-mode = "rgmii-id";
>> 212 status = "okay";
>> 213
>> 214 fixed-link {
>> 215 speed = <1000>;
>> 216 full-duplex;
>> 217 };
20 }; 218 };
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