1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) <<
2 /* 1 /*
3 * Copyright (C) 2016 Marvell Technology Group 2 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 * 3 *
>> 4 * This file is dual-licensed: you can use it either under the terms
>> 5 * of the GPLv2 or the X11 license, at your option. Note that this dual
>> 6 * licensing only applies to this file, and not this project as a
>> 7 * whole.
>> 8 *
>> 9 * a) This library is free software; you can redistribute it and/or
>> 10 * modify it under the terms of the GNU General Public License as
>> 11 * published by the Free Software Foundation; either version 2 of the
>> 12 * License, or (at your option) any later version.
>> 13 *
>> 14 * This library is distributed in the hope that it will be useful,
>> 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> 17 * GNU General Public License for more details.
>> 18 *
>> 19 * Or, alternatively,
>> 20 *
>> 21 * b) Permission is hereby granted, free of charge, to any person
>> 22 * obtaining a copy of this software and associated documentation
>> 23 * files (the "Software"), to deal in the Software without
>> 24 * restriction, including without limitation the rights to use,
>> 25 * copy, modify, merge, publish, distribute, sublicense, and/or
>> 26 * sell copies of the Software, and to permit persons to whom the
>> 27 * Software is furnished to do so, subject to the following
>> 28 * conditions:
>> 29 *
>> 30 * The above copyright notice and this permission notice shall be
>> 31 * included in all copies or substantial portions of the Software.
>> 32 *
>> 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> 40 * OTHER DEALINGS IN THE SOFTWARE.
>> 41 */
>> 42
>> 43 /*
5 * Device Tree file for Marvell Armada 7040 De 44 * Device Tree file for Marvell Armada 7040 Development board platform
6 */ 45 */
7 46
8 #include <dt-bindings/gpio/gpio.h> <<
9 #include "armada-7040.dtsi" 47 #include "armada-7040.dtsi"
10 48
11 / { 49 / {
12 model = "Marvell Armada 7040 DB board" 50 model = "Marvell Armada 7040 DB board";
13 compatible = "marvell,armada7040-db", 51 compatible = "marvell,armada7040-db", "marvell,armada7040",
14 "marvell,armada-ap806-qua 52 "marvell,armada-ap806-quad", "marvell,armada-ap806";
15 53
16 chosen { 54 chosen {
17 stdout-path = "serial0:115200n 55 stdout-path = "serial0:115200n8";
18 }; 56 };
19 57
20 memory@0 { !! 58 memory@00000000 {
21 device_type = "memory"; 59 device_type = "memory";
22 reg = <0x0 0x0 0x0 0x80000000> 60 reg = <0x0 0x0 0x0 0x80000000>;
23 }; 61 };
24 <<
25 aliases { <<
26 ethernet0 = &cp0_eth0; <<
27 ethernet1 = &cp0_eth1; <<
28 ethernet2 = &cp0_eth2; <<
29 }; <<
30 <<
31 cp0_exp_usb3_0_current_regulator: gpio <<
32 compatible = "regulator-gpio"; <<
33 regulator-name = "cp0-usb3-0-c <<
34 regulator-type = "current"; <<
35 regulator-min-microamp = <5000 <<
36 regulator-max-microamp = <9000 <<
37 gpios = <&expander0 4 GPIO_ACT <<
38 states = <500000 0x0 <<
39 900000 0x1>; <<
40 enable-active-high; <<
41 gpios-states = <0>; <<
42 }; <<
43 <<
44 cp0_exp_usb3_1_current_regulator: gpio <<
45 compatible = "regulator-gpio"; <<
46 regulator-name = "cp0-usb3-1-c <<
47 regulator-type = "current"; <<
48 regulator-min-microamp = <5000 <<
49 regulator-max-microamp = <9000 <<
50 gpios = <&expander0 5 GPIO_ACT <<
51 states = <500000 0x0 <<
52 900000 0x1>; <<
53 enable-active-high; <<
54 gpios-states = <0>; <<
55 }; <<
56 <<
57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus { <<
58 compatible = "regulator-fixed" <<
59 regulator-name = "usb3h0-vbus" <<
60 regulator-min-microvolt = <500 <<
61 regulator-max-microvolt = <500 <<
62 enable-active-high; <<
63 gpio = <&expander0 0 GPIO_ACTI <<
64 vin-supply = <&cp0_exp_usb3_0_ <<
65 }; <<
66 <<
67 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus { <<
68 compatible = "regulator-fixed" <<
69 regulator-name = "usb3h1-vbus" <<
70 regulator-min-microvolt = <500 <<
71 regulator-max-microvolt = <500 <<
72 enable-active-high; <<
73 gpio = <&expander0 1 GPIO_ACTI <<
74 vin-supply = <&cp0_exp_usb3_1_ <<
75 }; <<
76 }; 62 };
77 63
78 &i2c0 { 64 &i2c0 {
79 status = "okay"; 65 status = "okay";
80 clock-frequency = <100000>; 66 clock-frequency = <100000>;
81 }; 67 };
82 68
83 &spi0 { 69 &spi0 {
84 status = "okay"; 70 status = "okay";
85 71
86 flash@0 { !! 72 spi-flash@0 {
>> 73 #address-cells = <1>;
>> 74 #size-cells = <1>;
87 compatible = "jedec,spi-nor"; 75 compatible = "jedec,spi-nor";
88 reg = <0>; 76 reg = <0>;
89 spi-max-frequency = <10000000> 77 spi-max-frequency = <10000000>;
90 78
91 partitions { 79 partitions {
92 compatible = "fixed-pa 80 compatible = "fixed-partitions";
93 #address-cells = <1>; 81 #address-cells = <1>;
94 #size-cells = <1>; 82 #size-cells = <1>;
95 83
96 partition@0 { 84 partition@0 {
97 label = "U-Boo 85 label = "U-Boot";
98 reg = <0 0x200 86 reg = <0 0x200000>;
99 }; 87 };
100 partition@400000 { 88 partition@400000 {
101 label = "Files 89 label = "Filesystem";
102 reg = <0x20000 90 reg = <0x200000 0xce0000>;
103 }; 91 };
104 }; 92 };
105 }; 93 };
106 }; 94 };
107 95
108 &uart0 { 96 &uart0 {
109 status = "okay"; 97 status = "okay";
110 pinctrl-0 = <&uart0_pins>; <<
111 pinctrl-names = "default"; <<
112 }; 98 };
113 99
114 100
115 &cp0_pcie2 { !! 101 &cpm_pcie2 {
116 status = "okay"; 102 status = "okay";
117 phys = <&cp0_comphy5 2>; <<
118 phy-names = "cp0-pcie2-x1-phy"; <<
119 }; 103 };
120 104
121 &cp0_i2c0 { !! 105 &cpm_i2c0 {
122 status = "okay"; 106 status = "okay";
123 clock-frequency = <100000>; 107 clock-frequency = <100000>;
124 <<
125 expander0: pca9555@21 { <<
126 compatible = "nxp,pca9555"; <<
127 pinctrl-names = "default"; <<
128 gpio-controller; <<
129 #gpio-cells = <2>; <<
130 reg = <0x21>; <<
131 /* <<
132 * IO0_0: USB3_PWR_EN0 IO1_0: <<
133 * IO0_1: USB3_PWR_EN1 IO1_1: <<
134 * IO0_2: DDR3_4_Detect IO1_2: <<
135 * IO0_3: USB2_DEVICE_DETECT <<
136 * IO0_4: GPIO_0 IO1_4: <<
137 * IO0_5: GPIO_1 IO1_5: <<
138 * IO0_6: IHB_5V_Enable IO1_6: <<
139 * IO0_7: IO1_7: <<
140 */ <<
141 }; <<
142 }; <<
143 <<
144 &cp0_nand_controller { <<
145 /* <<
146 * SPI on CPM and NAND have common pin <<
147 * use only one at a time. To enable t <<
148 * disable the SPI), the "status = "ok <<
149 * added here. <<
150 */ <<
151 pinctrl-0 = <&nand_pins>, <&nand_rb>; <<
152 pinctrl-names = "default"; <<
153 <<
154 nand@0 { <<
155 reg = <0>; <<
156 label = "pxa3xx_nand-0"; <<
157 nand-rb = <0>; <<
158 nand-on-flash-bbt; <<
159 nand-ecc-strength = <4>; <<
160 nand-ecc-step-size = <512>; <<
161 <<
162 partitions { <<
163 compatible = "fixed-pa <<
164 #address-cells = <1>; <<
165 #size-cells = <1>; <<
166 <<
167 partition@0 { <<
168 label = "U-Boo <<
169 reg = <0 0x200 <<
170 }; <<
171 <<
172 partition@200000 { <<
173 label = "Linux <<
174 reg = <0x20000 <<
175 }; <<
176 <<
177 partition@1000000 { <<
178 label = "Files <<
179 reg = <0x10000 <<
180 }; <<
181 <<
182 }; <<
183 }; <<
184 }; 108 };
185 109
186 &cp0_spi1 { !! 110 &cpm_spi1 {
187 status = "okay"; 111 status = "okay";
188 112
189 flash@0 { !! 113 spi-flash@0 {
>> 114 #address-cells = <0x1>;
>> 115 #size-cells = <0x1>;
190 compatible = "jedec,spi-nor"; 116 compatible = "jedec,spi-nor";
191 reg = <0x0>; 117 reg = <0x0>;
192 spi-max-frequency = <20000000> 118 spi-max-frequency = <20000000>;
193 119
194 partitions { 120 partitions {
195 compatible = "fixed-pa 121 compatible = "fixed-partitions";
196 #address-cells = <1>; 122 #address-cells = <1>;
197 #size-cells = <1>; 123 #size-cells = <1>;
198 124
199 partition@0 { 125 partition@0 {
200 label = "U-Boo 126 label = "U-Boot";
201 reg = <0x0 0x2 127 reg = <0x0 0x200000>;
202 }; 128 };
203 129
204 partition@400000 { 130 partition@400000 {
205 label = "Files 131 label = "Filesystem";
206 reg = <0x20000 132 reg = <0x200000 0xe00000>;
207 }; 133 };
208 }; 134 };
209 }; 135 };
210 }; 136 };
211 137
212 &cp0_sata0 { !! 138 &cpm_sata0 {
213 status = "okay"; 139 status = "okay";
214 <<
215 sata-port@1 { <<
216 phys = <&cp0_comphy3 1>; <<
217 phy-names = "cp0-sata0-1-phy"; <<
218 }; <<
219 }; 140 };
220 141
221 &cp0_utmi { !! 142 &cpm_usb3_0 {
222 status = "okay"; 143 status = "okay";
223 }; 144 };
224 145
225 &cp0_comphy1 { !! 146 &cpm_usb3_1 {
226 cp0_usbh0_con: connector { <<
227 compatible = "usb-a-connector" <<
228 phy-supply = <&cp0_reg_usb3_0_ <<
229 }; <<
230 }; <<
231 <<
232 &cp0_usb3_0 { <<
233 phys = <&cp0_comphy1 0>, <&cp0_utmi0>; <<
234 phy-names = "cp0-usb3h0-comphy", "utmi <<
235 dr_mode = "host"; <<
236 status = "okay"; <<
237 }; <<
238 <<
239 &cp0_comphy4 { <<
240 cp0_usbh1_con: connector { <<
241 compatible = "usb-a-connector" <<
242 phy-supply = <&cp0_reg_usb3_1_ <<
243 }; <<
244 }; <<
245 <<
246 &cp0_usb3_1 { <<
247 phys = <&cp0_comphy4 1>, <&cp0_utmi1>; <<
248 phy-names = "cp0-usb3h1-comphy", "utmi <<
249 dr_mode = "host"; <<
250 status = "okay"; 147 status = "okay";
251 }; 148 };
252 149
253 &ap_sdhci0 { 150 &ap_sdhci0 {
254 status = "okay"; 151 status = "okay";
255 bus-width = <4>; 152 bus-width = <4>;
256 no-1-8-v; 153 no-1-8-v;
257 non-removable; 154 non-removable;
258 }; 155 };
259 156
260 &cp0_sdhci0 { !! 157 &cpm_sdhci0 {
261 status = "okay"; 158 status = "okay";
262 bus-width = <4>; 159 bus-width = <4>;
263 no-1-8-v; 160 no-1-8-v;
264 cd-gpios = <&expander0 12 GPIO_ACTIVE_ !! 161 non-removable;
265 }; 162 };
266 163
267 &cp0_mdio { !! 164 &cpm_mdio {
268 status = "okay"; <<
269 <<
270 phy0: ethernet-phy@0 { 165 phy0: ethernet-phy@0 {
271 reg = <0>; 166 reg = <0>;
272 }; 167 };
273 phy1: ethernet-phy@1 { 168 phy1: ethernet-phy@1 {
274 reg = <1>; 169 reg = <1>;
275 }; 170 };
276 }; 171 };
277 172
278 &cp0_ethernet { !! 173 &cpm_ethernet {
279 status = "okay"; 174 status = "okay";
280 }; 175 };
281 176
282 &cp0_eth0 { !! 177 &cpm_eth1 {
283 status = "okay"; 178 status = "okay";
284 /* Network PHY */ <<
285 phy-mode = "10gbase-r"; <<
286 /* Generic PHY, providing serdes lanes <<
287 phys = <&cp0_comphy2 0>; <<
288 <<
289 fixed-link { <<
290 speed = <10000>; <<
291 full-duplex; <<
292 }; <<
293 }; <<
294 <<
295 &cp0_eth1 { <<
296 status = "okay"; <<
297 /* Network PHY */ <<
298 phy = <&phy0>; 179 phy = <&phy0>;
299 phy-mode = "sgmii"; 180 phy-mode = "sgmii";
300 /* Generic PHY, providing serdes lanes <<
301 phys = <&cp0_comphy0 1>; <<
302 }; 181 };
303 182
304 &cp0_eth2 { !! 183 &cpm_eth2 {
305 status = "okay"; 184 status = "okay";
306 phy = <&phy1>; 185 phy = <&phy1>;
307 phy-mode = "rgmii-id"; 186 phy-mode = "rgmii-id";
>> 187 };
>> 188
>> 189 &cpm_crypto {
>> 190 status = "okay";
308 }; 191 };
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