1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (C) 2016 Marvell Technology Group 3 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 * 4 *
5 * Device Tree file for Marvell Armada 7040 De 5 * Device Tree file for Marvell Armada 7040 Development board platform
6 */ 6 */
7 7
8 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/gpio/gpio.h>
9 #include "armada-7040.dtsi" 9 #include "armada-7040.dtsi"
10 10
11 / { 11 / {
12 model = "Marvell Armada 7040 DB board" 12 model = "Marvell Armada 7040 DB board";
13 compatible = "marvell,armada7040-db", 13 compatible = "marvell,armada7040-db", "marvell,armada7040",
14 "marvell,armada-ap806-qua 14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
15 15
16 chosen { 16 chosen {
17 stdout-path = "serial0:115200n 17 stdout-path = "serial0:115200n8";
18 }; 18 };
19 19
20 memory@0 { 20 memory@0 {
21 device_type = "memory"; 21 device_type = "memory";
22 reg = <0x0 0x0 0x0 0x80000000> 22 reg = <0x0 0x0 0x0 0x80000000>;
23 }; 23 };
24 24
25 aliases { 25 aliases {
26 ethernet0 = &cp0_eth0; 26 ethernet0 = &cp0_eth0;
27 ethernet1 = &cp0_eth1; 27 ethernet1 = &cp0_eth1;
28 ethernet2 = &cp0_eth2; 28 ethernet2 = &cp0_eth2;
29 }; 29 };
30 30
31 cp0_exp_usb3_0_current_regulator: gpio 31 cp0_exp_usb3_0_current_regulator: gpio-regulator {
32 compatible = "regulator-gpio"; 32 compatible = "regulator-gpio";
33 regulator-name = "cp0-usb3-0-c 33 regulator-name = "cp0-usb3-0-current-regulator";
34 regulator-type = "current"; 34 regulator-type = "current";
35 regulator-min-microamp = <5000 35 regulator-min-microamp = <500000>;
36 regulator-max-microamp = <9000 36 regulator-max-microamp = <900000>;
37 gpios = <&expander0 4 GPIO_ACT 37 gpios = <&expander0 4 GPIO_ACTIVE_HIGH>;
38 states = <500000 0x0 38 states = <500000 0x0
39 900000 0x1>; 39 900000 0x1>;
40 enable-active-high; 40 enable-active-high;
41 gpios-states = <0>; 41 gpios-states = <0>;
42 }; 42 };
43 43
44 cp0_exp_usb3_1_current_regulator: gpio 44 cp0_exp_usb3_1_current_regulator: gpio-regulator {
45 compatible = "regulator-gpio"; 45 compatible = "regulator-gpio";
46 regulator-name = "cp0-usb3-1-c 46 regulator-name = "cp0-usb3-1-current-regulator";
47 regulator-type = "current"; 47 regulator-type = "current";
48 regulator-min-microamp = <5000 48 regulator-min-microamp = <500000>;
49 regulator-max-microamp = <9000 49 regulator-max-microamp = <900000>;
50 gpios = <&expander0 5 GPIO_ACT 50 gpios = <&expander0 5 GPIO_ACTIVE_HIGH>;
51 states = <500000 0x0 51 states = <500000 0x0
52 900000 0x1>; 52 900000 0x1>;
53 enable-active-high; 53 enable-active-high;
54 gpios-states = <0>; 54 gpios-states = <0>;
55 }; 55 };
56 56
57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus { 57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
58 compatible = "regulator-fixed" 58 compatible = "regulator-fixed";
59 regulator-name = "usb3h0-vbus" 59 regulator-name = "usb3h0-vbus";
60 regulator-min-microvolt = <500 60 regulator-min-microvolt = <5000000>;
61 regulator-max-microvolt = <500 61 regulator-max-microvolt = <5000000>;
62 enable-active-high; 62 enable-active-high;
63 gpio = <&expander0 0 GPIO_ACTI 63 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
64 vin-supply = <&cp0_exp_usb3_0_ 64 vin-supply = <&cp0_exp_usb3_0_current_regulator>;
65 }; 65 };
66 66
67 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus { 67 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
68 compatible = "regulator-fixed" 68 compatible = "regulator-fixed";
69 regulator-name = "usb3h1-vbus" 69 regulator-name = "usb3h1-vbus";
70 regulator-min-microvolt = <500 70 regulator-min-microvolt = <5000000>;
71 regulator-max-microvolt = <500 71 regulator-max-microvolt = <5000000>;
72 enable-active-high; 72 enable-active-high;
73 gpio = <&expander0 1 GPIO_ACTI 73 gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
74 vin-supply = <&cp0_exp_usb3_1_ 74 vin-supply = <&cp0_exp_usb3_1_current_regulator>;
75 }; 75 };
>> 76
>> 77 cp0_usb3_0_phy: cp0-usb3-0-phy {
>> 78 compatible = "usb-nop-xceiv";
>> 79 vcc-supply = <&cp0_reg_usb3_0_vbus>;
>> 80 };
>> 81
>> 82 cp0_usb3_1_phy: cp0-usb3-1-phy {
>> 83 compatible = "usb-nop-xceiv";
>> 84 vcc-supply = <&cp0_reg_usb3_1_vbus>;
>> 85 };
76 }; 86 };
77 87
78 &i2c0 { 88 &i2c0 {
79 status = "okay"; 89 status = "okay";
80 clock-frequency = <100000>; 90 clock-frequency = <100000>;
81 }; 91 };
82 92
83 &spi0 { 93 &spi0 {
84 status = "okay"; 94 status = "okay";
85 95
86 flash@0 { !! 96 spi-flash@0 {
87 compatible = "jedec,spi-nor"; 97 compatible = "jedec,spi-nor";
88 reg = <0>; 98 reg = <0>;
89 spi-max-frequency = <10000000> 99 spi-max-frequency = <10000000>;
90 100
91 partitions { 101 partitions {
92 compatible = "fixed-pa 102 compatible = "fixed-partitions";
93 #address-cells = <1>; 103 #address-cells = <1>;
94 #size-cells = <1>; 104 #size-cells = <1>;
95 105
96 partition@0 { 106 partition@0 {
97 label = "U-Boo 107 label = "U-Boot";
98 reg = <0 0x200 108 reg = <0 0x200000>;
99 }; 109 };
100 partition@400000 { 110 partition@400000 {
101 label = "Files 111 label = "Filesystem";
102 reg = <0x20000 112 reg = <0x200000 0xce0000>;
103 }; 113 };
104 }; 114 };
105 }; 115 };
106 }; 116 };
107 117
108 &uart0 { 118 &uart0 {
109 status = "okay"; 119 status = "okay";
110 pinctrl-0 = <&uart0_pins>; 120 pinctrl-0 = <&uart0_pins>;
111 pinctrl-names = "default"; 121 pinctrl-names = "default";
112 }; 122 };
113 123
114 124
115 &cp0_pcie2 { 125 &cp0_pcie2 {
116 status = "okay"; 126 status = "okay";
117 phys = <&cp0_comphy5 2>; <<
118 phy-names = "cp0-pcie2-x1-phy"; <<
119 }; 127 };
120 128
121 &cp0_i2c0 { 129 &cp0_i2c0 {
122 status = "okay"; 130 status = "okay";
123 clock-frequency = <100000>; 131 clock-frequency = <100000>;
124 132
125 expander0: pca9555@21 { 133 expander0: pca9555@21 {
126 compatible = "nxp,pca9555"; 134 compatible = "nxp,pca9555";
127 pinctrl-names = "default"; 135 pinctrl-names = "default";
128 gpio-controller; 136 gpio-controller;
129 #gpio-cells = <2>; 137 #gpio-cells = <2>;
130 reg = <0x21>; 138 reg = <0x21>;
131 /* 139 /*
132 * IO0_0: USB3_PWR_EN0 IO1_0: 140 * IO0_0: USB3_PWR_EN0 IO1_0: USB_3_1_Dev_Detect
133 * IO0_1: USB3_PWR_EN1 IO1_1: 141 * IO0_1: USB3_PWR_EN1 IO1_1: USB2_1_current_limit
134 * IO0_2: DDR3_4_Detect IO1_2: 142 * IO0_2: DDR3_4_Detect IO1_2: Hcon_IO_RstN
135 * IO0_3: USB2_DEVICE_DETECT 143 * IO0_3: USB2_DEVICE_DETECT
136 * IO0_4: GPIO_0 IO1_4: 144 * IO0_4: GPIO_0 IO1_4: SD_Status
137 * IO0_5: GPIO_1 IO1_5: 145 * IO0_5: GPIO_1 IO1_5: LDO_5V_Enable
138 * IO0_6: IHB_5V_Enable IO1_6: 146 * IO0_6: IHB_5V_Enable IO1_6: PWR_EN_eMMC
139 * IO0_7: IO1_7: 147 * IO0_7: IO1_7: SDIO_Vcntrl
140 */ 148 */
141 }; 149 };
142 }; 150 };
143 151
144 &cp0_nand_controller { 152 &cp0_nand_controller {
145 /* 153 /*
146 * SPI on CPM and NAND have common pin 154 * SPI on CPM and NAND have common pins on this board. We can
147 * use only one at a time. To enable t 155 * use only one at a time. To enable the NAND (which will
148 * disable the SPI), the "status = "ok 156 * disable the SPI), the "status = "okay";" line have to be
149 * added here. 157 * added here.
150 */ 158 */
151 pinctrl-0 = <&nand_pins>, <&nand_rb>; 159 pinctrl-0 = <&nand_pins>, <&nand_rb>;
152 pinctrl-names = "default"; 160 pinctrl-names = "default";
153 161
154 nand@0 { 162 nand@0 {
155 reg = <0>; 163 reg = <0>;
156 label = "pxa3xx_nand-0"; 164 label = "pxa3xx_nand-0";
157 nand-rb = <0>; 165 nand-rb = <0>;
158 nand-on-flash-bbt; 166 nand-on-flash-bbt;
159 nand-ecc-strength = <4>; 167 nand-ecc-strength = <4>;
160 nand-ecc-step-size = <512>; 168 nand-ecc-step-size = <512>;
161 169
162 partitions { 170 partitions {
163 compatible = "fixed-pa 171 compatible = "fixed-partitions";
164 #address-cells = <1>; 172 #address-cells = <1>;
165 #size-cells = <1>; 173 #size-cells = <1>;
166 174
167 partition@0 { 175 partition@0 {
168 label = "U-Boo 176 label = "U-Boot";
169 reg = <0 0x200 177 reg = <0 0x200000>;
170 }; 178 };
171 179
172 partition@200000 { 180 partition@200000 {
173 label = "Linux 181 label = "Linux";
174 reg = <0x20000 182 reg = <0x200000 0xe00000>;
175 }; 183 };
176 184
177 partition@1000000 { 185 partition@1000000 {
178 label = "Files 186 label = "Filesystem";
179 reg = <0x10000 187 reg = <0x1000000 0x3f000000>;
180 }; 188 };
181 189
182 }; 190 };
183 }; 191 };
184 }; 192 };
185 193
186 &cp0_spi1 { 194 &cp0_spi1 {
187 status = "okay"; 195 status = "okay";
188 196
189 flash@0 { !! 197 spi-flash@0 {
190 compatible = "jedec,spi-nor"; 198 compatible = "jedec,spi-nor";
191 reg = <0x0>; 199 reg = <0x0>;
192 spi-max-frequency = <20000000> 200 spi-max-frequency = <20000000>;
193 201
194 partitions { 202 partitions {
195 compatible = "fixed-pa 203 compatible = "fixed-partitions";
196 #address-cells = <1>; 204 #address-cells = <1>;
197 #size-cells = <1>; 205 #size-cells = <1>;
198 206
199 partition@0 { 207 partition@0 {
200 label = "U-Boo 208 label = "U-Boot";
201 reg = <0x0 0x2 209 reg = <0x0 0x200000>;
202 }; 210 };
203 211
204 partition@400000 { 212 partition@400000 {
205 label = "Files 213 label = "Filesystem";
206 reg = <0x20000 214 reg = <0x200000 0xe00000>;
207 }; 215 };
208 }; 216 };
209 }; 217 };
210 }; 218 };
211 219
212 &cp0_sata0 { 220 &cp0_sata0 {
213 status = "okay"; 221 status = "okay";
214 <<
215 sata-port@1 { <<
216 phys = <&cp0_comphy3 1>; <<
217 phy-names = "cp0-sata0-1-phy"; <<
218 }; <<
219 }; <<
220 <<
221 &cp0_utmi { <<
222 status = "okay"; <<
223 }; <<
224 <<
225 &cp0_comphy1 { <<
226 cp0_usbh0_con: connector { <<
227 compatible = "usb-a-connector" <<
228 phy-supply = <&cp0_reg_usb3_0_ <<
229 }; <<
230 }; 222 };
231 223
232 &cp0_usb3_0 { 224 &cp0_usb3_0 {
233 phys = <&cp0_comphy1 0>, <&cp0_utmi0>; !! 225 usb-phy = <&cp0_usb3_0_phy>;
234 phy-names = "cp0-usb3h0-comphy", "utmi <<
235 dr_mode = "host"; <<
236 status = "okay"; 226 status = "okay";
237 }; 227 };
238 228
239 &cp0_comphy4 { <<
240 cp0_usbh1_con: connector { <<
241 compatible = "usb-a-connector" <<
242 phy-supply = <&cp0_reg_usb3_1_ <<
243 }; <<
244 }; <<
245 <<
246 &cp0_usb3_1 { 229 &cp0_usb3_1 {
247 phys = <&cp0_comphy4 1>, <&cp0_utmi1>; !! 230 usb-phy = <&cp0_usb3_1_phy>;
248 phy-names = "cp0-usb3h1-comphy", "utmi <<
249 dr_mode = "host"; <<
250 status = "okay"; 231 status = "okay";
251 }; 232 };
252 233
253 &ap_sdhci0 { 234 &ap_sdhci0 {
254 status = "okay"; 235 status = "okay";
255 bus-width = <4>; 236 bus-width = <4>;
256 no-1-8-v; 237 no-1-8-v;
257 non-removable; 238 non-removable;
258 }; 239 };
259 240
260 &cp0_sdhci0 { 241 &cp0_sdhci0 {
261 status = "okay"; 242 status = "okay";
262 bus-width = <4>; 243 bus-width = <4>;
263 no-1-8-v; 244 no-1-8-v;
264 cd-gpios = <&expander0 12 GPIO_ACTIVE_ 245 cd-gpios = <&expander0 12 GPIO_ACTIVE_LOW>;
265 }; 246 };
266 247
267 &cp0_mdio { 248 &cp0_mdio {
268 status = "okay"; 249 status = "okay";
269 250
270 phy0: ethernet-phy@0 { 251 phy0: ethernet-phy@0 {
271 reg = <0>; 252 reg = <0>;
272 }; 253 };
273 phy1: ethernet-phy@1 { 254 phy1: ethernet-phy@1 {
274 reg = <1>; 255 reg = <1>;
275 }; 256 };
276 }; 257 };
277 258
278 &cp0_ethernet { 259 &cp0_ethernet {
279 status = "okay"; 260 status = "okay";
280 }; 261 };
281 262
282 &cp0_eth0 { 263 &cp0_eth0 {
283 status = "okay"; 264 status = "okay";
284 /* Network PHY */ 265 /* Network PHY */
285 phy-mode = "10gbase-r"; !! 266 phy-mode = "10gbase-kr";
286 /* Generic PHY, providing serdes lanes 267 /* Generic PHY, providing serdes lanes */
287 phys = <&cp0_comphy2 0>; 268 phys = <&cp0_comphy2 0>;
288 269
289 fixed-link { 270 fixed-link {
290 speed = <10000>; 271 speed = <10000>;
291 full-duplex; 272 full-duplex;
292 }; 273 };
293 }; 274 };
294 275
295 &cp0_eth1 { 276 &cp0_eth1 {
296 status = "okay"; 277 status = "okay";
297 /* Network PHY */ 278 /* Network PHY */
298 phy = <&phy0>; 279 phy = <&phy0>;
299 phy-mode = "sgmii"; 280 phy-mode = "sgmii";
300 /* Generic PHY, providing serdes lanes 281 /* Generic PHY, providing serdes lanes */
301 phys = <&cp0_comphy0 1>; 282 phys = <&cp0_comphy0 1>;
302 }; 283 };
303 284
304 &cp0_eth2 { 285 &cp0_eth2 {
305 status = "okay"; 286 status = "okay";
306 phy = <&phy1>; 287 phy = <&phy1>;
307 phy-mode = "rgmii-id"; 288 phy-mode = "rgmii-id";
308 }; 289 };
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