1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) <<
2 /* 1 /*
3 * Copyright (C) 2016 Marvell Technology Group 2 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 * 3 *
>> 4 * This file is dual-licensed: you can use it either under the terms
>> 5 * of the GPLv2 or the X11 license, at your option. Note that this dual
>> 6 * licensing only applies to this file, and not this project as a
>> 7 * whole.
>> 8 *
>> 9 * a) This library is free software; you can redistribute it and/or
>> 10 * modify it under the terms of the GNU General Public License as
>> 11 * published by the Free Software Foundation; either version 2 of the
>> 12 * License, or (at your option) any later version.
>> 13 *
>> 14 * This library is distributed in the hope that it will be useful,
>> 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> 17 * GNU General Public License for more details.
>> 18 *
>> 19 * Or, alternatively,
>> 20 *
>> 21 * b) Permission is hereby granted, free of charge, to any person
>> 22 * obtaining a copy of this software and associated documentation
>> 23 * files (the "Software"), to deal in the Software without
>> 24 * restriction, including without limitation the rights to use,
>> 25 * copy, modify, merge, publish, distribute, sublicense, and/or
>> 26 * sell copies of the Software, and to permit persons to whom the
>> 27 * Software is furnished to do so, subject to the following
>> 28 * conditions:
>> 29 *
>> 30 * The above copyright notice and this permission notice shall be
>> 31 * included in all copies or substantial portions of the Software.
>> 32 *
>> 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> 40 * OTHER DEALINGS IN THE SOFTWARE.
>> 41 */
>> 42
>> 43 /*
5 * Device Tree file for MACCHIATOBin Armada 80 44 * Device Tree file for MACCHIATOBin Armada 8040 community board platform
6 */ 45 */
7 46
8 #include "armada-8040-mcbin.dtsi" !! 47 #include "armada-8040.dtsi"
>> 48
>> 49 #include <dt-bindings/gpio/gpio.h>
9 50
10 / { 51 / {
11 model = "Marvell 8040 MACCHIATOBin Dou !! 52 model = "Marvell 8040 MACHIATOBin";
12 compatible = "marvell,armada8040-mcbin !! 53 compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
13 "marvell,armada8040-mc <<
14 "marvell,armada-ap806- 54 "marvell,armada-ap806-quad", "marvell,armada-ap806";
>> 55
>> 56 chosen {
>> 57 stdout-path = "serial0:115200n8";
>> 58 };
>> 59
>> 60 memory@00000000 {
>> 61 device_type = "memory";
>> 62 reg = <0x0 0x0 0x0 0x80000000>;
>> 63 };
>> 64
>> 65 aliases {
>> 66 ethernet0 = &cpm_eth0;
>> 67 ethernet1 = &cps_eth0;
>> 68 ethernet2 = &cps_eth1;
>> 69 };
>> 70
>> 71 /* Regulator labels correspond with schematics */
>> 72 v_3_3: regulator-3-3v {
>> 73 compatible = "regulator-fixed";
>> 74 regulator-name = "v_3_3";
>> 75 regulator-min-microvolt = <3300000>;
>> 76 regulator-max-microvolt = <3300000>;
>> 77 regulator-always-on;
>> 78 status = "okay";
>> 79 };
>> 80
>> 81 v_vddo_h: regulator-1-8v {
>> 82 compatible = "regulator-fixed";
>> 83 regulator-name = "v_vddo_h";
>> 84 regulator-min-microvolt = <1800000>;
>> 85 regulator-max-microvolt = <1800000>;
>> 86 regulator-always-on;
>> 87 status = "okay";
>> 88 };
>> 89
>> 90 v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
>> 91 compatible = "regulator-fixed";
>> 92 enable-active-high;
>> 93 gpio = <&cpm_gpio2 15 GPIO_ACTIVE_HIGH>;
>> 94 pinctrl-names = "default";
>> 95 pinctrl-0 = <&cpm_xhci_vbus_pins>;
>> 96 regulator-name = "v_5v0_usb3_hst_vbus";
>> 97 regulator-min-microvolt = <5000000>;
>> 98 regulator-max-microvolt = <5000000>;
>> 99 status = "okay";
>> 100 };
>> 101
>> 102 usb3h0_phy: usb3_phy0 {
>> 103 compatible = "usb-nop-xceiv";
>> 104 vcc-supply = <&v_5v0_usb3_hst_vbus>;
>> 105 };
15 }; 106 };
16 107
17 &cp0_xmdio { !! 108 &uart0 {
>> 109 status = "okay";
>> 110 };
>> 111
>> 112 &ap_sdhci0 {
>> 113 bus-width = <8>;
>> 114 /*
>> 115 * Not stable in HS modes - phy needs "more calibration", so add
>> 116 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
>> 117 */
>> 118 marvell,xenon-phy-slow-mode;
>> 119 no-1-8-v;
>> 120 no-sd;
>> 121 no-sdio;
>> 122 non-removable;
>> 123 status = "okay";
>> 124 vqmmc-supply = <&v_vddo_h>;
>> 125 };
>> 126
>> 127 &cpm_i2c0 {
>> 128 clock-frequency = <100000>;
>> 129 pinctrl-names = "default";
>> 130 pinctrl-0 = <&cpm_i2c0_pins>;
>> 131 status = "okay";
>> 132 };
>> 133
>> 134 &cpm_i2c1 {
>> 135 clock-frequency = <100000>;
>> 136 pinctrl-names = "default";
>> 137 pinctrl-0 = <&cpm_i2c1_pins>;
>> 138 status = "okay";
>> 139
>> 140 i2c-switch@70 {
>> 141 compatible = "nxp,pca9548";
>> 142 #address-cells = <1>;
>> 143 #size-cells = <0>;
>> 144 reg = <0x70>;
>> 145
>> 146 sfpp0_i2c: i2c@0 {
>> 147 #address-cells = <1>;
>> 148 #size-cells = <0>;
>> 149 reg = <0>;
>> 150 };
>> 151 sfpp1_i2c: i2c@1 {
>> 152 #address-cells = <1>;
>> 153 #size-cells = <0>;
>> 154 reg = <1>;
>> 155 };
>> 156 sfp_1g_i2c: i2c@2 {
>> 157 #address-cells = <1>;
>> 158 #size-cells = <0>;
>> 159 reg = <2>;
>> 160 };
>> 161 };
>> 162 };
>> 163
>> 164 &cpm_mdio {
>> 165 pinctrl-names = "default";
>> 166 pinctrl-0 = <&cpm_ge_mdio_pins>;
>> 167 status = "okay";
>> 168
>> 169 ge_phy: ethernet-phy@0 {
>> 170 reg = <0>;
>> 171 };
>> 172 };
>> 173
>> 174 &cpm_pcie0 {
>> 175 pinctrl-names = "default";
>> 176 pinctrl-0 = <&cpm_pcie_pins>;
>> 177 num-lanes = <4>;
>> 178 num-viewport = <8>;
>> 179 reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_LOW>;
>> 180 status = "okay";
>> 181 };
>> 182
>> 183 &cpm_pinctrl {
>> 184 cpm_ge_mdio_pins: ge-mdio-pins {
>> 185 marvell,pins = "mpp32", "mpp34";
>> 186 marvell,function = "ge";
>> 187 };
>> 188 cpm_i2c1_pins: i2c1-pins {
>> 189 marvell,pins = "mpp35", "mpp36";
>> 190 marvell,function = "i2c1";
>> 191 };
>> 192 cpm_i2c0_pins: i2c0-pins {
>> 193 marvell,pins = "mpp37", "mpp38";
>> 194 marvell,function = "i2c0";
>> 195 };
>> 196 cpm_xhci_vbus_pins: xhci0-vbus-pins {
>> 197 marvell,pins = "mpp47";
>> 198 marvell,function = "gpio";
>> 199 };
>> 200 cpm_pcie_pins: pcie-pins {
>> 201 marvell,pins = "mpp52";
>> 202 marvell,function = "gpio";
>> 203 };
>> 204 cpm_sdhci_pins: sdhci-pins {
>> 205 marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
>> 206 "mpp60", "mpp61";
>> 207 marvell,function = "sdio";
>> 208 };
>> 209 };
>> 210
>> 211 &cpm_xmdio {
18 status = "okay"; 212 status = "okay";
19 213
20 phy0: ethernet-phy@0 { 214 phy0: ethernet-phy@0 {
21 compatible = "ethernet-phy-iee 215 compatible = "ethernet-phy-ieee802.3-c45";
22 reg = <0>; 216 reg = <0>;
23 sfp = <&sfp_eth0>; <<
24 }; 217 };
25 218
26 phy8: ethernet-phy@8 { 219 phy8: ethernet-phy@8 {
27 compatible = "ethernet-phy-iee 220 compatible = "ethernet-phy-ieee802.3-c45";
28 reg = <8>; 221 reg = <8>;
29 sfp = <&sfp_eth1>; <<
30 }; 222 };
31 }; 223 };
32 224
33 &cp0_eth0 { !! 225 &cpm_ethernet {
>> 226 status = "okay";
>> 227 };
>> 228
>> 229 &cpm_eth0 {
34 status = "okay"; 230 status = "okay";
35 /* Network PHY */ 231 /* Network PHY */
36 phy = <&phy0>; 232 phy = <&phy0>;
37 phy-mode = "10gbase-r"; !! 233 phy-mode = "10gbase-kr";
>> 234 /* Generic PHY, providing serdes lanes */
>> 235 phys = <&cpm_comphy4 0>;
>> 236 };
>> 237
>> 238 &cpm_sata0 {
>> 239 /* CPM Lane 0 - U29 */
>> 240 status = "okay";
>> 241 };
>> 242
>> 243 &cpm_sdhci0 {
>> 244 /* U6 */
>> 245 broken-cd;
>> 246 bus-width = <4>;
>> 247 pinctrl-names = "default";
>> 248 pinctrl-0 = <&cpm_sdhci_pins>;
>> 249 status = "okay";
>> 250 vqmmc-supply = <&v_3_3>;
>> 251 };
>> 252
>> 253 &cpm_usb3_0 {
>> 254 /* J38? - USB2.0 only */
>> 255 status = "okay";
>> 256 };
>> 257
>> 258 &cpm_usb3_1 {
>> 259 /* J38? - USB2.0 only */
>> 260 status = "okay";
>> 261 };
>> 262
>> 263 &cps_ethernet {
>> 264 status = "okay";
38 }; 265 };
39 266
40 &cp1_eth0 { !! 267 &cps_eth0 {
41 status = "okay"; 268 status = "okay";
42 /* Network PHY */ 269 /* Network PHY */
43 phy = <&phy8>; 270 phy = <&phy8>;
44 phy-mode = "10gbase-r"; !! 271 phy-mode = "10gbase-kr";
>> 272 /* Generic PHY, providing serdes lanes */
>> 273 phys = <&cps_comphy4 0>;
>> 274 };
>> 275
>> 276 &cps_eth1 {
>> 277 /* CPS Lane 0 - J5 (Gigabit RJ45) */
>> 278 status = "okay";
>> 279 /* Network PHY */
>> 280 phy = <&ge_phy>;
>> 281 phy-mode = "sgmii";
>> 282 /* Generic PHY, providing serdes lanes */
>> 283 phys = <&cps_comphy0 1>;
>> 284 };
>> 285
>> 286 &cps_pinctrl {
>> 287 cps_spi1_pins: spi1-pins {
>> 288 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
>> 289 marvell,function = "spi1";
>> 290 };
>> 291 };
>> 292
>> 293 &cps_sata0 {
>> 294 /* CPS Lane 1 - U32 */
>> 295 /* CPS Lane 3 - U31 */
>> 296 status = "okay";
>> 297 };
>> 298
>> 299 &cps_spi1 {
>> 300 pinctrl-names = "default";
>> 301 pinctrl-0 = <&cps_spi1_pins>;
>> 302 status = "okay";
>> 303
>> 304 spi-flash@0 {
>> 305 compatible = "st,w25q32";
>> 306 spi-max-frequency = <50000000>;
>> 307 reg = <0>;
>> 308 };
>> 309 };
>> 310
>> 311 &cps_usb3_0 {
>> 312 /* CPS Lane 2 - CON7 */
>> 313 usb-phy = <&usb3h0_phy>;
>> 314 status = "okay";
45 }; 315 };
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