1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (C) 2016 Marvell Technology Group 3 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 * 4 *
5 * Device Tree file for MACCHIATOBin Armada 80 5 * Device Tree file for MACCHIATOBin Armada 8040 community board platform
6 */ 6 */
7 7
8 #include "armada-8040-mcbin.dtsi" !! 8 #include "armada-8040.dtsi"
>> 9
>> 10 #include <dt-bindings/gpio/gpio.h>
9 11
10 / { 12 / {
11 model = "Marvell 8040 MACCHIATOBin Dou !! 13 model = "Marvell 8040 MACCHIATOBin";
12 compatible = "marvell,armada8040-mcbin !! 14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
13 "marvell,armada8040-mc <<
14 "marvell,armada-ap806- 15 "marvell,armada-ap806-quad", "marvell,armada-ap806";
>> 16
>> 17 chosen {
>> 18 stdout-path = "serial0:115200n8";
>> 19 };
>> 20
>> 21 memory@0 {
>> 22 device_type = "memory";
>> 23 reg = <0x0 0x0 0x0 0x80000000>;
>> 24 };
>> 25
>> 26 aliases {
>> 27 ethernet0 = &cp0_eth0;
>> 28 ethernet1 = &cp1_eth0;
>> 29 ethernet2 = &cp1_eth1;
>> 30 };
>> 31
>> 32 /* Regulator labels correspond with schematics */
>> 33 v_3_3: regulator-3-3v {
>> 34 compatible = "regulator-fixed";
>> 35 regulator-name = "v_3_3";
>> 36 regulator-min-microvolt = <3300000>;
>> 37 regulator-max-microvolt = <3300000>;
>> 38 regulator-always-on;
>> 39 status = "okay";
>> 40 };
>> 41
>> 42 v_vddo_h: regulator-1-8v {
>> 43 compatible = "regulator-fixed";
>> 44 regulator-name = "v_vddo_h";
>> 45 regulator-min-microvolt = <1800000>;
>> 46 regulator-max-microvolt = <1800000>;
>> 47 regulator-always-on;
>> 48 status = "okay";
>> 49 };
>> 50
>> 51 v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
>> 52 compatible = "regulator-fixed";
>> 53 enable-active-high;
>> 54 gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
>> 55 pinctrl-names = "default";
>> 56 pinctrl-0 = <&cp0_xhci_vbus_pins>;
>> 57 regulator-name = "v_5v0_usb3_hst_vbus";
>> 58 regulator-min-microvolt = <5000000>;
>> 59 regulator-max-microvolt = <5000000>;
>> 60 status = "okay";
>> 61 };
>> 62
>> 63 usb3h0_phy: usb3_phy0 {
>> 64 compatible = "usb-nop-xceiv";
>> 65 vcc-supply = <&v_5v0_usb3_hst_vbus>;
>> 66 };
>> 67 };
>> 68
>> 69 &uart0 {
>> 70 status = "okay";
>> 71 pinctrl-0 = <&uart0_pins>;
>> 72 pinctrl-names = "default";
>> 73 };
>> 74
>> 75 &ap_sdhci0 {
>> 76 bus-width = <8>;
>> 77 /*
>> 78 * Not stable in HS modes - phy needs "more calibration", so add
>> 79 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
>> 80 */
>> 81 marvell,xenon-phy-slow-mode;
>> 82 no-1-8-v;
>> 83 no-sd;
>> 84 no-sdio;
>> 85 non-removable;
>> 86 status = "okay";
>> 87 vqmmc-supply = <&v_vddo_h>;
>> 88 };
>> 89
>> 90 &cp0_i2c0 {
>> 91 clock-frequency = <100000>;
>> 92 pinctrl-names = "default";
>> 93 pinctrl-0 = <&cp0_i2c0_pins>;
>> 94 status = "okay";
>> 95 };
>> 96
>> 97 &cp0_i2c1 {
>> 98 clock-frequency = <100000>;
>> 99 pinctrl-names = "default";
>> 100 pinctrl-0 = <&cp0_i2c1_pins>;
>> 101 status = "okay";
>> 102
>> 103 i2c-switch@70 {
>> 104 compatible = "nxp,pca9548";
>> 105 #address-cells = <1>;
>> 106 #size-cells = <0>;
>> 107 reg = <0x70>;
>> 108
>> 109 sfpp0_i2c: i2c@0 {
>> 110 #address-cells = <1>;
>> 111 #size-cells = <0>;
>> 112 reg = <0>;
>> 113 };
>> 114 sfpp1_i2c: i2c@1 {
>> 115 #address-cells = <1>;
>> 116 #size-cells = <0>;
>> 117 reg = <1>;
>> 118 };
>> 119 sfp_1g_i2c: i2c@2 {
>> 120 #address-cells = <1>;
>> 121 #size-cells = <0>;
>> 122 reg = <2>;
>> 123 };
>> 124 };
>> 125 };
>> 126
>> 127 /* J25 UART header */
>> 128 &cp0_uart1 {
>> 129 pinctrl-names = "default";
>> 130 pinctrl-0 = <&cp0_uart1_pins>;
>> 131 status = "okay";
>> 132 };
>> 133
>> 134 &cp0_mdio {
>> 135 pinctrl-names = "default";
>> 136 pinctrl-0 = <&cp0_ge_mdio_pins>;
>> 137 status = "okay";
>> 138
>> 139 ge_phy: ethernet-phy@0 {
>> 140 reg = <0>;
>> 141 };
>> 142 };
>> 143
>> 144 &cp0_pcie0 {
>> 145 pinctrl-names = "default";
>> 146 pinctrl-0 = <&cp0_pcie_pins>;
>> 147 num-lanes = <4>;
>> 148 num-viewport = <8>;
>> 149 reset-gpio = <&cp0_gpio1 20 GPIO_ACTIVE_LOW>;
>> 150 status = "okay";
>> 151 };
>> 152
>> 153 &cp0_pinctrl {
>> 154 cp0_ge_mdio_pins: ge-mdio-pins {
>> 155 marvell,pins = "mpp32", "mpp34";
>> 156 marvell,function = "ge";
>> 157 };
>> 158 cp0_i2c1_pins: i2c1-pins {
>> 159 marvell,pins = "mpp35", "mpp36";
>> 160 marvell,function = "i2c1";
>> 161 };
>> 162 cp0_i2c0_pins: i2c0-pins {
>> 163 marvell,pins = "mpp37", "mpp38";
>> 164 marvell,function = "i2c0";
>> 165 };
>> 166 cp0_uart1_pins: uart1-pins {
>> 167 marvell,pins = "mpp40", "mpp41";
>> 168 marvell,function = "uart1";
>> 169 };
>> 170 cp0_xhci_vbus_pins: xhci0-vbus-pins {
>> 171 marvell,pins = "mpp47";
>> 172 marvell,function = "gpio";
>> 173 };
>> 174 cp0_pcie_pins: pcie-pins {
>> 175 marvell,pins = "mpp52";
>> 176 marvell,function = "gpio";
>> 177 };
>> 178 cp0_sdhci_pins: sdhci-pins {
>> 179 marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
>> 180 "mpp60", "mpp61";
>> 181 marvell,function = "sdio";
>> 182 };
15 }; 183 };
16 184
17 &cp0_xmdio { 185 &cp0_xmdio {
18 status = "okay"; 186 status = "okay";
19 187
20 phy0: ethernet-phy@0 { 188 phy0: ethernet-phy@0 {
21 compatible = "ethernet-phy-iee 189 compatible = "ethernet-phy-ieee802.3-c45";
22 reg = <0>; 190 reg = <0>;
23 sfp = <&sfp_eth0>; <<
24 }; 191 };
25 192
26 phy8: ethernet-phy@8 { 193 phy8: ethernet-phy@8 {
27 compatible = "ethernet-phy-iee 194 compatible = "ethernet-phy-ieee802.3-c45";
28 reg = <8>; 195 reg = <8>;
29 sfp = <&sfp_eth1>; <<
30 }; 196 };
31 }; 197 };
32 198
>> 199 &cp0_ethernet {
>> 200 status = "okay";
>> 201 };
>> 202
33 &cp0_eth0 { 203 &cp0_eth0 {
34 status = "okay"; 204 status = "okay";
35 /* Network PHY */ 205 /* Network PHY */
36 phy = <&phy0>; 206 phy = <&phy0>;
37 phy-mode = "10gbase-r"; !! 207 phy-mode = "10gbase-kr";
>> 208 /* Generic PHY, providing serdes lanes */
>> 209 phys = <&cp0_comphy4 0>;
>> 210 };
>> 211
>> 212 &cp0_sata0 {
>> 213 /* CPM Lane 0 - U29 */
>> 214 status = "okay";
>> 215 };
>> 216
>> 217 &cp0_sdhci0 {
>> 218 /* U6 */
>> 219 broken-cd;
>> 220 bus-width = <4>;
>> 221 pinctrl-names = "default";
>> 222 pinctrl-0 = <&cp0_sdhci_pins>;
>> 223 status = "okay";
>> 224 vqmmc-supply = <&v_3_3>;
>> 225 };
>> 226
>> 227 &cp0_usb3_0 {
>> 228 /* J38? - USB2.0 only */
>> 229 status = "okay";
>> 230 };
>> 231
>> 232 &cp0_usb3_1 {
>> 233 /* J38? - USB2.0 only */
>> 234 status = "okay";
>> 235 };
>> 236
>> 237 &cp1_ethernet {
>> 238 status = "okay";
38 }; 239 };
39 240
40 &cp1_eth0 { 241 &cp1_eth0 {
41 status = "okay"; 242 status = "okay";
42 /* Network PHY */ 243 /* Network PHY */
43 phy = <&phy8>; 244 phy = <&phy8>;
44 phy-mode = "10gbase-r"; !! 245 phy-mode = "10gbase-kr";
>> 246 /* Generic PHY, providing serdes lanes */
>> 247 phys = <&cp1_comphy4 0>;
>> 248 };
>> 249
>> 250 &cp1_eth1 {
>> 251 /* CPS Lane 0 - J5 (Gigabit RJ45) */
>> 252 status = "okay";
>> 253 /* Network PHY */
>> 254 phy = <&ge_phy>;
>> 255 phy-mode = "sgmii";
>> 256 /* Generic PHY, providing serdes lanes */
>> 257 phys = <&cp1_comphy0 1>;
>> 258 };
>> 259
>> 260 &cp1_pinctrl {
>> 261 cp1_spi1_pins: spi1-pins {
>> 262 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
>> 263 marvell,function = "spi1";
>> 264 };
>> 265 cp1_uart0_pins: uart0-pins {
>> 266 marvell,pins = "mpp6", "mpp7";
>> 267 marvell,function = "uart0";
>> 268 };
>> 269 };
>> 270
>> 271 /* J27 UART header */
>> 272 &cp1_uart0 {
>> 273 pinctrl-names = "default";
>> 274 pinctrl-0 = <&cp1_uart0_pins>;
>> 275 status = "okay";
>> 276 };
>> 277
>> 278 &cp1_sata0 {
>> 279 /* CPS Lane 1 - U32 */
>> 280 /* CPS Lane 3 - U31 */
>> 281 status = "okay";
>> 282 };
>> 283
>> 284 &cp1_spi1 {
>> 285 pinctrl-names = "default";
>> 286 pinctrl-0 = <&cp1_spi1_pins>;
>> 287 status = "okay";
>> 288
>> 289 spi-flash@0 {
>> 290 compatible = "st,w25q32";
>> 291 spi-max-frequency = <50000000>;
>> 292 reg = <0>;
>> 293 };
>> 294 };
>> 295
>> 296 &cp1_usb3_0 {
>> 297 /* CPS Lane 2 - CON7 */
>> 298 usb-phy = <&usb3h0_phy>;
>> 299 status = "okay";
45 }; 300 };
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