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Linux/scripts/dtc/include-prefixes/arm64/marvell/armada-ap80x.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/marvell/armada-ap80x.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/marvell/armada-ap80x.dtsi (Version linux-5.8.18)


  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)       1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2 /*                                                  2 /*
  3  * Copyright (C) 2019 Marvell Technology Group      3  * Copyright (C) 2019 Marvell Technology Group Ltd.
  4  *                                                  4  *
  5  * Device Tree file for Marvell Armada AP80x.       5  * Device Tree file for Marvell Armada AP80x.
  6  */                                                 6  */
  7                                                     7 
  8 #include <dt-bindings/interrupt-controller/arm      8 #include <dt-bindings/interrupt-controller/arm-gic.h>
  9 #include <dt-bindings/thermal/thermal.h>            9 #include <dt-bindings/thermal/thermal.h>
 10                                                    10 
 11 /dts-v1/;                                          11 /dts-v1/;
 12                                                    12 
 13 / {                                                13 / {
 14         #address-cells = <2>;                      14         #address-cells = <2>;
 15         #size-cells = <2>;                         15         #size-cells = <2>;
 16                                                    16 
 17         aliases {                                  17         aliases {
 18                 serial0 = &uart0;                  18                 serial0 = &uart0;
 19                 serial1 = &uart1;                  19                 serial1 = &uart1;
 20                 gpio0 = &ap_gpio;                  20                 gpio0 = &ap_gpio;
 21                 spi0 = &spi0;                      21                 spi0 = &spi0;
 22         };                                         22         };
 23                                                    23 
 24         psci {                                     24         psci {
 25                 compatible = "arm,psci-0.2";       25                 compatible = "arm,psci-0.2";
 26                 method = "smc";                    26                 method = "smc";
 27         };                                         27         };
 28                                                    28 
 29         reserved-memory {                          29         reserved-memory {
 30                 #address-cells = <2>;              30                 #address-cells = <2>;
 31                 #size-cells = <2>;                 31                 #size-cells = <2>;
 32                 ranges;                            32                 ranges;
 33                                                    33 
 34                 /*                                 34                 /*
 35                  * This area matches the mappi     35                  * This area matches the mapping done with a
 36                  * mainline U-Boot, and should     36                  * mainline U-Boot, and should be updated by the
 37                  * bootloader.                     37                  * bootloader.
 38                  */                                38                  */
 39                                                    39 
 40                 psci-area@4000000 {                40                 psci-area@4000000 {
 41                         reg = <0x0 0x4000000 0     41                         reg = <0x0 0x4000000 0x0 0x200000>;
 42                         no-map;                    42                         no-map;
 43                 };                                 43                 };
 44                                                << 
 45                 tee@4400000 {                  << 
 46                         reg = <0 0x4400000 0 0 << 
 47                         no-map;                << 
 48                 };                             << 
 49         };                                         44         };
 50                                                    45 
 51         AP_NAME {                                  46         AP_NAME {
 52                 #address-cells = <2>;              47                 #address-cells = <2>;
 53                 #size-cells = <2>;                 48                 #size-cells = <2>;
 54                 compatible = "simple-bus";         49                 compatible = "simple-bus";
 55                 interrupt-parent = <&gic>;         50                 interrupt-parent = <&gic>;
 56                 ranges;                            51                 ranges;
 57                                                    52 
 58                 config-space@f0000000 {            53                 config-space@f0000000 {
 59                         #address-cells = <1>;      54                         #address-cells = <1>;
 60                         #size-cells = <1>;         55                         #size-cells = <1>;
 61                         compatible = "simple-b     56                         compatible = "simple-bus";
 62                         ranges = <0x0 0x0 0xf0     57                         ranges = <0x0 0x0 0xf0000000 0x1000000>;
 63                                                    58 
 64                         smmu: iommu@100000 {   << 
 65                                 compatible = " << 
 66                                 reg = <0x10000 << 
 67                                 dma-coherent;  << 
 68                                 #iommu-cells = << 
 69                                 #global-interr << 
 70                                 interrupts = < << 
 71                                              < << 
 72                                              < << 
 73                                              < << 
 74                                              < << 
 75                                              < << 
 76                                              < << 
 77                                              < << 
 78                                              < << 
 79                                 status = "disa << 
 80                         };                     << 
 81                                                << 
 82                         gic: interrupt-control     59                         gic: interrupt-controller@210000 {
 83                                 compatible = "     60                                 compatible = "arm,gic-400";
 84                                 #interrupt-cel     61                                 #interrupt-cells = <3>;
 85                                 #address-cells     62                                 #address-cells = <1>;
 86                                 #size-cells =      63                                 #size-cells = <1>;
 87                                 ranges;            64                                 ranges;
 88                                 interrupt-cont     65                                 interrupt-controller;
 89                                 interrupts = <     66                                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 90                                 reg = <0x21000     67                                 reg = <0x210000 0x10000>,
 91                                       <0x22000     68                                       <0x220000 0x20000>,
 92                                       <0x24000     69                                       <0x240000 0x20000>,
 93                                       <0x26000     70                                       <0x260000 0x20000>;
 94                                                    71 
 95                                 gic_v2m0: v2m@     72                                 gic_v2m0: v2m@280000 {
 96                                         compat     73                                         compatible = "arm,gic-v2m-frame";
 97                                         msi-co     74                                         msi-controller;
 98                                         reg =      75                                         reg = <0x280000 0x1000>;
 99                                         arm,ms     76                                         arm,msi-base-spi = <160>;
100                                         arm,ms     77                                         arm,msi-num-spis = <32>;
101                                 };                 78                                 };
102                                 gic_v2m1: v2m@     79                                 gic_v2m1: v2m@290000 {
103                                         compat     80                                         compatible = "arm,gic-v2m-frame";
104                                         msi-co     81                                         msi-controller;
105                                         reg =      82                                         reg = <0x290000 0x1000>;
106                                         arm,ms     83                                         arm,msi-base-spi = <192>;
107                                         arm,ms     84                                         arm,msi-num-spis = <32>;
108                                 };                 85                                 };
109                                 gic_v2m2: v2m@     86                                 gic_v2m2: v2m@2a0000 {
110                                         compat     87                                         compatible = "arm,gic-v2m-frame";
111                                         msi-co     88                                         msi-controller;
112                                         reg =      89                                         reg = <0x2a0000 0x1000>;
113                                         arm,ms     90                                         arm,msi-base-spi = <224>;
114                                         arm,ms     91                                         arm,msi-num-spis = <32>;
115                                 };                 92                                 };
116                                 gic_v2m3: v2m@     93                                 gic_v2m3: v2m@2b0000 {
117                                         compat     94                                         compatible = "arm,gic-v2m-frame";
118                                         msi-co     95                                         msi-controller;
119                                         reg =      96                                         reg = <0x2b0000 0x1000>;
120                                         arm,ms     97                                         arm,msi-base-spi = <256>;
121                                         arm,ms     98                                         arm,msi-num-spis = <32>;
122                                 };                 99                                 };
123                         };                        100                         };
124                                                   101 
125                         timer {                   102                         timer {
126                                 compatible = "    103                                 compatible = "arm,armv8-timer";
127                                 interrupts = <    104                                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
128                                              <    105                                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
129                                              <    106                                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
130                                              <    107                                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
131                         };                        108                         };
132                                                   109 
133                         pmu {                     110                         pmu {
134                                 compatible = "    111                                 compatible = "arm,cortex-a72-pmu";
135                                 interrupt-pare    112                                 interrupt-parent = <&pic>;
136                                 interrupts = <    113                                 interrupts = <17>;
137                         };                        114                         };
138                                                   115 
139                         odmi: odmi@300000 {       116                         odmi: odmi@300000 {
140                                 compatible = "    117                                 compatible = "marvell,odmi-controller";
                                                   >> 118                                 interrupt-controller;
141                                 msi-controller    119                                 msi-controller;
142                                 marvell,odmi-f    120                                 marvell,odmi-frames = <4>;
143                                 reg = <0x30000    121                                 reg = <0x300000 0x4000>,
144                                       <0x30400    122                                       <0x304000 0x4000>,
145                                       <0x30800    123                                       <0x308000 0x4000>,
146                                       <0x30C00    124                                       <0x30C000 0x4000>;
147                                 marvell,spi-ba    125                                 marvell,spi-base = <128>, <136>, <144>, <152>;
148                         };                        126                         };
149                                                   127 
150                         gicp: gicp@3f0040 {       128                         gicp: gicp@3f0040 {
151                                 compatible = "    129                                 compatible = "marvell,ap806-gicp";
152                                 reg = <0x3f004    130                                 reg = <0x3f0040 0x10>;
153                                 marvell,spi-ra    131                                 marvell,spi-ranges = <64 64>, <288 64>;
154                                 msi-controller    132                                 msi-controller;
155                         };                        133                         };
156                                                   134 
157                         pic: interrupt-control    135                         pic: interrupt-controller@3f0100 {
158                                 compatible = "    136                                 compatible = "marvell,armada-8k-pic";
159                                 reg = <0x3f010    137                                 reg = <0x3f0100 0x10>;
160                                 #interrupt-cel    138                                 #interrupt-cells = <1>;
161                                 interrupt-cont    139                                 interrupt-controller;
162                                 interrupts = <    140                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
163                         };                        141                         };
164                                                   142 
165                         sei: interrupt-control    143                         sei: interrupt-controller@3f0200 {
166                                 compatible = "    144                                 compatible = "marvell,ap806-sei";
167                                 reg = <0x3f020    145                                 reg = <0x3f0200 0x40>;
168                                 interrupts = <    146                                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
169                                 #interrupt-cel    147                                 #interrupt-cells = <1>;
170                                 interrupt-cont    148                                 interrupt-controller;
171                                 msi-controller    149                                 msi-controller;
172                         };                        150                         };
173                                                   151 
174                         xor@400000 {              152                         xor@400000 {
175                                 compatible = "    153                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
176                                 reg = <0x40000    154                                 reg = <0x400000 0x1000>,
177                                       <0x41000    155                                       <0x410000 0x1000>;
178                                 msi-parent = <    156                                 msi-parent = <&gic_v2m0>;
179                                 clocks = <&ap_    157                                 clocks = <&ap_clk 3>;
180                                 dma-coherent;     158                                 dma-coherent;
181                         };                        159                         };
182                                                   160 
183                         xor@420000 {              161                         xor@420000 {
184                                 compatible = "    162                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
185                                 reg = <0x42000    163                                 reg = <0x420000 0x1000>,
186                                       <0x43000    164                                       <0x430000 0x1000>;
187                                 msi-parent = <    165                                 msi-parent = <&gic_v2m0>;
188                                 clocks = <&ap_    166                                 clocks = <&ap_clk 3>;
189                                 dma-coherent;     167                                 dma-coherent;
190                         };                        168                         };
191                                                   169 
192                         xor@440000 {              170                         xor@440000 {
193                                 compatible = "    171                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
194                                 reg = <0x44000    172                                 reg = <0x440000 0x1000>,
195                                       <0x45000    173                                       <0x450000 0x1000>;
196                                 msi-parent = <    174                                 msi-parent = <&gic_v2m0>;
197                                 clocks = <&ap_    175                                 clocks = <&ap_clk 3>;
198                                 dma-coherent;     176                                 dma-coherent;
199                         };                        177                         };
200                                                   178 
201                         xor@460000 {              179                         xor@460000 {
202                                 compatible = "    180                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
203                                 reg = <0x46000    181                                 reg = <0x460000 0x1000>,
204                                       <0x47000    182                                       <0x470000 0x1000>;
205                                 msi-parent = <    183                                 msi-parent = <&gic_v2m0>;
206                                 clocks = <&ap_    184                                 clocks = <&ap_clk 3>;
207                                 dma-coherent;     185                                 dma-coherent;
208                         };                        186                         };
209                                                   187 
210                         spi0: spi@510600 {        188                         spi0: spi@510600 {
211                                 compatible = "    189                                 compatible = "marvell,armada-380-spi";
212                                 reg = <0x51060    190                                 reg = <0x510600 0x50>;
213                                 #address-cells    191                                 #address-cells = <1>;
214                                 #size-cells =     192                                 #size-cells = <0>;
215                                 interrupts = <    193                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
216                                 clocks = <&ap_    194                                 clocks = <&ap_clk 3>;
217                                 status = "disa    195                                 status = "disabled";
218                         };                        196                         };
219                                                   197 
220                         i2c0: i2c@511000 {        198                         i2c0: i2c@511000 {
221                                 compatible = "    199                                 compatible = "marvell,mv78230-i2c";
222                                 reg = <0x51100    200                                 reg = <0x511000 0x20>;
223                                 #address-cells    201                                 #address-cells = <1>;
224                                 #size-cells =     202                                 #size-cells = <0>;
225                                 interrupts = <    203                                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
226                                 clocks = <&ap_    204                                 clocks = <&ap_clk 3>;
227                                 status = "disa    205                                 status = "disabled";
228                         };                        206                         };
229                                                   207 
230                         uart0: serial@512000 {    208                         uart0: serial@512000 {
231                                 compatible = "    209                                 compatible = "snps,dw-apb-uart";
232                                 reg = <0x51200    210                                 reg = <0x512000 0x100>;
233                                 reg-shift = <2    211                                 reg-shift = <2>;
234                                 interrupts = <    212                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
235                                 reg-io-width =    213                                 reg-io-width = <1>;
236                                 clocks = <&ap_    214                                 clocks = <&ap_clk 3>;
237                                 status = "disa    215                                 status = "disabled";
238                         };                        216                         };
239                                                   217 
240                         uart1: serial@512100 {    218                         uart1: serial@512100 {
241                                 compatible = "    219                                 compatible = "snps,dw-apb-uart";
242                                 reg = <0x51210    220                                 reg = <0x512100 0x100>;
243                                 reg-shift = <2    221                                 reg-shift = <2>;
244                                 interrupts = <    222                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
245                                 reg-io-width =    223                                 reg-io-width = <1>;
246                                 clocks = <&ap_    224                                 clocks = <&ap_clk 3>;
247                                 status = "disa    225                                 status = "disabled";
248                                                   226 
249                         };                        227                         };
250                                                   228 
251                         watchdog: watchdog@610    229                         watchdog: watchdog@610000 {
252                                 compatible = "    230                                 compatible = "arm,sbsa-gwdt";
253                                 reg = <0x61000    231                                 reg = <0x610000 0x1000>, <0x600000 0x1000>;
254                                 interrupts = <    232                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
255                         };                        233                         };
256                                                   234 
257                         ap_sdhci0: mmc@6e0000  !! 235                         ap_sdhci0: sdhci@6e0000 {
258                                 compatible = "    236                                 compatible = "marvell,armada-ap806-sdhci";
259                                 reg = <0x6e000    237                                 reg = <0x6e0000 0x300>;
260                                 interrupts = <    238                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
261                                 clock-names =     239                                 clock-names = "core";
262                                 clocks = <&ap_    240                                 clocks = <&ap_clk 4>;
263                                 dma-coherent;     241                                 dma-coherent;
264                                 marvell,xenon-    242                                 marvell,xenon-phy-slow-mode;
265                                 status = "disa    243                                 status = "disabled";
266                         };                        244                         };
267                                                   245 
268                         ap_syscon0: system-con    246                         ap_syscon0: system-controller@6f4000 {
269                                 compatible = "    247                                 compatible = "syscon", "simple-mfd";
270                                 reg = <0x6f400    248                                 reg = <0x6f4000 0x2000>;
271                                                   249 
272                                 ap_pinctrl: pi    250                                 ap_pinctrl: pinctrl {
273                                         compat    251                                         compatible = "marvell,ap806-pinctrl";
274                                                   252 
275                                         uart0_    253                                         uart0_pins: uart0-pins {
276                                                   254                                                 marvell,pins = "mpp11", "mpp19";
277                                                   255                                                 marvell,function = "uart0";
278                                         };        256                                         };
279                                 };                257                                 };
280                                                   258 
281                                 ap_gpio: gpio@    259                                 ap_gpio: gpio@1040 {
282                                         compat    260                                         compatible = "marvell,armada-8k-gpio";
283                                         offset    261                                         offset = <0x1040>;
284                                         ngpios    262                                         ngpios = <20>;
285                                         gpio-c    263                                         gpio-controller;
286                                         #gpio-    264                                         #gpio-cells = <2>;
287                                         gpio-r    265                                         gpio-ranges = <&ap_pinctrl 0 0 20>;
288                                         marvel << 
289                                         #pwm-c << 
290                                         clocks << 
291                                 };                266                                 };
292                         };                        267                         };
293                                                   268 
294                         ap_syscon1: system-con    269                         ap_syscon1: system-controller@6f8000 {
295                                 compatible = "    270                                 compatible = "syscon", "simple-mfd";
296                                 reg = <0x6f800    271                                 reg = <0x6f8000 0x1000>;
297                                 #address-cells    272                                 #address-cells = <1>;
298                                 #size-cells =     273                                 #size-cells = <1>;
299                                                   274 
300                                 ap_thermal: th    275                                 ap_thermal: thermal-sensor@80 {
301                                         compat    276                                         compatible = "marvell,armada-ap806-thermal";
302                                         reg =     277                                         reg = <0x80 0x10>;
303                                         interr    278                                         interrupt-parent = <&sei>;
304                                         interr    279                                         interrupts = <18>;
305                                         #therm    280                                         #thermal-sensor-cells = <1>;
306                                 };                281                                 };
307                         };                        282                         };
308                 };                                283                 };
309         };                                        284         };
310                                                   285 
311         /*                                        286         /*
312          * The thermal IP features one interna    287          * The thermal IP features one internal sensor plus, if applicable, one
313          * remote channel wired to one sensor     288          * remote channel wired to one sensor per CPU.
314          *                                        289          *
315          * Only one thermal zone per AP/CP may    290          * Only one thermal zone per AP/CP may trigger interrupts at a time, the
316          * first one that will have a critical    291          * first one that will have a critical trip point will be chosen.
317          */                                       292          */
318         thermal-zones {                           293         thermal-zones {
319                 ap_thermal_ic: ap-ic-thermal { !! 294                 ap_thermal_ic: ap-thermal-ic {
320                         polling-delay-passive     295                         polling-delay-passive = <0>; /* Interrupt driven */
321                         polling-delay = <0>; /    296                         polling-delay = <0>; /* Interrupt driven */
322                                                   297 
323                         thermal-sensors = <&ap    298                         thermal-sensors = <&ap_thermal 0>;
324                                                   299 
325                         trips {                   300                         trips {
326                                 ap_crit: ap-cr    301                                 ap_crit: ap-crit {
327                                         temper    302                                         temperature = <100000>; /* mC degrees */
328                                         hyster    303                                         hysteresis = <2000>; /* mC degrees */
329                                         type =    304                                         type = "critical";
330                                 };                305                                 };
331                         };                        306                         };
332                                                   307 
333                         cooling-maps { };         308                         cooling-maps { };
334                 };                                309                 };
335                                                   310 
336                 ap_thermal_cpu0: ap-cpu0-therm !! 311                 ap_thermal_cpu0: ap-thermal-cpu0 {
337                         polling-delay-passive     312                         polling-delay-passive = <1000>;
338                         polling-delay = <1000>    313                         polling-delay = <1000>;
339                                                   314 
340                         thermal-sensors = <&ap    315                         thermal-sensors = <&ap_thermal 1>;
341                                                   316 
342                         trips {                   317                         trips {
343                                 cpu0_hot: cpu0    318                                 cpu0_hot: cpu0-hot {
344                                         temper    319                                         temperature = <85000>;
345                                         hyster    320                                         hysteresis = <2000>;
346                                         type =    321                                         type = "passive";
347                                 };                322                                 };
348                                 cpu0_emerg: cp    323                                 cpu0_emerg: cpu0-emerg {
349                                         temper    324                                         temperature = <95000>;
350                                         hyster    325                                         hysteresis = <2000>;
351                                         type =    326                                         type = "passive";
352                                 };                327                                 };
353                         };                        328                         };
354                                                   329 
355                         cooling-maps {            330                         cooling-maps {
356                                 map0_hot: map0    331                                 map0_hot: map0-hot {
357                                         trip =    332                                         trip = <&cpu0_hot>;
358                                         coolin    333                                         cooling-device = <&cpu0 1 2>,
359                                                   334                                                 <&cpu1 1 2>;
360                                 };                335                                 };
361                                 map0_emerg: ma    336                                 map0_emerg: map0-ermerg {
362                                         trip =    337                                         trip = <&cpu0_emerg>;
363                                         coolin    338                                         cooling-device = <&cpu0 3 3>,
364                                                   339                                                 <&cpu1 3 3>;
365                                 };                340                                 };
366                         };                        341                         };
367                 };                                342                 };
368                                                   343 
369                 ap_thermal_cpu1: ap-cpu1-therm !! 344                 ap_thermal_cpu1: ap-thermal-cpu1 {
370                         polling-delay-passive     345                         polling-delay-passive = <1000>;
371                         polling-delay = <1000>    346                         polling-delay = <1000>;
372                                                   347 
373                         thermal-sensors = <&ap    348                         thermal-sensors = <&ap_thermal 2>;
374                                                   349 
375                         trips {                   350                         trips {
376                                 cpu1_hot: cpu1    351                                 cpu1_hot: cpu1-hot {
377                                         temper    352                                         temperature = <85000>;
378                                         hyster    353                                         hysteresis = <2000>;
379                                         type =    354                                         type = "passive";
380                                 };                355                                 };
381                                 cpu1_emerg: cp    356                                 cpu1_emerg: cpu1-emerg {
382                                         temper    357                                         temperature = <95000>;
383                                         hyster    358                                         hysteresis = <2000>;
384                                         type =    359                                         type = "passive";
385                                 };                360                                 };
386                         };                        361                         };
387                                                   362 
388                         cooling-maps {            363                         cooling-maps {
389                                 map1_hot: map1    364                                 map1_hot: map1-hot {
390                                         trip =    365                                         trip = <&cpu1_hot>;
391                                         coolin    366                                         cooling-device = <&cpu0 1 2>,
392                                                   367                                                 <&cpu1 1 2>;
393                                 };                368                                 };
394                                 map1_emerg: ma    369                                 map1_emerg: map1-emerg {
395                                         trip =    370                                         trip = <&cpu1_emerg>;
396                                         coolin    371                                         cooling-device = <&cpu0 3 3>,
397                                                   372                                                 <&cpu1 3 3>;
398                                 };                373                                 };
399                         };                        374                         };
400                 };                                375                 };
401                                                   376 
402                 ap_thermal_cpu2: ap-cpu2-therm !! 377                 ap_thermal_cpu2: ap-thermal-cpu2 {
403                         polling-delay-passive     378                         polling-delay-passive = <1000>;
404                         polling-delay = <1000>    379                         polling-delay = <1000>;
405                                                   380 
406                         thermal-sensors = <&ap    381                         thermal-sensors = <&ap_thermal 3>;
407                                                   382 
408                         trips {                   383                         trips {
409                                 cpu2_hot: cpu2    384                                 cpu2_hot: cpu2-hot {
410                                         temper    385                                         temperature = <85000>;
411                                         hyster    386                                         hysteresis = <2000>;
412                                         type =    387                                         type = "passive";
413                                 };                388                                 };
414                                 cpu2_emerg: cp    389                                 cpu2_emerg: cpu2-emerg {
415                                         temper    390                                         temperature = <95000>;
416                                         hyster    391                                         hysteresis = <2000>;
417                                         type =    392                                         type = "passive";
418                                 };                393                                 };
419                         };                        394                         };
420                                                   395 
421                         cooling-maps {            396                         cooling-maps {
422                                 map2_hot: map2    397                                 map2_hot: map2-hot {
423                                         trip =    398                                         trip = <&cpu2_hot>;
424                                         coolin    399                                         cooling-device = <&cpu2 1 2>,
425                                                   400                                                 <&cpu3 1 2>;
426                                 };                401                                 };
427                                 map2_emerg: ma    402                                 map2_emerg: map2-emerg {
428                                         trip =    403                                         trip = <&cpu2_emerg>;
429                                         coolin    404                                         cooling-device = <&cpu2 3 3>,
430                                                   405                                                 <&cpu3 3 3>;
431                                 };                406                                 };
432                         };                        407                         };
433                 };                                408                 };
434                                                   409 
435                 ap_thermal_cpu3: ap-cpu3-therm !! 410                 ap_thermal_cpu3: ap-thermal-cpu3 {
436                         polling-delay-passive     411                         polling-delay-passive = <1000>;
437                         polling-delay = <1000>    412                         polling-delay = <1000>;
438                                                   413 
439                         thermal-sensors = <&ap    414                         thermal-sensors = <&ap_thermal 4>;
440                                                   415 
441                         trips {                   416                         trips {
442                                 cpu3_hot: cpu3    417                                 cpu3_hot: cpu3-hot {
443                                         temper    418                                         temperature = <85000>;
444                                         hyster    419                                         hysteresis = <2000>;
445                                         type =    420                                         type = "passive";
446                                 };                421                                 };
447                                 cpu3_emerg: cp    422                                 cpu3_emerg: cpu3-emerg {
448                                         temper    423                                         temperature = <95000>;
449                                         hyster    424                                         hysteresis = <2000>;
450                                         type =    425                                         type = "passive";
451                                 };                426                                 };
452                         };                        427                         };
453                                                   428 
454                         cooling-maps {            429                         cooling-maps {
455                                 map3_hot: map3    430                                 map3_hot: map3-bhot {
456                                         trip =    431                                         trip = <&cpu3_hot>;
457                                         coolin    432                                         cooling-device = <&cpu2 1 2>,
458                                                   433                                                 <&cpu3 1 2>;
459                                 };                434                                 };
460                                 map3_emerg: ma    435                                 map3_emerg: map3-emerg {
461                                         trip =    436                                         trip = <&cpu3_emerg>;
462                                         coolin    437                                         cooling-device = <&cpu2 3 3>,
463                                                   438                                                 <&cpu3 3 3>;
464                                 };                439                                 };
465                         };                        440                         };
466                 };                                441                 };
467         };                                        442         };
468 };                                                443 };
                                                      

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