1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (C) 2019 Marvell International Lt 3 * Copyright (C) 2019 Marvell International Ltd.
4 * 4 *
5 * Device tree for the CN9130-DB board. 5 * Device tree for the CN9130-DB board.
6 */ 6 */
7 7
8 #include "cn9130.dtsi" 8 #include "cn9130.dtsi"
9 9
10 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/gpio/gpio.h>
11 11
12 / { 12 / {
13 chosen { 13 chosen {
14 stdout-path = "serial0:115200n 14 stdout-path = "serial0:115200n8";
15 }; 15 };
16 16
17 aliases { 17 aliases {
18 gpio1 = &cp0_gpio1; 18 gpio1 = &cp0_gpio1;
19 gpio2 = &cp0_gpio2; 19 gpio2 = &cp0_gpio2;
20 i2c0 = &cp0_i2c0; 20 i2c0 = &cp0_i2c0;
21 ethernet0 = &cp0_eth0; 21 ethernet0 = &cp0_eth0;
22 ethernet1 = &cp0_eth1; 22 ethernet1 = &cp0_eth1;
23 ethernet2 = &cp0_eth2; 23 ethernet2 = &cp0_eth2;
24 spi1 = &cp0_spi0; 24 spi1 = &cp0_spi0;
25 spi2 = &cp0_spi1; 25 spi2 = &cp0_spi1;
26 }; 26 };
27 27
28 memory@0 { 28 memory@0 {
29 device_type = "memory"; 29 device_type = "memory";
30 reg = <0x0 0x0 0x0 0x80000000> 30 reg = <0x0 0x0 0x0 0x80000000>;
31 }; 31 };
32 32
33 ap0_reg_sd_vccq: regulator-1 { !! 33 ap0_reg_sd_vccq: ap0_sd_vccq@0 {
34 compatible = "regulator-gpio"; 34 compatible = "regulator-gpio";
35 regulator-name = "ap0_sd_vccq" 35 regulator-name = "ap0_sd_vccq";
36 regulator-min-microvolt = <180 36 regulator-min-microvolt = <1800000>;
37 regulator-max-microvolt = <330 37 regulator-max-microvolt = <3300000>;
38 gpios = <&expander0 8 GPIO_ACT 38 gpios = <&expander0 8 GPIO_ACTIVE_HIGH>;
39 states = <1800000 0x1 3300000 39 states = <1800000 0x1 3300000 0x0>;
40 }; 40 };
41 41
42 cp0_reg_usb3_vbus0: regulator-2 { !! 42 cp0_reg_usb3_vbus0: cp0_usb3_vbus@0 {
43 compatible = "regulator-fixed" 43 compatible = "regulator-fixed";
44 regulator-name = "cp0-xhci0-vb 44 regulator-name = "cp0-xhci0-vbus";
45 regulator-min-microvolt = <500 45 regulator-min-microvolt = <5000000>;
46 regulator-max-microvolt = <500 46 regulator-max-microvolt = <5000000>;
47 enable-active-high; 47 enable-active-high;
48 gpio = <&expander0 0 GPIO_ACTI 48 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
49 }; 49 };
50 50
51 cp0_usb3_0_phy0: usb-phy-1 { !! 51 cp0_usb3_0_phy0: cp0_usb3_phy@0 {
52 compatible = "usb-nop-xceiv"; 52 compatible = "usb-nop-xceiv";
53 vcc-supply = <&cp0_reg_usb3_vb 53 vcc-supply = <&cp0_reg_usb3_vbus0>;
54 }; 54 };
55 55
56 cp0_reg_usb3_vbus1: regulator-3 { !! 56 cp0_reg_usb3_vbus1: cp0_usb3_vbus@1 {
57 compatible = "regulator-fixed" 57 compatible = "regulator-fixed";
58 regulator-name = "cp0-xhci1-vb 58 regulator-name = "cp0-xhci1-vbus";
59 regulator-min-microvolt = <500 59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <500 60 regulator-max-microvolt = <5000000>;
61 enable-active-high; 61 enable-active-high;
62 gpio = <&expander0 1 GPIO_ACTI 62 gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
63 }; 63 };
64 64
65 cp0_usb3_0_phy1: usb-phy-2 { !! 65 cp0_usb3_0_phy1: cp0_usb3_phy@1 {
66 compatible = "usb-nop-xceiv"; 66 compatible = "usb-nop-xceiv";
67 vcc-supply = <&cp0_reg_usb3_vb 67 vcc-supply = <&cp0_reg_usb3_vbus1>;
68 }; 68 };
69 69
70 cp0_reg_sd_vccq: regulator-4 { !! 70 cp0_reg_sd_vccq: cp0_sd_vccq@0 {
71 compatible = "regulator-gpio"; 71 compatible = "regulator-gpio";
72 regulator-name = "cp0_sd_vccq" 72 regulator-name = "cp0_sd_vccq";
73 regulator-min-microvolt = <180 73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <330 74 regulator-max-microvolt = <3300000>;
75 gpios = <&expander0 15 GPIO_AC 75 gpios = <&expander0 15 GPIO_ACTIVE_HIGH>;
76 states = <1800000 0x1 76 states = <1800000 0x1
77 3300000 0x0>; 77 3300000 0x0>;
78 }; 78 };
79 79
80 cp0_reg_sd_vcc: regulator-5 { !! 80 cp0_reg_sd_vcc: cp0_sd_vcc@0 {
81 compatible = "regulator-fixed" 81 compatible = "regulator-fixed";
82 regulator-name = "cp0_sd_vcc"; 82 regulator-name = "cp0_sd_vcc";
83 regulator-min-microvolt = <330 83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <330 84 regulator-max-microvolt = <3300000>;
85 gpio = <&expander0 14 GPIO_ACT 85 gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
86 enable-active-high; 86 enable-active-high;
87 regulator-always-on; 87 regulator-always-on;
88 }; 88 };
89 89
90 cp0_sfp_eth0: sfp-eth-1 { !! 90 cp0_sfp_eth0: sfp-eth@0 {
91 compatible = "sff,sfp"; 91 compatible = "sff,sfp";
92 i2c-bus = <&cp0_sfpp0_i2c>; 92 i2c-bus = <&cp0_sfpp0_i2c>;
93 los-gpios = <&cp0_module_expan 93 los-gpios = <&cp0_module_expander1 11 GPIO_ACTIVE_HIGH>;
94 mod-def0-gpios = <&cp0_module_ 94 mod-def0-gpios = <&cp0_module_expander1 10 GPIO_ACTIVE_LOW>;
95 tx-disable-gpios = <&cp0_modul 95 tx-disable-gpios = <&cp0_module_expander1 9 GPIO_ACTIVE_HIGH>;
96 tx-fault-gpios = <&cp0_module_ 96 tx-fault-gpios = <&cp0_module_expander1 8 GPIO_ACTIVE_HIGH>;
97 /* 97 /*
98 * SFP cages are unconnected o 98 * SFP cages are unconnected on early PCBs because of an the I2C
99 * lanes not being connected. 99 * lanes not being connected. Prevent the port for being
100 * unusable by disabling the S 100 * unusable by disabling the SFP node.
101 */ 101 */
102 status = "disabled"; 102 status = "disabled";
103 }; 103 };
104 }; 104 };
105 105
106 &uart0 { 106 &uart0 {
107 status = "okay"; 107 status = "okay";
108 }; 108 };
109 109
110 /* on-board eMMC - U9 */ 110 /* on-board eMMC - U9 */
111 &ap_sdhci0 { 111 &ap_sdhci0 {
112 pinctrl-names = "default"; 112 pinctrl-names = "default";
113 bus-width = <8>; 113 bus-width = <8>;
114 vqmmc-supply = <&ap0_reg_sd_vccq>; 114 vqmmc-supply = <&ap0_reg_sd_vccq>;
115 status = "okay"; 115 status = "okay";
116 }; 116 };
117 117
118 &cp0_crypto { 118 &cp0_crypto {
119 status = "disabled"; 119 status = "disabled";
120 }; 120 };
121 121
122 &cp0_ethernet { 122 &cp0_ethernet {
123 status = "okay"; 123 status = "okay";
124 }; 124 };
125 125
126 /* SLM-1521-V2, CON9 */ 126 /* SLM-1521-V2, CON9 */
127 &cp0_eth0 { 127 &cp0_eth0 {
128 status = "okay"; 128 status = "okay";
129 phy-mode = "10gbase-r"; 129 phy-mode = "10gbase-r";
130 /* Generic PHY, providing serdes lanes 130 /* Generic PHY, providing serdes lanes */
131 phys = <&cp0_comphy4 0>; 131 phys = <&cp0_comphy4 0>;
132 managed = "in-band-status"; 132 managed = "in-band-status";
133 sfp = <&cp0_sfp_eth0>; 133 sfp = <&cp0_sfp_eth0>;
134 }; 134 };
135 135
136 /* CON56 */ 136 /* CON56 */
137 &cp0_eth1 { 137 &cp0_eth1 {
138 status = "okay"; 138 status = "okay";
139 phy = <&phy0>; 139 phy = <&phy0>;
140 phy-mode = "rgmii-id"; 140 phy-mode = "rgmii-id";
141 }; 141 };
142 142
143 /* CON57 */ 143 /* CON57 */
144 &cp0_eth2 { 144 &cp0_eth2 {
145 status = "okay"; 145 status = "okay";
146 phy = <&phy1>; 146 phy = <&phy1>;
147 phy-mode = "rgmii-id"; 147 phy-mode = "rgmii-id";
148 }; 148 };
149 149
150 &cp0_gpio1 { 150 &cp0_gpio1 {
151 status = "okay"; 151 status = "okay";
152 }; 152 };
153 153
154 &cp0_gpio2 { 154 &cp0_gpio2 {
155 status = "okay"; 155 status = "okay";
156 }; 156 };
157 157
158 &cp0_i2c0 { 158 &cp0_i2c0 {
159 status = "okay"; 159 status = "okay";
160 pinctrl-names = "default"; 160 pinctrl-names = "default";
161 pinctrl-0 = <&cp0_i2c0_pins>; 161 pinctrl-0 = <&cp0_i2c0_pins>;
162 clock-frequency = <100000>; 162 clock-frequency = <100000>;
163 163
164 /* U36 */ 164 /* U36 */
165 expander0: pca953x@21 { 165 expander0: pca953x@21 {
166 compatible = "nxp,pca9555"; 166 compatible = "nxp,pca9555";
167 pinctrl-names = "default"; 167 pinctrl-names = "default";
168 gpio-controller; 168 gpio-controller;
169 #gpio-cells = <2>; 169 #gpio-cells = <2>;
170 reg = <0x21>; 170 reg = <0x21>;
171 status = "okay"; 171 status = "okay";
172 }; 172 };
173 173
174 /* U42 */ 174 /* U42 */
175 eeprom0: eeprom@50 { 175 eeprom0: eeprom@50 {
176 compatible = "atmel,24c64"; 176 compatible = "atmel,24c64";
177 reg = <0x50>; 177 reg = <0x50>;
178 pagesize = <0x20>; 178 pagesize = <0x20>;
179 }; 179 };
180 180
181 /* U38 */ 181 /* U38 */
182 eeprom1: eeprom@57 { 182 eeprom1: eeprom@57 {
183 compatible = "atmel,24c64"; 183 compatible = "atmel,24c64";
184 reg = <0x57>; 184 reg = <0x57>;
185 pagesize = <0x20>; 185 pagesize = <0x20>;
186 }; 186 };
187 }; 187 };
188 188
189 &cp0_i2c1 { 189 &cp0_i2c1 {
190 status = "okay"; 190 status = "okay";
191 clock-frequency = <100000>; 191 clock-frequency = <100000>;
192 192
193 /* SLM-1521-V2 - U3 */ 193 /* SLM-1521-V2 - U3 */
194 i2c-mux@72 { /* verify address - depen 194 i2c-mux@72 { /* verify address - depends on dpr */
195 compatible = "nxp,pca9544"; 195 compatible = "nxp,pca9544";
196 #address-cells = <1>; 196 #address-cells = <1>;
197 #size-cells = <0>; 197 #size-cells = <0>;
198 reg = <0x72>; 198 reg = <0x72>;
199 cp0_sfpp0_i2c: i2c@0 { 199 cp0_sfpp0_i2c: i2c@0 {
200 #address-cells = <1>; 200 #address-cells = <1>;
201 #size-cells = <0>; 201 #size-cells = <0>;
202 reg = <0>; 202 reg = <0>;
203 }; 203 };
204 204
205 i2c@1 { 205 i2c@1 {
206 #address-cells = <1>; 206 #address-cells = <1>;
207 #size-cells = <0>; 207 #size-cells = <0>;
208 reg = <1>; 208 reg = <1>;
209 /* U12 */ 209 /* U12 */
210 cp0_module_expander1: 210 cp0_module_expander1: pca9555@21 {
211 compatible = " 211 compatible = "nxp,pca9555";
212 pinctrl-names 212 pinctrl-names = "default";
213 gpio-controlle 213 gpio-controller;
214 #gpio-cells = 214 #gpio-cells = <2>;
215 reg = <0x21>; 215 reg = <0x21>;
216 }; 216 };
217 217
218 }; 218 };
219 }; 219 };
220 }; 220 };
221 221
222 &cp0_mdio { 222 &cp0_mdio {
223 status = "okay"; 223 status = "okay";
224 224
225 phy0: ethernet-phy@0 { 225 phy0: ethernet-phy@0 {
226 reg = <0>; 226 reg = <0>;
227 }; 227 };
228 228
229 phy1: ethernet-phy@1 { 229 phy1: ethernet-phy@1 {
230 reg = <1>; 230 reg = <1>;
231 }; 231 };
232 }; 232 };
233 233
234 /* U54 */ 234 /* U54 */
235 &cp0_nand_controller { 235 &cp0_nand_controller {
236 status = "disabled"; 236 status = "disabled";
237 pinctrl-names = "default"; 237 pinctrl-names = "default";
238 pinctrl-0 = <&nand_pins &nand_rb>; 238 pinctrl-0 = <&nand_pins &nand_rb>;
239 239
240 nand@0 { 240 nand@0 {
241 reg = <0>; 241 reg = <0>;
242 label = "main-storage"; 242 label = "main-storage";
243 nand-rb = <0>; 243 nand-rb = <0>;
244 nand-ecc-mode = "hw"; 244 nand-ecc-mode = "hw";
245 nand-on-flash-bbt; 245 nand-on-flash-bbt;
246 nand-ecc-strength = <8>; 246 nand-ecc-strength = <8>;
247 nand-ecc-step-size = <512>; 247 nand-ecc-step-size = <512>;
248 248
249 partitions { 249 partitions {
250 compatible = "fixed-pa 250 compatible = "fixed-partitions";
251 #address-cells = <1>; 251 #address-cells = <1>;
252 #size-cells = <1>; 252 #size-cells = <1>;
253 253
254 partition@0 { 254 partition@0 {
255 label = "U-Boo 255 label = "U-Boot";
256 reg = <0 0x200 256 reg = <0 0x200000>;
257 }; 257 };
258 partition@200000 { 258 partition@200000 {
259 label = "Linux 259 label = "Linux";
260 reg = <0x20000 260 reg = <0x200000 0xe00000>;
261 }; 261 };
262 partition@1000000 { 262 partition@1000000 {
263 label = "Files 263 label = "Filesystem";
264 reg = <0x10000 264 reg = <0x1000000 0x3f000000>;
265 }; 265 };
266 }; 266 };
267 }; 267 };
268 }; 268 };
269 269
270 /* SLM-1521-V2, CON6 */ 270 /* SLM-1521-V2, CON6 */
271 &cp0_pcie0 { 271 &cp0_pcie0 {
272 status = "okay"; 272 status = "okay";
273 num-lanes = <4>; 273 num-lanes = <4>;
274 num-viewport = <8>; 274 num-viewport = <8>;
275 /* Generic PHY, providing serdes lanes 275 /* Generic PHY, providing serdes lanes */
276 phys = <&cp0_comphy0 0 276 phys = <&cp0_comphy0 0
277 &cp0_comphy1 0 277 &cp0_comphy1 0
278 &cp0_comphy2 0 278 &cp0_comphy2 0
279 &cp0_comphy3 0>; 279 &cp0_comphy3 0>;
280 }; 280 };
281 281
282 &cp0_sata0 { 282 &cp0_sata0 {
283 status = "okay"; 283 status = "okay";
284 284
285 /* SLM-1521-V2, CON2 */ 285 /* SLM-1521-V2, CON2 */
286 sata-port@1 { 286 sata-port@1 {
287 status = "okay"; 287 status = "okay";
288 /* Generic PHY, providing serd 288 /* Generic PHY, providing serdes lanes */
289 phys = <&cp0_comphy5 1>; 289 phys = <&cp0_comphy5 1>;
290 }; 290 };
291 }; 291 };
292 292
293 /* CON 28 */ 293 /* CON 28 */
294 &cp0_sdhci0 { 294 &cp0_sdhci0 {
295 status = "okay"; 295 status = "okay";
296 pinctrl-names = "default"; 296 pinctrl-names = "default";
297 pinctrl-0 = <&cp0_sdhci_pins 297 pinctrl-0 = <&cp0_sdhci_pins
298 &cp0_sdhci_cd_pins>; 298 &cp0_sdhci_cd_pins>;
299 bus-width = <4>; 299 bus-width = <4>;
300 cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_ 300 cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
301 no-1-8-v; 301 no-1-8-v;
302 vqmmc-supply = <&cp0_reg_sd_vccq>; 302 vqmmc-supply = <&cp0_reg_sd_vccq>;
303 vmmc-supply = <&cp0_reg_sd_vcc>; 303 vmmc-supply = <&cp0_reg_sd_vcc>;
304 }; 304 };
305 305
306 /* U55 */ 306 /* U55 */
307 &cp0_spi1 { 307 &cp0_spi1 {
308 status = "disabled"; 308 status = "disabled";
309 pinctrl-names = "default"; 309 pinctrl-names = "default";
310 pinctrl-0 = <&cp0_spi1_pins>; 310 pinctrl-0 = <&cp0_spi1_pins>;
311 reg = <0x700680 0x50>; 311 reg = <0x700680 0x50>;
312 312
313 flash@0 { 313 flash@0 {
>> 314 #address-cells = <0x1>;
>> 315 #size-cells = <0x1>;
314 compatible = "jedec,spi-nor"; 316 compatible = "jedec,spi-nor";
315 reg = <0x0>; 317 reg = <0x0>;
316 /* On-board MUX does not allow 318 /* On-board MUX does not allow higher frequencies */
317 spi-max-frequency = <40000000> 319 spi-max-frequency = <40000000>;
318 320
319 partitions { 321 partitions {
320 compatible = "fixed-pa 322 compatible = "fixed-partitions";
321 #address-cells = <1>; 323 #address-cells = <1>;
322 #size-cells = <1>; 324 #size-cells = <1>;
323 325
324 partition@0 { 326 partition@0 {
325 label = "U-Boo 327 label = "U-Boot-0";
326 reg = <0x0 0x2 328 reg = <0x0 0x200000>;
327 }; 329 };
328 330
329 partition@400000 { 331 partition@400000 {
330 label = "Files 332 label = "Filesystem-0";
331 reg = <0x20000 333 reg = <0x200000 0xe00000>;
332 }; 334 };
333 }; 335 };
334 }; 336 };
335 }; 337 };
336 338
337 &cp0_syscon0 { 339 &cp0_syscon0 {
338 cp0_pinctrl: pinctrl { 340 cp0_pinctrl: pinctrl {
339 compatible = "marvell,cp115-st 341 compatible = "marvell,cp115-standalone-pinctrl";
340 342
341 cp0_i2c0_pins: cp0-i2c-pins-0 343 cp0_i2c0_pins: cp0-i2c-pins-0 {
342 marvell,pins = "mpp37" 344 marvell,pins = "mpp37", "mpp38";
343 marvell,function = "i2 345 marvell,function = "i2c0";
344 }; 346 };
345 cp0_i2c1_pins: cp0-i2c-pins-1 347 cp0_i2c1_pins: cp0-i2c-pins-1 {
346 marvell,pins = "mpp35" 348 marvell,pins = "mpp35", "mpp36";
347 marvell,function = "i2 349 marvell,function = "i2c1";
348 }; 350 };
349 cp0_ge1_rgmii_pins: cp0-ge-rgm 351 cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
350 marvell,pins = "mpp0", 352 marvell,pins = "mpp0", "mpp1", "mpp2",
351 "mpp3", 353 "mpp3", "mpp4", "mpp5",
352 "mpp6", 354 "mpp6", "mpp7", "mpp8",
353 "mpp9", 355 "mpp9", "mpp10", "mpp11";
354 marvell,function = "ge 356 marvell,function = "ge0";
355 }; 357 };
356 cp0_ge2_rgmii_pins: cp0-ge-rgm 358 cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
357 marvell,pins = "mpp44" 359 marvell,pins = "mpp44", "mpp45", "mpp46",
358 "mpp47" 360 "mpp47", "mpp48", "mpp49",
359 "mpp50" 361 "mpp50", "mpp51", "mpp52",
360 "mpp53" 362 "mpp53", "mpp54", "mpp55";
361 marvell,function = "ge 363 marvell,function = "ge1";
362 }; 364 };
363 cp0_sdhci_cd_pins: cp0-sdhci-c 365 cp0_sdhci_cd_pins: cp0-sdhci-cd-pins-0 {
364 marvell,pins = "mpp43" 366 marvell,pins = "mpp43";
365 marvell,function = "gp 367 marvell,function = "gpio";
366 }; 368 };
367 cp0_sdhci_pins: cp0-sdhi-pins- 369 cp0_sdhci_pins: cp0-sdhi-pins-0 {
368 marvell,pins = "mpp56" 370 marvell,pins = "mpp56", "mpp57", "mpp58",
369 "mpp59" 371 "mpp59", "mpp60", "mpp61";
370 marvell,function = "sd 372 marvell,function = "sdio";
371 }; 373 };
372 cp0_spi1_pins: cp0-spi-pins-1 374 cp0_spi1_pins: cp0-spi-pins-1 {
373 marvell,pins = "mpp13" 375 marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
374 marvell,function = "sp 376 marvell,function = "spi1";
375 }; 377 };
376 nand_pins: nand-pins { 378 nand_pins: nand-pins {
377 marvell,pins = "mpp15" 379 marvell,pins = "mpp15", "mpp16", "mpp17", "mpp18",
378 "mpp19" 380 "mpp19", "mpp20", "mpp21", "mpp22",
379 "mpp23" 381 "mpp23", "mpp24", "mpp25", "mpp26",
380 "mpp27" 382 "mpp27";
381 marvell,function = "de 383 marvell,function = "dev";
382 }; 384 };
383 nand_rb: nand-rb { 385 nand_rb: nand-rb {
384 marvell,pins = "mpp13" 386 marvell,pins = "mpp13";
385 marvell,function = "nf 387 marvell,function = "nf";
386 }; 388 };
387 }; 389 };
388 }; 390 };
389 391
390 &cp0_utmi { 392 &cp0_utmi {
391 status = "okay"; 393 status = "okay";
392 }; 394 };
393 395
394 &cp0_usb3_0 { 396 &cp0_usb3_0 {
395 status = "okay"; 397 status = "okay";
396 usb-phy = <&cp0_usb3_0_phy0>; 398 usb-phy = <&cp0_usb3_0_phy0>;
397 phys = <&cp0_utmi0>; 399 phys = <&cp0_utmi0>;
398 phy-names = "utmi"; 400 phy-names = "utmi";
399 dr_mode = "host"; 401 dr_mode = "host";
400 }; 402 };
401 403
402 &cp0_usb3_1 { 404 &cp0_usb3_1 {
403 status = "okay"; 405 status = "okay";
404 usb-phy = <&cp0_usb3_0_phy1>; 406 usb-phy = <&cp0_usb3_0_phy1>;
405 phys = <&cp0_utmi1>; 407 phys = <&cp0_utmi1>;
406 phy-names = "utmi"; 408 phy-names = "utmi";
407 dr_mode = "host"; 409 dr_mode = "host";
408 }; 410 };
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