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Linux/scripts/dtc/include-prefixes/arm64/mediatek/mt6755.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/mediatek/mt6755.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/mediatek/mt6755.dtsi (Version linux-5.6.19)


  1 // SPDX-License-Identifier: GPL-2.0-only       << 
  2 /*                                                  1 /*
  3  * Copyright (c) 2016 MediaTek Inc.                 2  * Copyright (c) 2016 MediaTek Inc.
  4  * Author: Mars.C <mars.cheng@mediatek.com>          3  * Author: Mars.C <mars.cheng@mediatek.com>
                                                   >>   4  *
                                                   >>   5  * This program is free software; you can redistribute it and/or modify
                                                   >>   6  * it under the terms of the GNU General Public License version 2 as
                                                   >>   7  * published by the Free Software Foundation.
                                                   >>   8  *
                                                   >>   9  * This program is distributed in the hope that it will be useful,
                                                   >>  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                                                   >>  11  * GNU General Public License for more details.
  5  */                                                12  */
  6                                                    13 
  7 #include <dt-bindings/interrupt-controller/irq     14 #include <dt-bindings/interrupt-controller/irq.h>
  8 #include <dt-bindings/interrupt-controller/arm     15 #include <dt-bindings/interrupt-controller/arm-gic.h>
  9                                                    16 
 10 / {                                                17 / {
 11         compatible = "mediatek,mt6755";            18         compatible = "mediatek,mt6755";
 12         interrupt-parent = <&sysirq>;              19         interrupt-parent = <&sysirq>;
 13         #address-cells = <2>;                      20         #address-cells = <2>;
 14         #size-cells = <2>;                         21         #size-cells = <2>;
 15                                                    22 
 16         psci {                                     23         psci {
 17                 compatible = "arm,psci-0.2";       24                 compatible = "arm,psci-0.2";
 18                 method = "smc";                    25                 method = "smc";
 19         };                                         26         };
 20                                                    27 
 21         cpus {                                     28         cpus {
 22                 #address-cells = <1>;              29                 #address-cells = <1>;
 23                 #size-cells = <0>;                 30                 #size-cells = <0>;
 24                                                    31 
 25                 cpu0: cpu@0 {                      32                 cpu0: cpu@0 {
 26                         device_type = "cpu";       33                         device_type = "cpu";
 27                         compatible = "arm,cort     34                         compatible = "arm,cortex-a53";
 28                         enable-method = "psci"     35                         enable-method = "psci";
 29                         reg = <0x000>;             36                         reg = <0x000>;
 30                 };                                 37                 };
 31                                                    38 
 32                 cpu1: cpu@1 {                      39                 cpu1: cpu@1 {
 33                         device_type = "cpu";       40                         device_type = "cpu";
 34                         compatible = "arm,cort     41                         compatible = "arm,cortex-a53";
 35                         enable-method = "psci"     42                         enable-method = "psci";
 36                         reg = <0x001>;             43                         reg = <0x001>;
 37                 };                                 44                 };
 38                                                    45 
 39                 cpu2: cpu@2 {                      46                 cpu2: cpu@2 {
 40                         device_type = "cpu";       47                         device_type = "cpu";
 41                         compatible = "arm,cort     48                         compatible = "arm,cortex-a53";
 42                         enable-method = "psci"     49                         enable-method = "psci";
 43                         reg = <0x002>;             50                         reg = <0x002>;
 44                 };                                 51                 };
 45                                                    52 
 46                 cpu3: cpu@3 {                      53                 cpu3: cpu@3 {
 47                         device_type = "cpu";       54                         device_type = "cpu";
 48                         compatible = "arm,cort     55                         compatible = "arm,cortex-a53";
 49                         enable-method = "psci"     56                         enable-method = "psci";
 50                         reg = <0x003>;             57                         reg = <0x003>;
 51                 };                                 58                 };
 52                                                    59 
 53                 cpu4: cpu@100 {                    60                 cpu4: cpu@100 {
 54                         device_type = "cpu";       61                         device_type = "cpu";
 55                         compatible = "arm,cort     62                         compatible = "arm,cortex-a53";
 56                         enable-method = "psci"     63                         enable-method = "psci";
 57                         reg = <0x100>;             64                         reg = <0x100>;
 58                 };                                 65                 };
 59                                                    66 
 60                 cpu5: cpu@101 {                    67                 cpu5: cpu@101 {
 61                         device_type = "cpu";       68                         device_type = "cpu";
 62                         compatible = "arm,cort     69                         compatible = "arm,cortex-a53";
 63                         enable-method = "psci"     70                         enable-method = "psci";
 64                         reg = <0x101>;             71                         reg = <0x101>;
 65                 };                                 72                 };
 66                                                    73 
 67                 cpu6: cpu@102 {                    74                 cpu6: cpu@102 {
 68                         device_type = "cpu";       75                         device_type = "cpu";
 69                         compatible = "arm,cort     76                         compatible = "arm,cortex-a53";
 70                         enable-method = "psci"     77                         enable-method = "psci";
 71                         reg = <0x102>;             78                         reg = <0x102>;
 72                 };                                 79                 };
 73                                                    80 
 74                 cpu7: cpu@103 {                    81                 cpu7: cpu@103 {
 75                         device_type = "cpu";       82                         device_type = "cpu";
 76                         compatible = "arm,cort     83                         compatible = "arm,cortex-a53";
 77                         enable-method = "psci"     84                         enable-method = "psci";
 78                         reg = <0x103>;             85                         reg = <0x103>;
 79                 };                                 86                 };
 80         };                                         87         };
 81                                                    88 
 82         uart_clk: dummy26m {                       89         uart_clk: dummy26m {
 83                 compatible = "fixed-clock";        90                 compatible = "fixed-clock";
 84                 clock-frequency = <26000000>;      91                 clock-frequency = <26000000>;
 85                 #clock-cells = <0>;                92                 #clock-cells = <0>;
 86         };                                         93         };
 87                                                    94 
 88         timer {                                    95         timer {
 89                 compatible = "arm,armv8-timer"     96                 compatible = "arm,armv8-timer";
 90                 interrupt-parent = <&gic>;         97                 interrupt-parent = <&gic>;
 91                 interrupts = <GIC_PPI 13           98                 interrupts = <GIC_PPI 13
 92                              (GIC_CPU_MASK_SIM     99                              (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 93                              <GIC_PPI 14          100                              <GIC_PPI 14
 94                              (GIC_CPU_MASK_SIM    101                              (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 95                              <GIC_PPI 11          102                              <GIC_PPI 11
 96                              (GIC_CPU_MASK_SIM    103                              (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
 97                              <GIC_PPI 10          104                              <GIC_PPI 10
 98                              (GIC_CPU_MASK_SIM    105                              (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 99         };                                        106         };
100                                                   107 
101         sysirq: intpol-controller@10200620 {      108         sysirq: intpol-controller@10200620 {
102                 compatible = "mediatek,mt6755-    109                 compatible = "mediatek,mt6755-sysirq",
103                              "mediatek,mt6577-    110                              "mediatek,mt6577-sysirq";
104                 interrupt-controller;             111                 interrupt-controller;
105                 #interrupt-cells = <3>;           112                 #interrupt-cells = <3>;
106                 interrupt-parent = <&gic>;        113                 interrupt-parent = <&gic>;
107                 reg = <0 0x10200620 0 0x20>;      114                 reg = <0 0x10200620 0 0x20>;
108         };                                        115         };
109                                                   116 
110         gic: interrupt-controller@10231000 {      117         gic: interrupt-controller@10231000 {
111                 compatible = "arm,gic-400";       118                 compatible = "arm,gic-400";
112                 #interrupt-cells = <3>;           119                 #interrupt-cells = <3>;
113                 interrupt-parent = <&gic>;        120                 interrupt-parent = <&gic>;
114                 interrupt-controller;             121                 interrupt-controller;
115                 reg = <0 0x10231000 0 0x1000>,    122                 reg = <0 0x10231000 0 0x1000>,
116                       <0 0x10232000 0 0x2000>,    123                       <0 0x10232000 0 0x2000>,
117                       <0 0x10234000 0 0x2000>,    124                       <0 0x10234000 0 0x2000>,
118                       <0 0x10236000 0 0x2000>;    125                       <0 0x10236000 0 0x2000>;
119         };                                        126         };
120                                                   127 
121         uart0: serial@11002000 {                  128         uart0: serial@11002000 {
122                 compatible = "mediatek,mt6755-    129                 compatible = "mediatek,mt6755-uart",
123                              "mediatek,mt6577-    130                              "mediatek,mt6577-uart";
124                 reg = <0 0x11002000 0 0x400>;     131                 reg = <0 0x11002000 0 0x400>;
125                 interrupts = <GIC_SPI 91 IRQ_T    132                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
126                 clocks = <&uart_clk>;             133                 clocks = <&uart_clk>;
127                 status = "disabled";              134                 status = "disabled";
128         };                                        135         };
129                                                   136 
130         uart1: serial@11003000 {                  137         uart1: serial@11003000 {
131                 compatible = "mediatek,mt6755-    138                 compatible = "mediatek,mt6755-uart",
132                              "mediatek,mt6577-    139                              "mediatek,mt6577-uart";
133                 reg = <0 0x11003000 0 0x400>;     140                 reg = <0 0x11003000 0 0x400>;
134                 interrupts = <GIC_SPI 92 IRQ_T    141                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
135                 clocks = <&uart_clk>;             142                 clocks = <&uart_clk>;
136                 status = "disabled";              143                 status = "disabled";
137         };                                        144         };
138 };                                                145 };
                                                      

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