1 // SPDX-License-Identifier: GPL-2.0-only OR MI 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
2 2
3 /dts-v1/; 3 /dts-v1/;
4 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/leds/common.h>
7 7
8 #include "mt7986a.dtsi" 8 #include "mt7986a.dtsi"
9 9
10 / { 10 / {
11 compatible = "acelink,ew-7886cax", "me 11 compatible = "acelink,ew-7886cax", "mediatek,mt7986a";
12 model = "Acelink EW-7886CAX"; 12 model = "Acelink EW-7886CAX";
13 13
14 aliases { 14 aliases {
15 serial0 = &uart0; 15 serial0 = &uart0;
16 }; 16 };
17 17
18 chosen { 18 chosen {
19 stdout-path = "serial0:115200n 19 stdout-path = "serial0:115200n8";
20 }; 20 };
21 21
22 memory@40000000 { 22 memory@40000000 {
23 reg = <0 0x40000000 0 0x200000 23 reg = <0 0x40000000 0 0x20000000>;
24 device_type = "memory"; 24 device_type = "memory";
25 }; 25 };
26 26
27 keys { 27 keys {
28 compatible = "gpio-keys"; 28 compatible = "gpio-keys";
29 29
30 key-restart { 30 key-restart {
31 label = "Reset"; 31 label = "Reset";
32 gpios = <&pio 7 GPIO_A 32 gpios = <&pio 7 GPIO_ACTIVE_LOW>;
33 linux,code = <KEY_REST 33 linux,code = <KEY_RESTART>;
34 }; 34 };
35 }; 35 };
36 36
37 leds { 37 leds {
38 compatible = "gpio-leds"; 38 compatible = "gpio-leds";
39 39
40 led-0 { 40 led-0 {
41 function = LED_FUNCTIO 41 function = LED_FUNCTION_STATUS;
42 color = <LED_COLOR_ID_ 42 color = <LED_COLOR_ID_RED>;
43 gpios = <&pio 18 GPIO_ 43 gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
44 }; 44 };
45 45
46 led-1 { 46 led-1 {
47 function = LED_FUNCTIO 47 function = LED_FUNCTION_STATUS;
48 color = <LED_COLOR_ID_ 48 color = <LED_COLOR_ID_GREEN>;
49 gpios = <&pio 19 GPIO_ 49 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
50 }; 50 };
51 51
52 led-2 { 52 led-2 {
53 function = LED_FUNCTIO 53 function = LED_FUNCTION_STATUS;
54 color = <LED_COLOR_ID_ 54 color = <LED_COLOR_ID_BLUE>;
55 gpios = <&pio 20 GPIO_ 55 gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
56 }; 56 };
57 }; 57 };
58 }; 58 };
59 59
60 &crypto { 60 &crypto {
61 status = "okay"; 61 status = "okay";
62 }; 62 };
63 63
64 ð { 64 ð {
65 status = "okay"; 65 status = "okay";
66 66
67 mac@1 { 67 mac@1 {
68 compatible = "mediatek,eth-mac 68 compatible = "mediatek,eth-mac";
69 reg = <1>; 69 reg = <1>;
70 phy-mode = "2500base-x"; 70 phy-mode = "2500base-x";
71 phy-handle = <&phy6>; 71 phy-handle = <&phy6>;
72 nvmem-cells = <&macaddr>; 72 nvmem-cells = <&macaddr>;
73 nvmem-cell-names = "mac-addres 73 nvmem-cell-names = "mac-address";
74 }; 74 };
75 75
76 mdio-bus { 76 mdio-bus {
77 reset-gpios = <&pio 6 GPIO_ACT 77 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
78 reset-delay-us = <50000>; 78 reset-delay-us = <50000>;
79 reset-post-delay-us = <20000>; 79 reset-post-delay-us = <20000>;
80 80
81 #address-cells = <1>; 81 #address-cells = <1>;
82 #size-cells = <0>; 82 #size-cells = <0>;
83 83
84 phy6: phy@6 { 84 phy6: phy@6 {
85 compatible = "ethernet 85 compatible = "ethernet-phy-ieee802.3-c45";
86 reg = <6>; 86 reg = <6>;
87 }; 87 };
88 }; 88 };
89 }; 89 };
90 90
91 &pcie_phy { 91 &pcie_phy {
92 status = "okay"; 92 status = "okay";
93 }; 93 };
94 94
95 &spi0 { 95 &spi0 {
96 status = "okay"; 96 status = "okay";
97 97
98 flash@0 { 98 flash@0 {
99 compatible = "spi-nand"; 99 compatible = "spi-nand";
100 reg = <0>; 100 reg = <0>;
101 #address-cells = <1>; 101 #address-cells = <1>;
102 #size-cells = <1>; 102 #size-cells = <1>;
103 spi-max-frequency = <52000000> 103 spi-max-frequency = <52000000>;
104 spi-rx-bus-width = <4>; 104 spi-rx-bus-width = <4>;
105 spi-tx-bus-width = <4>; 105 spi-tx-bus-width = <4>;
106 106
107 partitions { 107 partitions {
108 compatible = "fixed-pa 108 compatible = "fixed-partitions";
109 #address-cells = <1>; 109 #address-cells = <1>;
110 #size-cells = <1>; 110 #size-cells = <1>;
111 111
112 partition@0 { 112 partition@0 {
113 reg = <0x0 0x1 113 reg = <0x0 0x100000>;
114 label = "bootl 114 label = "bootloader";
115 read-only; 115 read-only;
116 }; 116 };
117 117
118 partition@100000 { 118 partition@100000 {
119 reg = <0x10000 119 reg = <0x100000 0x80000>;
120 label = "u-boo 120 label = "u-boot-env";
121 }; 121 };
122 122
123 partition@180000 { 123 partition@180000 {
124 compatible = " 124 compatible = "nvmem-cells";
125 reg = <0x18000 125 reg = <0x180000 0x200000>;
126 label = "facto 126 label = "factory";
127 read-only; 127 read-only;
128 128
129 nvmem-layout { 129 nvmem-layout {
130 compat 130 compatible = "fixed-layout";
131 #addre 131 #address-cells = <1>;
132 #size- 132 #size-cells = <1>;
133 133
134 eeprom 134 eeprom: eeprom@0 {
135 135 reg = <0x0 0x1000>;
136 }; 136 };
137 137
138 macadd 138 macaddr: macaddr@4 {
139 139 reg = <0x4 0x6>;
140 }; 140 };
141 }; 141 };
142 }; 142 };
143 143
144 partition@380000 { 144 partition@380000 {
145 reg = <0x38000 145 reg = <0x380000 0x200000>;
146 label = "fip"; 146 label = "fip";
147 }; 147 };
148 148
149 partition@580000 { 149 partition@580000 {
150 reg = <0x58000 150 reg = <0x580000 0x4000000>;
151 label = "ubi"; 151 label = "ubi";
152 }; 152 };
153 }; 153 };
154 }; 154 };
155 }; 155 };
156 156
157 &trng { 157 &trng {
158 status = "okay"; 158 status = "okay";
159 }; 159 };
160 160
161 &uart0 { 161 &uart0 {
162 status = "okay"; 162 status = "okay";
163 }; 163 };
164 164
165 &watchdog { 165 &watchdog {
166 status = "okay"; 166 status = "okay";
167 }; 167 };
168 168
169 &wifi { 169 &wifi {
170 nvmem-cells = <&eeprom>; 170 nvmem-cells = <&eeprom>;
171 nvmem-cell-names = "eeprom"; 171 nvmem-cell-names = "eeprom";
172 status = "okay"; 172 status = "okay";
173 }; 173 };
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