1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 2 /* 3 * Copyright 2016 MediaTek Inc. 3 * Copyright 2016 MediaTek Inc. 4 */ 4 */ 5 5 6 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes. 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-reg 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include "mt8173.dtsi" 10 #include "mt8173.dtsi" 11 11 12 / { 12 / { 13 aliases { << 14 mmc0 = &mmc0; << 15 mmc1 = &mmc1; << 16 mmc2 = &mmc3; << 17 }; << 18 << 19 memory@40000000 { 13 memory@40000000 { 20 device_type = "memory"; 14 device_type = "memory"; 21 reg = <0 0x40000000 0 0x800000 15 reg = <0 0x40000000 0 0x80000000>; 22 }; 16 }; 23 17 24 backlight: backlight { 18 backlight: backlight { 25 compatible = "pwm-backlight"; 19 compatible = "pwm-backlight"; 26 pwms = <&pwm0 0 1000000>; 20 pwms = <&pwm0 0 1000000>; 27 power-supply = <&bl_fixed_reg> 21 power-supply = <&bl_fixed_reg>; 28 enable-gpios = <&pio 95 GPIO_A 22 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 29 23 30 pinctrl-names = "default"; 24 pinctrl-names = "default"; 31 pinctrl-0 = <&panel_backlight_ !! 25 pinctrl-0 = <&disp_pwm0_pins>; 32 status = "okay"; 26 status = "okay"; 33 }; 27 }; 34 28 35 bl_fixed_reg: fixedregulator2 { 29 bl_fixed_reg: fixedregulator2 { 36 compatible = "regulator-fixed" 30 compatible = "regulator-fixed"; 37 regulator-name = "bl_fixed"; 31 regulator-name = "bl_fixed"; 38 regulator-min-microvolt = <180 32 regulator-min-microvolt = <1800000>; 39 regulator-max-microvolt = <180 33 regulator-max-microvolt = <1800000>; 40 startup-delay-us = <1000>; 34 startup-delay-us = <1000>; 41 enable-active-high; 35 enable-active-high; 42 gpio = <&pio 32 GPIO_ACTIVE_HI 36 gpio = <&pio 32 GPIO_ACTIVE_HIGH>; 43 pinctrl-names = "default"; 37 pinctrl-names = "default"; 44 pinctrl-0 = <&bl_fixed_pins>; 38 pinctrl-0 = <&bl_fixed_pins>; 45 }; 39 }; 46 40 47 chosen { 41 chosen { 48 stdout-path = "serial0:115200n 42 stdout-path = "serial0:115200n8"; 49 }; 43 }; 50 44 51 gpio_keys: gpio-keys { 45 gpio_keys: gpio-keys { 52 compatible = "gpio-keys"; 46 compatible = "gpio-keys"; 53 pinctrl-names = "default"; 47 pinctrl-names = "default"; 54 pinctrl-0 = <&gpio_keys_pins>; 48 pinctrl-0 = <&gpio_keys_pins>; 55 49 56 switch-lid { !! 50 lid { 57 label = "Lid"; 51 label = "Lid"; 58 gpios = <&pio 69 GPIO_ 52 gpios = <&pio 69 GPIO_ACTIVE_LOW>; 59 linux,code = <SW_LID>; 53 linux,code = <SW_LID>; 60 linux,input-type = <EV 54 linux,input-type = <EV_SW>; 61 wakeup-source; !! 55 gpio-key,wakeup; 62 }; 56 }; 63 57 64 switch-power { !! 58 power { 65 label = "Power"; 59 label = "Power"; 66 gpios = <&pio 14 GPIO_ 60 gpios = <&pio 14 GPIO_ACTIVE_HIGH>; 67 linux,code = <KEY_POWE 61 linux,code = <KEY_POWER>; 68 debounce-interval = <3 62 debounce-interval = <30>; 69 wakeup-source; !! 63 gpio-key,wakeup; 70 }; 64 }; 71 65 72 switch-tablet-mode { !! 66 tablet_mode { 73 label = "Tablet_mode"; 67 label = "Tablet_mode"; 74 gpios = <&pio 121 GPIO 68 gpios = <&pio 121 GPIO_ACTIVE_HIGH>; 75 linux,code = <SW_TABLE 69 linux,code = <SW_TABLET_MODE>; 76 linux,input-type = <EV 70 linux,input-type = <EV_SW>; 77 wakeup-source; !! 71 gpio-key,wakeup; 78 }; 72 }; 79 73 80 switch-volume-down { !! 74 volume_down { 81 label = "Volume_down"; 75 label = "Volume_down"; 82 gpios = <&pio 123 GPIO 76 gpios = <&pio 123 GPIO_ACTIVE_LOW>; 83 linux,code = <KEY_VOLU 77 linux,code = <KEY_VOLUMEDOWN>; 84 }; 78 }; 85 79 86 switch-volume-up { !! 80 volume_up { 87 label = "Volume_up"; 81 label = "Volume_up"; 88 gpios = <&pio 124 GPIO 82 gpios = <&pio 124 GPIO_ACTIVE_LOW>; 89 linux,code = <KEY_VOLU 83 linux,code = <KEY_VOLUMEUP>; 90 }; 84 }; 91 }; 85 }; 92 86 >> 87 panel: panel { >> 88 compatible = "lg,lp120up1"; >> 89 power-supply = <&panel_fixed_3v3>; >> 90 ddc-i2c-bus = <&i2c0>; >> 91 backlight = <&backlight>; >> 92 >> 93 port { >> 94 panel_in: endpoint { >> 95 remote-endpoint = <&ps8640_out>; >> 96 }; >> 97 }; >> 98 }; >> 99 93 panel_fixed_3v3: regulator1 { 100 panel_fixed_3v3: regulator1 { 94 compatible = "regulator-fixed" 101 compatible = "regulator-fixed"; 95 regulator-name = "PANEL_3V3"; 102 regulator-name = "PANEL_3V3"; 96 regulator-min-microvolt = <330 103 regulator-min-microvolt = <3300000>; 97 regulator-max-microvolt = <330 104 regulator-max-microvolt = <3300000>; 98 enable-active-high; 105 enable-active-high; 99 regulator-boot-on; << 100 off-on-delay-us = <500000>; << 101 gpio = <&pio 41 GPIO_ACTIVE_HI 106 gpio = <&pio 41 GPIO_ACTIVE_HIGH>; 102 pinctrl-names = "default"; 107 pinctrl-names = "default"; 103 pinctrl-0 = <&panel_fixed_pins 108 pinctrl-0 = <&panel_fixed_pins>; 104 }; 109 }; 105 110 106 ps8640_fixed_1v2: regulator2 { 111 ps8640_fixed_1v2: regulator2 { 107 compatible = "regulator-fixed" 112 compatible = "regulator-fixed"; 108 regulator-name = "PS8640_1V2"; 113 regulator-name = "PS8640_1V2"; 109 regulator-min-microvolt = <120 114 regulator-min-microvolt = <1200000>; 110 regulator-max-microvolt = <120 115 regulator-max-microvolt = <1200000>; 111 regulator-enable-ramp-delay = 116 regulator-enable-ramp-delay = <2000>; 112 enable-active-high; 117 enable-active-high; 113 regulator-boot-on; 118 regulator-boot-on; 114 gpio = <&pio 30 GPIO_ACTIVE_HI 119 gpio = <&pio 30 GPIO_ACTIVE_HIGH>; 115 pinctrl-names = "default"; 120 pinctrl-names = "default"; 116 pinctrl-0 = <&ps8640_fixed_pin 121 pinctrl-0 = <&ps8640_fixed_pins>; 117 }; 122 }; 118 123 119 sdio_fixed_3v3: fixedregulator0 { 124 sdio_fixed_3v3: fixedregulator0 { 120 compatible = "regulator-fixed" 125 compatible = "regulator-fixed"; 121 regulator-name = "3V3"; 126 regulator-name = "3V3"; 122 regulator-min-microvolt = <330 127 regulator-min-microvolt = <3300000>; 123 regulator-max-microvolt = <330 128 regulator-max-microvolt = <3300000>; 124 gpio = <&pio 85 GPIO_ACTIVE_HI 129 gpio = <&pio 85 GPIO_ACTIVE_HIGH>; 125 pinctrl-names = "default"; 130 pinctrl-names = "default"; 126 pinctrl-0 = <&sdio_fixed_3v3_p 131 pinctrl-0 = <&sdio_fixed_3v3_pins>; 127 }; 132 }; 128 133 129 sound: sound { 134 sound: sound { 130 compatible = "mediatek,mt8173- 135 compatible = "mediatek,mt8173-rt5650"; 131 mediatek,audio-codec = <&rt565 136 mediatek,audio-codec = <&rt5650 &hdmi0>; 132 mediatek,platform = <&afe>; 137 mediatek,platform = <&afe>; 133 pinctrl-names = "default"; 138 pinctrl-names = "default"; 134 pinctrl-0 = <&aud_i2s2>; 139 pinctrl-0 = <&aud_i2s2>; 135 140 136 mediatek,mclk = <1>; 141 mediatek,mclk = <1>; 137 codec-capture { 142 codec-capture { 138 sound-dai = <&rt5650 1 143 sound-dai = <&rt5650 1>; 139 }; 144 }; 140 }; 145 }; 141 146 142 hdmicon: connector { 147 hdmicon: connector { 143 compatible = "hdmi-connector"; 148 compatible = "hdmi-connector"; 144 label = "hdmi"; 149 label = "hdmi"; 145 type = "a"; 150 type = "a"; 146 ddc-i2c-bus = <&hdmiddc0>; 151 ddc-i2c-bus = <&hdmiddc0>; 147 152 148 port { 153 port { 149 hdmi_connector_in: end 154 hdmi_connector_in: endpoint { 150 remote-endpoin 155 remote-endpoint = <&hdmi0_out>; 151 }; 156 }; 152 }; 157 }; 153 }; 158 }; 154 << 155 watchdog { << 156 compatible = "arm,smc-wdt"; << 157 }; << 158 }; << 159 << 160 /* << 161 * Disable the original MMIO watch dog and swi << 162 * operates on the same MMIO. << 163 */ << 164 &watchdog { << 165 status = "disabled"; << 166 }; << 167 << 168 &mfg_async { << 169 domain-supply = <&da9211_vgpu_reg>; << 170 }; 159 }; 171 160 172 &cec { 161 &cec { 173 status = "okay"; 162 status = "okay"; 174 }; 163 }; 175 164 176 &cpu0 { 165 &cpu0 { 177 proc-supply = <&mt6397_vpca15_reg>; 166 proc-supply = <&mt6397_vpca15_reg>; 178 }; 167 }; 179 168 180 &cpu1 { 169 &cpu1 { 181 proc-supply = <&mt6397_vpca15_reg>; 170 proc-supply = <&mt6397_vpca15_reg>; 182 }; 171 }; 183 172 184 &cpu2 { 173 &cpu2 { 185 proc-supply = <&da9211_vcpu_reg>; 174 proc-supply = <&da9211_vcpu_reg>; 186 sram-supply = <&mt6397_vsramca7_reg>; 175 sram-supply = <&mt6397_vsramca7_reg>; 187 }; 176 }; 188 177 189 &cpu3 { 178 &cpu3 { 190 proc-supply = <&da9211_vcpu_reg>; 179 proc-supply = <&da9211_vcpu_reg>; 191 sram-supply = <&mt6397_vsramca7_reg>; 180 sram-supply = <&mt6397_vsramca7_reg>; 192 }; 181 }; 193 182 194 &cpu_thermal { 183 &cpu_thermal { 195 sustainable-power = <4500>; /* milliwa 184 sustainable-power = <4500>; /* milliwatts */ 196 trips { 185 trips { 197 threshold: trip-point0 { 186 threshold: trip-point0 { 198 temperature = <60000>; 187 temperature = <60000>; 199 }; 188 }; 200 189 201 target: trip-point1 { 190 target: trip-point1 { 202 temperature = <65000>; 191 temperature = <65000>; 203 }; 192 }; 204 }; 193 }; 205 }; 194 }; 206 195 207 &dsi0 { 196 &dsi0 { 208 status = "okay"; 197 status = "okay"; 209 ports { 198 ports { 210 port { 199 port { 211 dsi0_out: endpoint { 200 dsi0_out: endpoint { 212 remote-endpoin 201 remote-endpoint = <&ps8640_in>; 213 }; 202 }; 214 }; 203 }; 215 }; 204 }; 216 }; 205 }; 217 206 218 &dpi0 { 207 &dpi0 { 219 status = "okay"; 208 status = "okay"; 220 }; 209 }; 221 210 222 &hdmi0 { 211 &hdmi0 { 223 status = "okay"; 212 status = "okay"; 224 ports { 213 ports { 225 port@1 { 214 port@1 { 226 reg = <1>; 215 reg = <1>; 227 216 228 hdmi0_out: endpoint { 217 hdmi0_out: endpoint { 229 remote-endpoin 218 remote-endpoint = <&hdmi_connector_in>; 230 }; 219 }; 231 }; 220 }; 232 }; 221 }; 233 }; 222 }; 234 223 235 &hdmi_phy { 224 &hdmi_phy { 236 status = "okay"; 225 status = "okay"; 237 mediatek,ibias = <0xc>; 226 mediatek,ibias = <0xc>; 238 }; 227 }; 239 228 240 &i2c0 { 229 &i2c0 { 241 status = "okay"; 230 status = "okay"; 242 231 243 rt5650: audio-codec@1a { 232 rt5650: audio-codec@1a { 244 compatible = "realtek,rt5650"; 233 compatible = "realtek,rt5650"; 245 reg = <0x1a>; 234 reg = <0x1a>; 246 avdd-supply = <&mt6397_vgp1_re 235 avdd-supply = <&mt6397_vgp1_reg>; 247 cpvdd-supply = <&mt6397_vcama_ 236 cpvdd-supply = <&mt6397_vcama_reg>; 248 interrupts-extended = <&pio 3 !! 237 interrupt-parent = <&pio>; >> 238 interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 249 pinctrl-names = "default"; 239 pinctrl-names = "default"; 250 pinctrl-0 = <&rt5650_irq>; 240 pinctrl-0 = <&rt5650_irq>; 251 #sound-dai-cells = <1>; 241 #sound-dai-cells = <1>; 252 realtek,dmic1-data-pin = <2>; 242 realtek,dmic1-data-pin = <2>; 253 realtek,jd-mode = <2>; 243 realtek,jd-mode = <2>; 254 }; 244 }; 255 245 256 ps8640: edp-bridge@8 { 246 ps8640: edp-bridge@8 { 257 compatible = "parade,ps8640"; 247 compatible = "parade,ps8640"; 258 reg = <0x8>; 248 reg = <0x8>; 259 powerdown-gpios = <&pio 127 GP 249 powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>; 260 reset-gpios = <&pio 115 GPIO_A 250 reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>; 261 pinctrl-names = "default"; 251 pinctrl-names = "default"; 262 pinctrl-0 = <&ps8640_pins>; 252 pinctrl-0 = <&ps8640_pins>; 263 vdd12-supply = <&ps8640_fixed_ 253 vdd12-supply = <&ps8640_fixed_1v2>; 264 vdd33-supply = <&mt6397_vgp2_r 254 vdd33-supply = <&mt6397_vgp2_reg>; 265 255 266 ports { 256 ports { 267 #address-cells = <1>; 257 #address-cells = <1>; 268 #size-cells = <0>; 258 #size-cells = <0>; 269 259 270 port@0 { 260 port@0 { 271 reg = <0>; 261 reg = <0>; 272 262 273 ps8640_in: end 263 ps8640_in: endpoint { 274 remote 264 remote-endpoint = <&dsi0_out>; 275 }; 265 }; 276 }; 266 }; 277 267 278 port@1 { 268 port@1 { 279 reg = <1>; 269 reg = <1>; 280 270 281 ps8640_out: en 271 ps8640_out: endpoint { 282 remote 272 remote-endpoint = <&panel_in>; 283 }; 273 }; 284 }; 274 }; 285 }; 275 }; 286 << 287 aux-bus { << 288 panel: panel { << 289 compatible = " << 290 power-supply = << 291 backlight = <& << 292 << 293 port { << 294 panel_ << 295 << 296 }; << 297 }; << 298 }; << 299 }; << 300 }; 276 }; 301 }; 277 }; 302 278 303 &i2c1 { 279 &i2c1 { 304 clock-frequency = <1500000>; 280 clock-frequency = <1500000>; 305 status = "okay"; 281 status = "okay"; 306 282 307 da9211: da9211@68 { 283 da9211: da9211@68 { 308 compatible = "dlg,da9211"; 284 compatible = "dlg,da9211"; 309 reg = <0x68>; 285 reg = <0x68>; 310 interrupts-extended = <&pio 15 !! 286 interrupt-parent = <&pio>; >> 287 interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 311 288 312 regulators { 289 regulators { 313 da9211_vcpu_reg: BUCKA 290 da9211_vcpu_reg: BUCKA { 314 regulator-name 291 regulator-name = "VBUCKA"; 315 regulator-min- 292 regulator-min-microvolt = < 700000>; 316 regulator-max- 293 regulator-max-microvolt = <1310000>; 317 regulator-min- !! 294 regulator-min-microamp = <2000000>; 318 regulator-max- !! 295 regulator-max-microamp = <4400000>; 319 regulator-ramp 296 regulator-ramp-delay = <10000>; 320 regulator-alwa 297 regulator-always-on; 321 regulator-allo 298 regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC 322 299 DA9211_BUCK_MODE_AUTO>; 323 }; 300 }; 324 301 325 da9211_vgpu_reg: BUCKB 302 da9211_vgpu_reg: BUCKB { 326 regulator-name 303 regulator-name = "VBUCKB"; 327 regulator-min- 304 regulator-min-microvolt = < 700000>; 328 regulator-max- 305 regulator-max-microvolt = <1310000>; 329 regulator-min- !! 306 regulator-min-microamp = <2000000>; 330 regulator-max- !! 307 regulator-max-microamp = <3000000>; 331 regulator-ramp 308 regulator-ramp-delay = <10000>; 332 }; 309 }; 333 }; 310 }; 334 }; 311 }; 335 }; 312 }; 336 313 337 &i2c2 { 314 &i2c2 { 338 status = "okay"; 315 status = "okay"; 339 316 340 tpm: tpm@20 { 317 tpm: tpm@20 { 341 compatible = "infineon,slb9645 318 compatible = "infineon,slb9645tt"; 342 reg = <0x20>; 319 reg = <0x20>; 343 powered-while-suspended; 320 powered-while-suspended; 344 }; 321 }; 345 }; 322 }; 346 323 347 &i2c3 { 324 &i2c3 { 348 clock-frequency = <400000>; 325 clock-frequency = <400000>; 349 status = "okay"; 326 status = "okay"; 350 327 351 touchscreen: touchscreen@10 { 328 touchscreen: touchscreen@10 { 352 compatible = "elan,ekth3500"; 329 compatible = "elan,ekth3500"; 353 reg = <0x10>; 330 reg = <0x10>; 354 interrupts-extended = <&pio 88 !! 331 interrupt-parent = <&pio>; >> 332 interrupts = <88 IRQ_TYPE_LEVEL_LOW>; 355 }; 333 }; 356 }; 334 }; 357 335 358 &i2c4 { 336 &i2c4 { 359 clock-frequency = <400000>; 337 clock-frequency = <400000>; 360 status = "okay"; 338 status = "okay"; 361 pinctrl-names = "default"; 339 pinctrl-names = "default"; 362 pinctrl-0 = <&trackpad_irq>; 340 pinctrl-0 = <&trackpad_irq>; 363 341 364 trackpad: trackpad@15 { 342 trackpad: trackpad@15 { 365 compatible = "elan,ekth3000"; 343 compatible = "elan,ekth3000"; 366 interrupts-extended = <&pio 11 !! 344 interrupt-parent = <&pio>; >> 345 interrupts = <117 IRQ_TYPE_LEVEL_LOW>; 367 reg = <0x15>; 346 reg = <0x15>; 368 vcc-supply = <&mt6397_vgp6_reg 347 vcc-supply = <&mt6397_vgp6_reg>; 369 wakeup-source; 348 wakeup-source; 370 }; 349 }; 371 }; 350 }; 372 351 373 &mipi_tx0 { 352 &mipi_tx0 { 374 status = "okay"; 353 status = "okay"; 375 }; 354 }; 376 355 377 &mmc0 { 356 &mmc0 { 378 status = "okay"; 357 status = "okay"; 379 pinctrl-names = "default", "state_uhs" 358 pinctrl-names = "default", "state_uhs"; 380 pinctrl-0 = <&mmc0_pins_default>; 359 pinctrl-0 = <&mmc0_pins_default>; 381 pinctrl-1 = <&mmc0_pins_uhs>; 360 pinctrl-1 = <&mmc0_pins_uhs>; 382 bus-width = <8>; 361 bus-width = <8>; 383 max-frequency = <200000000>; 362 max-frequency = <200000000>; 384 cap-mmc-highspeed; 363 cap-mmc-highspeed; 385 mmc-hs200-1_8v; 364 mmc-hs200-1_8v; 386 mmc-hs400-1_8v; 365 mmc-hs400-1_8v; 387 cap-mmc-hw-reset; 366 cap-mmc-hw-reset; 388 hs400-ds-delay = <0x14015>; 367 hs400-ds-delay = <0x14015>; 389 mediatek,hs200-cmd-int-delay = <30>; !! 368 mediatek,hs200-cmd-int-delay=<30>; 390 mediatek,hs400-cmd-int-delay = <14>; !! 369 mediatek,hs400-cmd-int-delay=<14>; 391 mediatek,hs400-cmd-resp-sel-rising; 370 mediatek,hs400-cmd-resp-sel-rising; 392 vmmc-supply = <&mt6397_vemc_3v3_reg>; 371 vmmc-supply = <&mt6397_vemc_3v3_reg>; 393 vqmmc-supply = <&mt6397_vio18_reg>; 372 vqmmc-supply = <&mt6397_vio18_reg>; 394 assigned-clocks = <&topckgen CLK_TOP_M 373 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; 395 assigned-clock-parents = <&topckgen CL 374 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>; 396 non-removable; 375 non-removable; 397 }; 376 }; 398 377 399 &mmc1 { 378 &mmc1 { 400 status = "okay"; 379 status = "okay"; 401 pinctrl-names = "default", "state_uhs" 380 pinctrl-names = "default", "state_uhs"; 402 pinctrl-0 = <&mmc1_pins_default>; 381 pinctrl-0 = <&mmc1_pins_default>; 403 pinctrl-1 = <&mmc1_pins_uhs>; 382 pinctrl-1 = <&mmc1_pins_uhs>; 404 bus-width = <4>; 383 bus-width = <4>; 405 max-frequency = <200000000>; 384 max-frequency = <200000000>; 406 cap-sd-highspeed; 385 cap-sd-highspeed; 407 sd-uhs-sdr50; 386 sd-uhs-sdr50; 408 sd-uhs-sdr104; 387 sd-uhs-sdr104; 409 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>; 388 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>; 410 vmmc-supply = <&mt6397_vmch_reg>; 389 vmmc-supply = <&mt6397_vmch_reg>; 411 vqmmc-supply = <&mt6397_vmc_reg>; 390 vqmmc-supply = <&mt6397_vmc_reg>; 412 }; 391 }; 413 392 414 &mmc3 { 393 &mmc3 { 415 status = "okay"; 394 status = "okay"; 416 pinctrl-names = "default", "state_uhs" 395 pinctrl-names = "default", "state_uhs"; 417 pinctrl-0 = <&mmc3_pins_default>; 396 pinctrl-0 = <&mmc3_pins_default>; 418 pinctrl-1 = <&mmc3_pins_uhs>; 397 pinctrl-1 = <&mmc3_pins_uhs>; 419 bus-width = <4>; 398 bus-width = <4>; 420 max-frequency = <200000000>; 399 max-frequency = <200000000>; 421 cap-sd-highspeed; 400 cap-sd-highspeed; 422 sd-uhs-sdr50; 401 sd-uhs-sdr50; 423 sd-uhs-sdr104; 402 sd-uhs-sdr104; 424 keep-power-in-suspend; 403 keep-power-in-suspend; 425 wakeup-source; !! 404 enable-sdio-wakeup; 426 cap-sdio-irq; 405 cap-sdio-irq; 427 vmmc-supply = <&sdio_fixed_3v3>; 406 vmmc-supply = <&sdio_fixed_3v3>; 428 vqmmc-supply = <&mt6397_vgp3_reg>; 407 vqmmc-supply = <&mt6397_vgp3_reg>; 429 non-removable; 408 non-removable; 430 cap-power-off-card; 409 cap-power-off-card; 431 410 432 #address-cells = <1>; 411 #address-cells = <1>; 433 #size-cells = <0>; 412 #size-cells = <0>; 434 413 435 btmrvl: btmrvl@2 { 414 btmrvl: btmrvl@2 { 436 compatible = "marvell,sd8897-b 415 compatible = "marvell,sd8897-bt"; 437 reg = <2>; 416 reg = <2>; 438 interrupts-extended = <&pio 11 !! 417 interrupt-parent = <&pio>; >> 418 interrupts = <119 IRQ_TYPE_LEVEL_LOW>; 439 marvell,wakeup-pin = /bits/ 16 419 marvell,wakeup-pin = /bits/ 16 <0x0d>; 440 marvell,wakeup-gap-ms = /bits/ 420 marvell,wakeup-gap-ms = /bits/ 16 <0x64>; 441 }; 421 }; 442 422 443 mwifiex: mwifiex@1 { 423 mwifiex: mwifiex@1 { 444 compatible = "marvell,sd8897"; 424 compatible = "marvell,sd8897"; 445 reg = <1>; 425 reg = <1>; 446 interrupts-extended = <&pio 38 !! 426 interrupt-parent = <&pio>; >> 427 interrupts = <38 IRQ_TYPE_LEVEL_LOW>; 447 marvell,wakeup-pin = <3>; 428 marvell,wakeup-pin = <3>; 448 }; 429 }; 449 }; 430 }; 450 431 451 &nor_flash { 432 &nor_flash { 452 status = "okay"; 433 status = "okay"; 453 pinctrl-names = "default"; 434 pinctrl-names = "default"; 454 pinctrl-0 = <&nor_gpio1_pins>; 435 pinctrl-0 = <&nor_gpio1_pins>; 455 436 456 flash@0 { 437 flash@0 { 457 compatible = "jedec,spi-nor"; 438 compatible = "jedec,spi-nor"; 458 reg = <0>; 439 reg = <0>; 459 spi-max-frequency = <50000000> 440 spi-max-frequency = <50000000>; 460 }; 441 }; 461 }; 442 }; 462 443 463 &pio { 444 &pio { 464 gpio-line-names = "EC_INT_1V8", 445 gpio-line-names = "EC_INT_1V8", 465 "SD_CD_L", 446 "SD_CD_L", 466 "ALC5514_IRQ", 447 "ALC5514_IRQ", 467 "ALC5650_IRQ", 448 "ALC5650_IRQ", 468 /* 449 /* 469 * AP_FLASH_WP_L is 450 * AP_FLASH_WP_L is crossystem ABI. Schematics 470 * call it SFWP_B. 451 * call it SFWP_B. 471 */ 452 */ 472 "AP_FLASH_WP_L", 453 "AP_FLASH_WP_L", 473 "SFIN", 454 "SFIN", 474 "SFCS0", 455 "SFCS0", 475 "SFHOLD", 456 "SFHOLD", 476 "SFOUT", 457 "SFOUT", 477 "SFCK", 458 "SFCK", 478 "WRAP_EVENT_S_EINT10 459 "WRAP_EVENT_S_EINT10", 479 "PMU_INT", 460 "PMU_INT", 480 "I2S2_WS_ALC5650", 461 "I2S2_WS_ALC5650", 481 "I2S2_BCK_ALC5650", 462 "I2S2_BCK_ALC5650", 482 "PWR_BTN_1V8", 463 "PWR_BTN_1V8", 483 "DA9212_IRQ", 464 "DA9212_IRQ", 484 "IDDIG", 465 "IDDIG", 485 "WATCHDOG", 466 "WATCHDOG", 486 "CEC", 467 "CEC", 487 "HDMISCK", 468 "HDMISCK", 488 "HDMISD", 469 "HDMISD", 489 "HTPLG", 470 "HTPLG", 490 "MSDC3_DAT0", 471 "MSDC3_DAT0", 491 "MSDC3_DAT1", 472 "MSDC3_DAT1", 492 "MSDC3_DAT2", 473 "MSDC3_DAT2", 493 "MSDC3_DAT3", 474 "MSDC3_DAT3", 494 "MSDC3_CLK", 475 "MSDC3_CLK", 495 "MSDC3_CMD", 476 "MSDC3_CMD", 496 "USB_C0_OC_FLAGB", 477 "USB_C0_OC_FLAGB", 497 "USBA_OC1_L", 478 "USBA_OC1_L", 498 "PS8640_1V2_ENABLE", 479 "PS8640_1V2_ENABLE", 499 "THERM_ALERT_N", 480 "THERM_ALERT_N", 500 "PANEL_LCD_POWER_EN" 481 "PANEL_LCD_POWER_EN", 501 "ANX7688_CHIP_PD_C", 482 "ANX7688_CHIP_PD_C", 502 "EC_IN_RW_1V8", 483 "EC_IN_RW_1V8", 503 "ANX7688_1V_EN_C", 484 "ANX7688_1V_EN_C", 504 "USB_DP_HPD_C", 485 "USB_DP_HPD_C", 505 "TPM_DAVINT_N", 486 "TPM_DAVINT_N", 506 "MARVELL8897_IRQ", 487 "MARVELL8897_IRQ", 507 "EN_USB_A0_PWR", 488 "EN_USB_A0_PWR", 508 "USBA_A0_OC_L", 489 "USBA_A0_OC_L", 509 "EN_PP3300_DX_EDP", 490 "EN_PP3300_DX_EDP", 510 "", 491 "", 511 "SOC_I2C2_1V8_SDA_40 492 "SOC_I2C2_1V8_SDA_400K", 512 "SOC_I2C2_1V8_SCL_40 493 "SOC_I2C2_1V8_SCL_400K", 513 "SOC_I2C0_1V8_SDA_40 494 "SOC_I2C0_1V8_SDA_400K", 514 "SOC_I2C0_1V8_SCL_40 495 "SOC_I2C0_1V8_SCL_400K", 515 "EMMC_ID1", 496 "EMMC_ID1", 516 "EMMC_ID0", 497 "EMMC_ID0", 517 "MEM_CONFIG3", 498 "MEM_CONFIG3", 518 "EMMC_ID2", 499 "EMMC_ID2", 519 "MEM_CONFIG1", 500 "MEM_CONFIG1", 520 "MEM_CONFIG2", 501 "MEM_CONFIG2", 521 "BRD_ID2", 502 "BRD_ID2", 522 "MEM_CONFIG0", 503 "MEM_CONFIG0", 523 "BRD_ID0", 504 "BRD_ID0", 524 "BRD_ID1", 505 "BRD_ID1", 525 "EMMC_DAT0", 506 "EMMC_DAT0", 526 "EMMC_DAT1", 507 "EMMC_DAT1", 527 "EMMC_DAT2", 508 "EMMC_DAT2", 528 "EMMC_DAT3", 509 "EMMC_DAT3", 529 "EMMC_DAT4", 510 "EMMC_DAT4", 530 "EMMC_DAT5", 511 "EMMC_DAT5", 531 "EMMC_DAT6", 512 "EMMC_DAT6", 532 "EMMC_DAT7", 513 "EMMC_DAT7", 533 "EMMC_CLK", 514 "EMMC_CLK", 534 "EMMC_CMD", 515 "EMMC_CMD", 535 "EMMC_RCLK", 516 "EMMC_RCLK", 536 "PLT_RST_L", 517 "PLT_RST_L", 537 "LID_OPEN_1V8_L", 518 "LID_OPEN_1V8_L", 538 "AUDIO_SPI_MISO_R", 519 "AUDIO_SPI_MISO_R", 539 "", 520 "", 540 "AC_OK_1V8", 521 "AC_OK_1V8", 541 "SD_DATA0", 522 "SD_DATA0", 542 "SD_DATA1", 523 "SD_DATA1", 543 "SD_DATA2", 524 "SD_DATA2", 544 "SD_DATA3", 525 "SD_DATA3", 545 "SD_CLK", 526 "SD_CLK", 546 "SD_CMD", 527 "SD_CMD", 547 "PWRAP_SPI0_MI", 528 "PWRAP_SPI0_MI", 548 "PWRAP_SPI0_MO", 529 "PWRAP_SPI0_MO", 549 "PWRAP_SPI0_CK", 530 "PWRAP_SPI0_CK", 550 "PWRAP_SPI0_CSN", 531 "PWRAP_SPI0_CSN", 551 "", 532 "", 552 "", 533 "", 553 "WIFI_PDN", 534 "WIFI_PDN", 554 "RTC32K_1V8", 535 "RTC32K_1V8", 555 "DISP_PWM0", 536 "DISP_PWM0", 556 "TOUCHSCREEN_INT_L", 537 "TOUCHSCREEN_INT_L", 557 "", 538 "", 558 "SRCLKENA0", 539 "SRCLKENA0", 559 "SRCLKENA1", 540 "SRCLKENA1", 560 "PS8640_MODE_CONF", 541 "PS8640_MODE_CONF", 561 "TOUCHSCREEN_RESET_R 542 "TOUCHSCREEN_RESET_R", 562 "PLATFORM_PROCHOT_L" 543 "PLATFORM_PROCHOT_L", 563 "PANEL_POWER_EN", 544 "PANEL_POWER_EN", 564 "REC_MODE_L", 545 "REC_MODE_L", 565 "EC_FW_UPDATE_L", 546 "EC_FW_UPDATE_L", 566 "ACCEL2_INT_L", 547 "ACCEL2_INT_L", 567 "HDMI_DP_INT", 548 "HDMI_DP_INT", 568 "ACCELGYRO3_INT_L", 549 "ACCELGYRO3_INT_L", 569 "ACCELGYRO4_INT_L", 550 "ACCELGYRO4_INT_L", 570 "SPI_EC_CLK", 551 "SPI_EC_CLK", 571 "SPI_EC_MI", 552 "SPI_EC_MI", 572 "SPI_EC_MO", 553 "SPI_EC_MO", 573 "SPI_EC_CSN", 554 "SPI_EC_CSN", 574 "SOC_I2C3_1V8_SDA_40 555 "SOC_I2C3_1V8_SDA_400K", 575 "SOC_I2C3_1V8_SCL_40 556 "SOC_I2C3_1V8_SCL_400K", 576 "", 557 "", 577 "", 558 "", 578 "", 559 "", 579 "", 560 "", 580 "", 561 "", 581 "", 562 "", 582 "", 563 "", 583 "PS8640_SYSRSTN_1V8" 564 "PS8640_SYSRSTN_1V8", 584 "APIN_MAX98090_DOUT2 565 "APIN_MAX98090_DOUT2", 585 "TP_INT_1V8_L_R", 566 "TP_INT_1V8_L_R", 586 "RST_USB_HUB_R", 567 "RST_USB_HUB_R", 587 "BT_WAKE_L", 568 "BT_WAKE_L", 588 "ACCEL1_INT_L", 569 "ACCEL1_INT_L", 589 "TABLET_MODE_L", 570 "TABLET_MODE_L", 590 "", 571 "", 591 "V_UP_IN_L_R", 572 "V_UP_IN_L_R", 592 "V_DOWN_IN_L_R", 573 "V_DOWN_IN_L_R", 593 "SOC_I2C1_1V8_SDA_1M 574 "SOC_I2C1_1V8_SDA_1M", 594 "SOC_I2C1_1V8_SCL_1M 575 "SOC_I2C1_1V8_SCL_1M", 595 "PS8640_PDN_1V8", 576 "PS8640_PDN_1V8", 596 "MAX98090_LRCLK", 577 "MAX98090_LRCLK", 597 "MAX98090_BCLK", 578 "MAX98090_BCLK", 598 "MAX98090_MCLK", 579 "MAX98090_MCLK", 599 "APOUT_MAX98090_DIN" 580 "APOUT_MAX98090_DIN", 600 "APIN_MAX98090_DOUT" 581 "APIN_MAX98090_DOUT", 601 "SOC_I2C4_1V8_SDA_40 582 "SOC_I2C4_1V8_SDA_400K", 602 "SOC_I2C4_1V8_SCL_40 583 "SOC_I2C4_1V8_SCL_400K"; 603 584 604 aud_i2s2: aud_i2s2 { 585 aud_i2s2: aud_i2s2 { 605 pins1 { 586 pins1 { 606 pinmux = <MT8173_PIN_1 587 pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>, 607 <MT8173_PIN_1 588 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>, 608 <MT8173_PIN_1 589 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>, 609 <MT8173_PIN_1 590 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>, 610 <MT8173_PIN_1 591 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>, 611 <MT8173_PIN_1 592 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>, 612 <MT8173_PIN_1 593 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>; 613 bias-pull-down; 594 bias-pull-down; 614 }; 595 }; 615 }; 596 }; 616 597 617 bl_fixed_pins: bl_fixed_pins { 598 bl_fixed_pins: bl_fixed_pins { 618 pins1 { 599 pins1 { 619 pinmux = <MT8173_PIN_3 600 pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>; 620 output-low; 601 output-low; 621 }; 602 }; 622 }; 603 }; 623 604 624 bt_wake_pins: bt_wake_pins { 605 bt_wake_pins: bt_wake_pins { 625 pins1 { 606 pins1 { 626 pinmux = <MT8173_PIN_1 607 pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>; 627 bias-pull-up; 608 bias-pull-up; 628 }; 609 }; 629 }; 610 }; 630 611 631 disp_pwm0_pins: disp_pwm0_pins { 612 disp_pwm0_pins: disp_pwm0_pins { 632 pins1 { 613 pins1 { 633 pinmux = <MT8173_PIN_8 614 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>; 634 output-low; 615 output-low; 635 }; 616 }; 636 }; 617 }; 637 618 638 gpio_keys_pins: gpio_keys_pins { 619 gpio_keys_pins: gpio_keys_pins { 639 volume_pins { 620 volume_pins { 640 pinmux = <MT8173_PIN_1 621 pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>, 641 <MT8173_PIN_1 622 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>; 642 bias-pull-up; 623 bias-pull-up; 643 }; 624 }; 644 625 645 tablet_mode_pins { 626 tablet_mode_pins { 646 pinmux = <MT8173_PIN_1 627 pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>; 647 bias-pull-up; 628 bias-pull-up; 648 }; 629 }; 649 }; 630 }; 650 631 651 hdmi_mux_pins: hdmi_mux_pins { 632 hdmi_mux_pins: hdmi_mux_pins { 652 pins1 { 633 pins1 { 653 pinmux = <MT8173_PIN_3 634 pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>; 654 }; 635 }; 655 }; 636 }; 656 637 657 i2c1_pins_a: i2c1 { 638 i2c1_pins_a: i2c1 { 658 da9211_pins { 639 da9211_pins { 659 pinmux = <MT8173_PIN_1 640 pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>; 660 bias-pull-up; 641 bias-pull-up; 661 }; 642 }; 662 }; 643 }; 663 644 664 mmc0_pins_default: mmc0default { 645 mmc0_pins_default: mmc0default { 665 pins_cmd_dat { 646 pins_cmd_dat { 666 pinmux = <MT8173_PIN_5 647 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, 667 <MT8173_PIN_5 648 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, 668 <MT8173_PIN_5 649 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, 669 <MT8173_PIN_6 650 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, 670 <MT8173_PIN_6 651 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, 671 <MT8173_PIN_6 652 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, 672 <MT8173_PIN_6 653 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, 673 <MT8173_PIN_6 654 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, 674 <MT8173_PIN_6 655 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; 675 bias-pull-up; 656 bias-pull-up; 676 }; 657 }; 677 658 678 pins_clk { 659 pins_clk { 679 pinmux = <MT8173_PIN_6 660 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; 680 bias-pull-down; 661 bias-pull-down; 681 }; 662 }; 682 663 683 pins_rst { 664 pins_rst { 684 pinmux = <MT8173_PIN_6 665 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; 685 bias-pull-up; 666 bias-pull-up; 686 }; 667 }; 687 }; 668 }; 688 669 689 mmc1_pins_default: mmc1default { 670 mmc1_pins_default: mmc1default { 690 pins_cmd_dat { 671 pins_cmd_dat { 691 pinmux = <MT8173_PIN_7 672 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, 692 <MT8173_PIN_7 673 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, 693 <MT8173_PIN_7 674 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, 694 <MT8173_PIN_7 675 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, 695 <MT8173_PIN_7 676 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; 696 input-enable; 677 input-enable; 697 drive-strength = <MTK_ 678 drive-strength = <MTK_DRIVE_4mA>; 698 bias-pull-up = <MTK_PU 679 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 699 }; 680 }; 700 681 701 pins_clk { 682 pins_clk { 702 pinmux = <MT8173_PIN_7 683 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; 703 bias-pull-down; 684 bias-pull-down; 704 drive-strength = <MTK_ 685 drive-strength = <MTK_DRIVE_4mA>; 705 }; 686 }; 706 687 707 pins_insert { 688 pins_insert { 708 pinmux = <MT8173_PIN_1 689 pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>; 709 bias-pull-up; 690 bias-pull-up; 710 }; 691 }; 711 }; 692 }; 712 693 713 mmc3_pins_default: mmc3default { 694 mmc3_pins_default: mmc3default { 714 pins_dat { 695 pins_dat { 715 pinmux = <MT8173_PIN_2 696 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>, 716 <MT8173_PIN_2 697 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>, 717 <MT8173_PIN_2 698 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>, 718 <MT8173_PIN_2 699 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>; 719 input-enable; 700 input-enable; 720 drive-strength = <MTK_ 701 drive-strength = <MTK_DRIVE_8mA>; 721 bias-pull-up = <MTK_PU 702 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 722 }; 703 }; 723 704 724 pins_cmd { 705 pins_cmd { 725 pinmux = <MT8173_PIN_2 706 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>; 726 input-enable; 707 input-enable; 727 drive-strength = <MTK_ 708 drive-strength = <MTK_DRIVE_8mA>; 728 bias-pull-up = <MTK_PU 709 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 729 }; 710 }; 730 711 731 pins_clk { 712 pins_clk { 732 pinmux = <MT8173_PIN_2 713 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>; 733 bias-pull-down; 714 bias-pull-down; 734 drive-strength = <MTK_ 715 drive-strength = <MTK_DRIVE_8mA>; 735 }; 716 }; 736 }; 717 }; 737 718 738 mmc0_pins_uhs: mmc0 { 719 mmc0_pins_uhs: mmc0 { 739 pins_cmd_dat { 720 pins_cmd_dat { 740 pinmux = <MT8173_PIN_5 721 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, 741 <MT8173_PIN_5 722 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, 742 <MT8173_PIN_5 723 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, 743 <MT8173_PIN_6 724 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, 744 <MT8173_PIN_6 725 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, 745 <MT8173_PIN_6 726 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, 746 <MT8173_PIN_6 727 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, 747 <MT8173_PIN_6 728 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, 748 <MT8173_PIN_6 729 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; 749 input-enable; 730 input-enable; 750 drive-strength = <MTK_ 731 drive-strength = <MTK_DRIVE_6mA>; 751 bias-pull-up = <MTK_PU 732 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 752 }; 733 }; 753 734 754 pins_clk { 735 pins_clk { 755 pinmux = <MT8173_PIN_6 736 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; 756 drive-strength = <MTK_ 737 drive-strength = <MTK_DRIVE_6mA>; 757 bias-pull-down = <MTK_ 738 bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 758 }; 739 }; 759 740 760 pins_ds { 741 pins_ds { 761 pinmux = <MT8173_PIN_6 742 pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>; 762 drive-strength = <MTK_ 743 drive-strength = <MTK_DRIVE_10mA>; 763 bias-pull-down = <MTK_ 744 bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 764 }; 745 }; 765 746 766 pins_rst { 747 pins_rst { 767 pinmux = <MT8173_PIN_6 748 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; 768 bias-pull-up; 749 bias-pull-up; 769 }; 750 }; 770 }; 751 }; 771 752 772 mmc1_pins_uhs: mmc1 { 753 mmc1_pins_uhs: mmc1 { 773 pins_cmd_dat { 754 pins_cmd_dat { 774 pinmux = <MT8173_PIN_7 755 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, 775 <MT8173_PIN_7 756 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, 776 <MT8173_PIN_7 757 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, 777 <MT8173_PIN_7 758 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, 778 <MT8173_PIN_7 759 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; 779 input-enable; 760 input-enable; 780 drive-strength = <MTK_ 761 drive-strength = <MTK_DRIVE_6mA>; 781 bias-pull-up = <MTK_PU 762 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 782 }; 763 }; 783 764 784 pins_clk { 765 pins_clk { 785 pinmux = <MT8173_PIN_7 766 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; 786 drive-strength = <MTK_ 767 drive-strength = <MTK_DRIVE_8mA>; 787 bias-pull-down = <MTK_ 768 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 788 }; 769 }; 789 }; 770 }; 790 771 791 mmc3_pins_uhs: mmc3 { 772 mmc3_pins_uhs: mmc3 { 792 pins_dat { 773 pins_dat { 793 pinmux = <MT8173_PIN_2 774 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>, 794 <MT8173_PIN_2 775 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>, 795 <MT8173_PIN_2 776 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>, 796 <MT8173_PIN_2 777 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>; 797 input-enable; 778 input-enable; 798 drive-strength = <MTK_ 779 drive-strength = <MTK_DRIVE_8mA>; 799 bias-pull-up = <MTK_PU 780 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 800 }; 781 }; 801 782 802 pins_cmd { 783 pins_cmd { 803 pinmux = <MT8173_PIN_2 784 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>; 804 input-enable; 785 input-enable; 805 drive-strength = <MTK_ 786 drive-strength = <MTK_DRIVE_8mA>; 806 bias-pull-up = <MTK_PU 787 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 807 }; 788 }; 808 789 809 pins_clk { 790 pins_clk { 810 pinmux = <MT8173_PIN_2 791 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>; 811 drive-strength = <MTK_ 792 drive-strength = <MTK_DRIVE_8mA>; 812 bias-pull-down = <MTK_ 793 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 813 }; 794 }; 814 }; 795 }; 815 796 816 nor_gpio1_pins: nor { 797 nor_gpio1_pins: nor { 817 pins1 { 798 pins1 { 818 pinmux = <MT8173_PIN_6 799 pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>, 819 <MT8173_PIN_7 800 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>, 820 <MT8173_PIN_8 801 <MT8173_PIN_8_EINT8__FUNC_SFIN>; 821 input-enable; 802 input-enable; 822 drive-strength = <MTK_ 803 drive-strength = <MTK_DRIVE_4mA>; 823 bias-pull-up; 804 bias-pull-up; 824 }; 805 }; 825 806 826 pins2 { 807 pins2 { 827 pinmux = <MT8173_PIN_5 808 pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>; 828 drive-strength = <MTK_ 809 drive-strength = <MTK_DRIVE_4mA>; 829 bias-pull-up; 810 bias-pull-up; 830 }; 811 }; 831 812 832 pins_clk { 813 pins_clk { 833 pinmux = <MT8173_PIN_9 814 pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>; 834 input-enable; 815 input-enable; 835 drive-strength = <MTK_ 816 drive-strength = <MTK_DRIVE_4mA>; 836 bias-pull-up; 817 bias-pull-up; 837 }; 818 }; 838 }; 819 }; 839 820 840 panel_backlight_en_pins: panel_backlig << 841 pins1 { << 842 pinmux = <MT8173_PIN_9 << 843 }; << 844 }; << 845 << 846 panel_fixed_pins: panel_fixed_pins { 821 panel_fixed_pins: panel_fixed_pins { 847 pins1 { 822 pins1 { 848 pinmux = <MT8173_PIN_4 823 pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>; 849 }; 824 }; 850 }; 825 }; 851 826 852 ps8640_pins: ps8640_pins { 827 ps8640_pins: ps8640_pins { 853 pins1 { 828 pins1 { 854 pinmux = <MT8173_PIN_9 829 pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>, 855 <MT8173_PIN_1 830 <MT8173_PIN_115_URTS0__FUNC_GPIO115>, 856 <MT8173_PIN_1 831 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>; 857 }; 832 }; 858 }; 833 }; 859 834 860 ps8640_fixed_pins: ps8640_fixed_pins { 835 ps8640_fixed_pins: ps8640_fixed_pins { 861 pins1 { 836 pins1 { 862 pinmux = <MT8173_PIN_3 837 pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>; 863 }; 838 }; 864 }; 839 }; 865 840 866 rt5650_irq: rt5650_irq { 841 rt5650_irq: rt5650_irq { 867 pins1 { 842 pins1 { 868 pinmux = <MT8173_PIN_3 843 pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>; 869 bias-pull-down; 844 bias-pull-down; 870 }; 845 }; 871 }; 846 }; 872 847 873 sdio_fixed_3v3_pins: sdio_fixed_3v3_pi 848 sdio_fixed_3v3_pins: sdio_fixed_3v3_pins { 874 pins1 { 849 pins1 { 875 pinmux = <MT8173_PIN_8 850 pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>; 876 output-low; 851 output-low; 877 }; 852 }; 878 }; 853 }; 879 854 880 spi_pins_a: spi1 { 855 spi_pins_a: spi1 { 881 pins1 { 856 pins1 { 882 pinmux = <MT8173_PIN_0 857 pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>; 883 bias-pull-up; 858 bias-pull-up; 884 }; 859 }; 885 860 886 pins_spi { 861 pins_spi { 887 pinmux = <MT8173_PIN_1 862 pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>, 888 <MT8173_PIN_1 863 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>, 889 <MT8173_PIN_1 864 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>, 890 <MT8173_PIN_1 865 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>; 891 bias-disable; 866 bias-disable; 892 }; 867 }; 893 }; 868 }; 894 869 895 trackpad_irq: trackpad_irq { 870 trackpad_irq: trackpad_irq { 896 pins1 { 871 pins1 { 897 pinmux = <MT8173_PIN_1 872 pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>; 898 input-enable; 873 input-enable; 899 bias-pull-up; 874 bias-pull-up; 900 }; 875 }; 901 }; 876 }; 902 877 903 usb_pins: usb { 878 usb_pins: usb { 904 pins1 { 879 pins1 { 905 pinmux = <MT8173_PIN_1 880 pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>; 906 output-high; 881 output-high; 907 bias-disable; 882 bias-disable; 908 }; 883 }; 909 }; 884 }; 910 885 911 wifi_wake_pins: wifi_wake_pins { 886 wifi_wake_pins: wifi_wake_pins { 912 pins1 { 887 pins1 { 913 pinmux = <MT8173_PIN_3 888 pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>; 914 bias-pull-up; 889 bias-pull-up; 915 }; 890 }; 916 }; 891 }; 917 }; 892 }; 918 893 919 &pwm0 { 894 &pwm0 { 920 pinctrl-names = "default"; << 921 pinctrl-0 = <&disp_pwm0_pins>; << 922 status = "okay"; 895 status = "okay"; 923 }; 896 }; 924 897 925 &pwrap { 898 &pwrap { 926 pmic: pmic { !! 899 pmic: mt6397 { 927 compatible = "mediatek,mt6397" 900 compatible = "mediatek,mt6397"; 928 #address-cells = <1>; 901 #address-cells = <1>; 929 #size-cells = <1>; 902 #size-cells = <1>; 930 interrupts-extended = <&pio 11 !! 903 interrupt-parent = <&pio>; >> 904 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; 931 interrupt-controller; 905 interrupt-controller; 932 #interrupt-cells = <2>; 906 #interrupt-cells = <2>; 933 907 934 clock: mt6397clock { 908 clock: mt6397clock { 935 compatible = "mediatek 909 compatible = "mediatek,mt6397-clk"; 936 #clock-cells = <1>; 910 #clock-cells = <1>; 937 }; 911 }; 938 912 939 pio6397: pinctrl { 913 pio6397: pinctrl { 940 compatible = "mediatek 914 compatible = "mediatek,mt6397-pinctrl"; >> 915 pins-are-numbered; 941 gpio-controller; 916 gpio-controller; 942 #gpio-cells = <2>; 917 #gpio-cells = <2>; 943 }; 918 }; 944 919 945 regulator: mt6397regulator { 920 regulator: mt6397regulator { 946 compatible = "mediatek 921 compatible = "mediatek,mt6397-regulator"; 947 922 948 mt6397_vpca15_reg: buc 923 mt6397_vpca15_reg: buck_vpca15 { 949 regulator-comp 924 regulator-compatible = "buck_vpca15"; 950 regulator-name 925 regulator-name = "vpca15"; 951 regulator-min- 926 regulator-min-microvolt = < 700000>; 952 regulator-max- 927 regulator-max-microvolt = <1350000>; 953 regulator-ramp 928 regulator-ramp-delay = <12500>; 954 regulator-alwa 929 regulator-always-on; 955 regulator-allo 930 regulator-allowed-modes = <0 1>; 956 }; 931 }; 957 932 958 mt6397_vpca7_reg: buck 933 mt6397_vpca7_reg: buck_vpca7 { 959 regulator-comp 934 regulator-compatible = "buck_vpca7"; 960 regulator-name 935 regulator-name = "vpca7"; 961 regulator-min- 936 regulator-min-microvolt = < 700000>; 962 regulator-max- 937 regulator-max-microvolt = <1350000>; 963 regulator-ramp 938 regulator-ramp-delay = <12500>; 964 regulator-enab 939 regulator-enable-ramp-delay = <115>; 965 regulator-alwa 940 regulator-always-on; 966 }; 941 }; 967 942 968 mt6397_vsramca15_reg: 943 mt6397_vsramca15_reg: buck_vsramca15 { 969 regulator-comp 944 regulator-compatible = "buck_vsramca15"; 970 regulator-name 945 regulator-name = "vsramca15"; 971 regulator-min- 946 regulator-min-microvolt = < 700000>; 972 regulator-max- 947 regulator-max-microvolt = <1350000>; 973 regulator-ramp 948 regulator-ramp-delay = <12500>; 974 regulator-alwa 949 regulator-always-on; 975 }; 950 }; 976 951 977 mt6397_vsramca7_reg: b 952 mt6397_vsramca7_reg: buck_vsramca7 { 978 regulator-comp 953 regulator-compatible = "buck_vsramca7"; 979 regulator-name 954 regulator-name = "vsramca7"; 980 regulator-min- 955 regulator-min-microvolt = < 700000>; 981 regulator-max- 956 regulator-max-microvolt = <1350000>; 982 regulator-ramp 957 regulator-ramp-delay = <12500>; 983 regulator-alwa 958 regulator-always-on; 984 }; 959 }; 985 960 986 mt6397_vcore_reg: buck 961 mt6397_vcore_reg: buck_vcore { 987 regulator-comp 962 regulator-compatible = "buck_vcore"; 988 regulator-name 963 regulator-name = "vcore"; 989 regulator-min- 964 regulator-min-microvolt = < 700000>; 990 regulator-max- 965 regulator-max-microvolt = <1350000>; 991 regulator-ramp 966 regulator-ramp-delay = <12500>; 992 regulator-alwa 967 regulator-always-on; 993 }; 968 }; 994 969 995 mt6397_vgpu_reg: buck_ 970 mt6397_vgpu_reg: buck_vgpu { 996 regulator-comp 971 regulator-compatible = "buck_vgpu"; 997 regulator-name 972 regulator-name = "vgpu"; 998 regulator-min- 973 regulator-min-microvolt = < 700000>; 999 regulator-max- 974 regulator-max-microvolt = <1350000>; 1000 regulator-ram 975 regulator-ramp-delay = <12500>; 1001 regulator-ena 976 regulator-enable-ramp-delay = <115>; 1002 }; 977 }; 1003 978 1004 mt6397_vdrm_reg: buck 979 mt6397_vdrm_reg: buck_vdrm { 1005 regulator-com 980 regulator-compatible = "buck_vdrm"; 1006 regulator-nam 981 regulator-name = "vdrm"; 1007 regulator-min 982 regulator-min-microvolt = <1200000>; 1008 regulator-max 983 regulator-max-microvolt = <1400000>; 1009 regulator-ram 984 regulator-ramp-delay = <12500>; 1010 regulator-alw 985 regulator-always-on; 1011 }; 986 }; 1012 987 1013 mt6397_vio18_reg: buc 988 mt6397_vio18_reg: buck_vio18 { 1014 regulator-com 989 regulator-compatible = "buck_vio18"; 1015 regulator-nam 990 regulator-name = "vio18"; 1016 regulator-min 991 regulator-min-microvolt = <1620000>; 1017 regulator-max 992 regulator-max-microvolt = <1980000>; 1018 regulator-ram 993 regulator-ramp-delay = <12500>; 1019 regulator-alw 994 regulator-always-on; 1020 }; 995 }; 1021 996 1022 mt6397_vtcxo_reg: ldo 997 mt6397_vtcxo_reg: ldo_vtcxo { 1023 regulator-com 998 regulator-compatible = "ldo_vtcxo"; 1024 regulator-nam 999 regulator-name = "vtcxo"; 1025 regulator-alw 1000 regulator-always-on; 1026 }; 1001 }; 1027 1002 1028 mt6397_va28_reg: ldo_ 1003 mt6397_va28_reg: ldo_va28 { 1029 regulator-com 1004 regulator-compatible = "ldo_va28"; 1030 regulator-nam 1005 regulator-name = "va28"; 1031 }; 1006 }; 1032 1007 1033 mt6397_vcama_reg: ldo 1008 mt6397_vcama_reg: ldo_vcama { 1034 regulator-com 1009 regulator-compatible = "ldo_vcama"; 1035 regulator-nam 1010 regulator-name = "vcama"; 1036 regulator-min 1011 regulator-min-microvolt = <1800000>; 1037 regulator-max 1012 regulator-max-microvolt = <1800000>; 1038 regulator-ena 1013 regulator-enable-ramp-delay = <218>; 1039 }; 1014 }; 1040 1015 1041 mt6397_vio28_reg: ldo 1016 mt6397_vio28_reg: ldo_vio28 { 1042 regulator-com 1017 regulator-compatible = "ldo_vio28"; 1043 regulator-nam 1018 regulator-name = "vio28"; 1044 regulator-alw 1019 regulator-always-on; 1045 }; 1020 }; 1046 1021 1047 mt6397_vusb_reg: ldo_ 1022 mt6397_vusb_reg: ldo_vusb { 1048 regulator-com 1023 regulator-compatible = "ldo_vusb"; 1049 regulator-nam 1024 regulator-name = "vusb"; 1050 }; 1025 }; 1051 1026 1052 mt6397_vmc_reg: ldo_v 1027 mt6397_vmc_reg: ldo_vmc { 1053 regulator-com 1028 regulator-compatible = "ldo_vmc"; 1054 regulator-nam 1029 regulator-name = "vmc"; 1055 regulator-min 1030 regulator-min-microvolt = <1800000>; 1056 regulator-max 1031 regulator-max-microvolt = <3300000>; 1057 regulator-ena 1032 regulator-enable-ramp-delay = <218>; 1058 }; 1033 }; 1059 1034 1060 mt6397_vmch_reg: ldo_ 1035 mt6397_vmch_reg: ldo_vmch { 1061 regulator-com 1036 regulator-compatible = "ldo_vmch"; 1062 regulator-nam 1037 regulator-name = "vmch"; 1063 regulator-min 1038 regulator-min-microvolt = <3000000>; 1064 regulator-max 1039 regulator-max-microvolt = <3300000>; 1065 regulator-ena 1040 regulator-enable-ramp-delay = <218>; 1066 }; 1041 }; 1067 1042 1068 mt6397_vemc_3v3_reg: 1043 mt6397_vemc_3v3_reg: ldo_vemc3v3 { 1069 regulator-com 1044 regulator-compatible = "ldo_vemc3v3"; 1070 regulator-nam 1045 regulator-name = "vemc_3v3"; 1071 regulator-min 1046 regulator-min-microvolt = <3000000>; 1072 regulator-max 1047 regulator-max-microvolt = <3300000>; 1073 regulator-ena 1048 regulator-enable-ramp-delay = <218>; 1074 }; 1049 }; 1075 1050 1076 mt6397_vgp1_reg: ldo_ 1051 mt6397_vgp1_reg: ldo_vgp1 { 1077 regulator-com 1052 regulator-compatible = "ldo_vgp1"; 1078 regulator-nam 1053 regulator-name = "vcamd"; 1079 regulator-min 1054 regulator-min-microvolt = <1800000>; 1080 regulator-max 1055 regulator-max-microvolt = <1800000>; 1081 regulator-ena 1056 regulator-enable-ramp-delay = <240>; 1082 }; 1057 }; 1083 1058 1084 mt6397_vgp2_reg: ldo_ 1059 mt6397_vgp2_reg: ldo_vgp2 { 1085 regulator-com 1060 regulator-compatible = "ldo_vgp2"; 1086 regulator-nam 1061 regulator-name = "vcamio"; 1087 regulator-min 1062 regulator-min-microvolt = <3300000>; 1088 regulator-max 1063 regulator-max-microvolt = <3300000>; 1089 regulator-ena 1064 regulator-enable-ramp-delay = <218>; 1090 }; 1065 }; 1091 1066 1092 mt6397_vgp3_reg: ldo_ 1067 mt6397_vgp3_reg: ldo_vgp3 { 1093 regulator-com 1068 regulator-compatible = "ldo_vgp3"; 1094 regulator-nam 1069 regulator-name = "vcamaf"; 1095 regulator-min 1070 regulator-min-microvolt = <1800000>; 1096 regulator-max 1071 regulator-max-microvolt = <1800000>; 1097 regulator-ena 1072 regulator-enable-ramp-delay = <218>; 1098 }; 1073 }; 1099 1074 1100 mt6397_vgp4_reg: ldo_ 1075 mt6397_vgp4_reg: ldo_vgp4 { 1101 regulator-com 1076 regulator-compatible = "ldo_vgp4"; 1102 regulator-nam 1077 regulator-name = "vgp4"; 1103 regulator-min 1078 regulator-min-microvolt = <1200000>; 1104 regulator-max 1079 regulator-max-microvolt = <3300000>; 1105 regulator-ena 1080 regulator-enable-ramp-delay = <218>; 1106 }; 1081 }; 1107 1082 1108 mt6397_vgp5_reg: ldo_ 1083 mt6397_vgp5_reg: ldo_vgp5 { 1109 regulator-com 1084 regulator-compatible = "ldo_vgp5"; 1110 regulator-nam 1085 regulator-name = "vgp5"; 1111 regulator-min 1086 regulator-min-microvolt = <1200000>; 1112 regulator-max 1087 regulator-max-microvolt = <3000000>; 1113 regulator-ena 1088 regulator-enable-ramp-delay = <218>; 1114 }; 1089 }; 1115 1090 1116 mt6397_vgp6_reg: ldo_ 1091 mt6397_vgp6_reg: ldo_vgp6 { 1117 regulator-com 1092 regulator-compatible = "ldo_vgp6"; 1118 regulator-nam 1093 regulator-name = "vgp6"; 1119 regulator-min 1094 regulator-min-microvolt = <3300000>; 1120 regulator-max 1095 regulator-max-microvolt = <3300000>; 1121 regulator-ena 1096 regulator-enable-ramp-delay = <218>; 1122 regulator-alw 1097 regulator-always-on; 1123 }; 1098 }; 1124 1099 1125 mt6397_vibr_reg: ldo_ 1100 mt6397_vibr_reg: ldo_vibr { 1126 regulator-com 1101 regulator-compatible = "ldo_vibr"; 1127 regulator-nam 1102 regulator-name = "vibr"; 1128 regulator-min 1103 regulator-min-microvolt = <1300000>; 1129 regulator-max 1104 regulator-max-microvolt = <3300000>; 1130 regulator-ena 1105 regulator-enable-ramp-delay = <218>; 1131 }; 1106 }; 1132 }; 1107 }; 1133 1108 1134 rtc: mt6397rtc { 1109 rtc: mt6397rtc { 1135 compatible = "mediate 1110 compatible = "mediatek,mt6397-rtc"; 1136 }; 1111 }; >> 1112 >> 1113 syscfg_pctl_pmic: syscfg_pctl_pmic@c000 { >> 1114 compatible = "mediatek,mt6397-pctl-pmic-syscfg", >> 1115 "syscon"; >> 1116 reg = <0 0x0000c000 0 0x0108>; >> 1117 }; 1137 }; 1118 }; 1138 }; 1119 }; 1139 1120 1140 &spi { 1121 &spi { 1141 pinctrl-names = "default"; 1122 pinctrl-names = "default"; 1142 pinctrl-0 = <&spi_pins_a>; 1123 pinctrl-0 = <&spi_pins_a>; 1143 mediatek,pad-select = <1>; 1124 mediatek,pad-select = <1>; 1144 status = "okay"; 1125 status = "okay"; 1145 /* clients */ 1126 /* clients */ 1146 cros_ec: ec@0 { 1127 cros_ec: ec@0 { 1147 compatible = "google,cros-ec- 1128 compatible = "google,cros-ec-spi"; 1148 reg = <0x0>; 1129 reg = <0x0>; 1149 spi-max-frequency = <12000000 1130 spi-max-frequency = <12000000>; 1150 interrupts-extended = <&pio 0 !! 1131 interrupt-parent = <&pio>; >> 1132 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 1151 google,cros-ec-spi-msg-delay 1133 google,cros-ec-spi-msg-delay = <500>; 1152 wakeup-source; << 1153 1134 1154 i2c_tunnel: i2c-tunnel0 { 1135 i2c_tunnel: i2c-tunnel0 { 1155 compatible = "google, 1136 compatible = "google,cros-ec-i2c-tunnel"; 1156 google,remote-bus = < 1137 google,remote-bus = <0>; 1157 #address-cells = <1>; 1138 #address-cells = <1>; 1158 #size-cells = <0>; 1139 #size-cells = <0>; 1159 1140 1160 battery: sbs-battery@ 1141 battery: sbs-battery@b { 1161 compatible = 1142 compatible = "sbs,sbs-battery"; 1162 reg = <0xb>; 1143 reg = <0xb>; 1163 sbs,i2c-retry 1144 sbs,i2c-retry-count = <2>; 1164 sbs,poll-retr 1145 sbs,poll-retry-count = <1>; 1165 }; 1146 }; 1166 }; 1147 }; 1167 }; 1148 }; 1168 }; 1149 }; 1169 1150 1170 &ssusb { 1151 &ssusb { 1171 dr_mode = "host"; 1152 dr_mode = "host"; 1172 wakeup-source; 1153 wakeup-source; 1173 vusb33-supply = <&mt6397_vusb_reg>; 1154 vusb33-supply = <&mt6397_vusb_reg>; 1174 status = "okay"; 1155 status = "okay"; 1175 }; 1156 }; 1176 1157 1177 &thermal { 1158 &thermal { 1178 bank0-supply = <&mt6397_vpca15_reg>; 1159 bank0-supply = <&mt6397_vpca15_reg>; 1179 bank1-supply = <&da9211_vcpu_reg>; 1160 bank1-supply = <&da9211_vcpu_reg>; 1180 }; 1161 }; 1181 1162 1182 &uart0 { 1163 &uart0 { 1183 status = "okay"; 1164 status = "okay"; 1184 }; 1165 }; 1185 1166 1186 &usb_host { 1167 &usb_host { 1187 pinctrl-names = "default"; 1168 pinctrl-names = "default"; 1188 pinctrl-0 = <&usb_pins>; 1169 pinctrl-0 = <&usb_pins>; 1189 vusb33-supply = <&mt6397_vusb_reg>; 1170 vusb33-supply = <&mt6397_vusb_reg>; 1190 status = "okay"; 1171 status = "okay"; 1191 }; 1172 }; 1192 1173 1193 #include <arm/cros-ec-keyboard.dtsi> 1174 #include <arm/cros-ec-keyboard.dtsi>
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